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12/13/2007
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01/17/2008
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11/16/2006
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02/07/2008
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05/29/2008
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02/14/2008
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12/14/2006
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07/15/2008
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11466572
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Filing Dt:
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08/23/2006
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
Title:
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EMBEDDED STRAIN LAYER IN THIN SOI TRANSISTORS AND A METHOD OF FORMING THE SAME
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02/26/2008
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11466754
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Filing Dt:
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08/23/2006
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Publication #:
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Pub Dt:
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12/14/2006
| | | | |
Title:
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SINGLE SUPPLY LEVEL CONVERTER
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Patent #:
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Issue Dt:
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07/01/2008
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11467294
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Filing Dt:
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08/25/2006
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Publication #:
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Pub Dt:
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02/28/2008
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Title:
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HEAT-SHIELDED LOW POWER PCM-BASED REPROGRAMMABLE EFUSE DEVICE
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Patent #:
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12/09/2008
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11467446
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Filing Dt:
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08/25/2006
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Publication #:
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Pub Dt:
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12/21/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
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Patent #:
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Issue Dt:
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05/01/2012
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11467493
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Filing Dt:
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08/25/2006
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Publication #:
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Pub Dt:
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05/29/2008
| | | | |
Title:
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VERIFICATION OF A PROGRAM PARTITIONED ACCORDING TO THE CONTROL FLOW INFORMATION OF THE PROGRAM
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11467593
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Filing Dt:
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08/28/2006
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Publication #:
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Pub Dt:
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01/04/2007
| | | | |
Title:
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IMPROVED HDP-BASED ILD CAPPING LAYER
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Patent #:
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Issue Dt:
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07/14/2009
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11467712
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Filing Dt:
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08/28/2006
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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EMBEDDED INTERCONNECTS, AND METHODS FOR FORMING SAME
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Patent #:
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04/19/2011
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11467862
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08/28/2006
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Pub Dt:
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02/28/2008
| | | | |
Title:
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METHOD OF STEP-AND-FLASH IMPRINT LITHOGRAPHY
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Patent #:
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Issue Dt:
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08/19/2008
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11468030
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Filing Dt:
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08/29/2006
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Publication #:
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Pub Dt:
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12/28/2006
| | | | |
Title:
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YIELD IMPROVEMENT IN SILICON-GERMANIUM EPITAXIAL GROWTH
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Patent #:
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Issue Dt:
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10/19/2010
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11468068
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Filing Dt:
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08/29/2006
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Publication #:
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Pub Dt:
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03/06/2008
| | | | |
Title:
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DEVICE STRUCTURES INCLUDING BACKSIDE CONTACTS, AND METHODS FOR FORMING SAME
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Patent #:
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Issue Dt:
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11/04/2008
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11468078
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Filing Dt:
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08/29/2006
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Pub Dt:
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03/06/2008
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Title:
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METHOD, SYSTEM, AND PROGRAM PRODUCT FOR AUTOMATED VERIFICATION OF GATING LOGIC USING FORMAL VERIFICATION
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Patent #:
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03/22/2011
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11468089
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08/29/2006
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Pub Dt:
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03/06/2008
| | | | |
Title:
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FLUIDIC TEST APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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12/09/2008
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11468402
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08/30/2006
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Pub Dt:
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03/06/2008
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Title:
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METHOD AND STRUCTURE FOR IMPROVING DEVICE PERFORMANCE VARIATION IN DUAL STRESS LINER TECHNOLOGY
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Patent #:
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Issue Dt:
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06/17/2014
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11468403
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08/30/2006
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Pub Dt:
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05/29/2008
| | | | |
Title:
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SEMICONDUCTOR STRUCTURE HAVING UNDERCUT-GATE-OXIDE GATE STACK ENCLOSED BY PROTECTIVE BARRIER MATERIAL
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Patent #:
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10/21/2008
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11469039
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Filing Dt:
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08/31/2006
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Pub Dt:
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04/12/2007
| | | | |
Title:
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SOI DEVICE WITH DIFFERENT CRYSTALLOGRAPHIC ORIENTATIONS
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05/13/2008
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11469206
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Filing Dt:
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08/31/2006
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Pub Dt:
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03/06/2008
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Title:
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TRANSISTOR GATE SHAPE METROLOGY USING MULTIPLE DATA SOURCES
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Patent #:
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Issue Dt:
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07/22/2008
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11469423
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08/31/2006
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Pub Dt:
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04/05/2007
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Title:
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PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP
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02/01/2011
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11469578
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09/01/2006
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Pub Dt:
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03/20/2008
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Title:
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STATIC PULSED BUS CIRCUIT AND METHOD HAVING DYNAMIC POWER SUPPLY RAIL SELECTION
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Issue Dt:
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11/03/2009
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11470024
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09/05/2006
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Pub Dt:
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05/31/2007
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Title:
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TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS
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Issue Dt:
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08/05/2008
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11470349
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09/06/2006
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Pub Dt:
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03/06/2008
| | | | |
Title:
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LOW RESISTANCE CONTACT STRUCTURE AND FABRICATION THEREOF
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Issue Dt:
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08/18/2009
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11470809
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09/07/2006
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Pub Dt:
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03/13/2008
| | | | |
Title:
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DEEP TRENCH CAPACITOR THROUGH SOI SUBSTRATE AND METHODS OF FORMING
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Patent #:
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Issue Dt:
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10/19/2010
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11473338
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Filing Dt:
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06/23/2006
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Pub Dt:
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01/10/2008
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Title:
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GRADED SPIN-ON ORGANIC ANTIREFLECTIVE COATING FOR PHOTOLITHOGRAPHY
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Patent #:
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Issue Dt:
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12/02/2008
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11473757
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Filing Dt:
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06/23/2006
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Pub Dt:
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10/26/2006
| | | | |
Title:
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ULTRA THIN BODY FULLY-DEPLETED SOI MOSFETS
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Issue Dt:
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10/12/2010
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11474678
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Filing Dt:
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06/26/2006
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Pub Dt:
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12/27/2007
| | | | |
Title:
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METHOD FOR HIGH DENSITY DATA STORAGE AND READ-BACK
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Patent #:
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Issue Dt:
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11/11/2008
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11475675
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Filing Dt:
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06/26/2006
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Pub Dt:
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12/27/2007
| | | | |
Title:
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INTEGRATED CIRCUIT DESIGN SYSTEM
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Patent #:
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Issue Dt:
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04/21/2009
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11477664
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Filing Dt:
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06/30/2006
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Pub Dt:
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01/18/2007
| | | | |
Title:
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METHOD OF PREPARING AN EXTENED CONJUGATED MOLECULAR ASSEMBLY
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Patent #:
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Issue Dt:
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06/08/2010
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11478695
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06/30/2006
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Pub Dt:
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01/03/2008
| | | | |
Title:
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APPARATUS AND METHOD FOR WIRELESS NETWORK PARAMETER LOGGING AND REPORTING WITHIN A PORTABLE DEVICE HAVING WIRELESS COMMUNICATION FUNCTIONALITY
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Patent #:
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Issue Dt:
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04/27/2010
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11478901
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Filing Dt:
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06/30/2006
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Title:
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INTEGRATED CIRCUIT HAVING AFTER MARKET MODIFIABLE PERFORMANCE
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Patent #:
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Issue Dt:
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05/11/2010
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11479485
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Filing Dt:
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06/30/2006
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Pub Dt:
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01/03/2008
| | | | |
Title:
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METHOD AND APPARATUS FOR AUTOMATIC UNCERTAINTY-BASED MANAGEMENT FEEDBACK CONTROLLER
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Patent #:
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Issue Dt:
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01/06/2009
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11481120
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Filing Dt:
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07/05/2006
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Pub Dt:
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11/09/2006
| | | | |
Title:
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CONCURRENT FIN-FET AND THICK BODY DEVICE FABRICATION
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Issue Dt:
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10/13/2009
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Application #:
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11481514
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Filing Dt:
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07/06/2006
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Pub Dt:
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11/30/2006
| | | | |
Title:
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TRENCH TYPE BURIED ON-CHIP PRECISION PROGRAMMABLE RESISTOR
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Issue Dt:
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01/01/2008
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11481525
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Filing Dt:
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07/06/2006
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Pub Dt:
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11/09/2006
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Title:
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METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
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Issue Dt:
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10/28/2008
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11481532
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Filing Dt:
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07/06/2006
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Pub Dt:
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11/09/2006
| | | | |
Title:
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NITRIDE-ENCAPSULATED FET (NNCFET)
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Issue Dt:
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07/19/2011
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11482688
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07/07/2006
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Pub Dt:
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12/28/2006
| | | | |
Title:
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METHOD OF FORMING A HIGH IMPEDANCE ANTIFUSE
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Issue Dt:
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05/15/2007
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11485390
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Filing Dt:
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07/13/2006
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Title:
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INTEGRATED CMOS SPECTRUM ANALYZER FOR ON-CHIP DIAGNOSTICS USING DIGITAL AUTOCORRELATION OF COARSELY QUANTIZED SIGNALS
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Patent #:
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Issue Dt:
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08/10/2010
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11490248
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07/21/2006
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Pub Dt:
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07/08/2010
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Title:
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COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF
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Issue Dt:
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03/25/2008
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11491216
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Filing Dt:
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07/21/2006
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Pub Dt:
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12/28/2006
| | | | |
Title:
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PACKAGING RELIABILITY SUPER CHIPS
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Patent #:
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Issue Dt:
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03/24/2009
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11491635
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Filing Dt:
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07/24/2006
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Pub Dt:
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11/16/2006
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Title:
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SYSTEM AND METHOD FOR IDENTIFYING EMPTY LOCATIONS IN A SCRAMBLED MEMORY
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11491701
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Filing Dt:
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07/24/2006
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Publication #:
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Pub Dt:
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11/16/2006
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Title:
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HIGH SPEED LATCH CIRCUITS USING GATED DIODES
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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11492271
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Filing Dt:
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07/25/2006
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Pub Dt:
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12/07/2006
| | | | |
Title:
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STRAINED SILICON CMOS ON HYBRID CRYSTAL ORIENTATIONS
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Patent #:
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Issue Dt:
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10/23/2007
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Application #:
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11492455
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Filing Dt:
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07/25/2006
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Pub Dt:
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11/23/2006
| | | | |
Title:
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METHOD OF FABRICATING STRAINED CHANNEL FIELD EFFECT TRANSISTOR PAIR HAVING UNDERLAPPED DUAL LINERS
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