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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/16/2007
Application #:
11437084
Filing Dt:
05/19/2006
Publication #:
Pub Dt:
12/21/2006
Title:
THERMAL INTERFACE WITH A PATTERNED STRUCTURE
2
Patent #:
Issue Dt:
02/03/2009
Application #:
11437312
Filing Dt:
05/19/2006
Title:
METHOD FOR INCREASING MANUFACTURABILITY OF A CIRCUIT LAYOUT
3
Patent #:
Issue Dt:
01/04/2011
Application #:
11438248
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
11/23/2006
Title:
MATERIALS AND METHODS FOR IMMOBILIZATION OF CATALYSTS ON SURFACES AND FOR SELECTIVE ELECTROLESS METALLIZATION
4
Patent #:
Issue Dt:
07/29/2008
Application #:
11439016
Filing Dt:
05/23/2006
Publication #:
Pub Dt:
11/29/2007
Title:
QUAD FLAT NO-LEAD CHIP CARRIER WITH STAND-OFF
5
Patent #:
Issue Dt:
02/17/2009
Application #:
11440202
Filing Dt:
05/24/2006
Publication #:
Pub Dt:
11/29/2007
Title:
METHOD AND STRUCTURE FOR REDUCING CONTACT RESISTANCE BETWEEN SILICIDE CONTACT AND OVERLYING METALLIZATION
6
Patent #:
Issue Dt:
01/06/2009
Application #:
11443394
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
12/06/2007
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES HAVING HIGH-Q WAFER BACK-SIDE CAPACITORS
7
Patent #:
Issue Dt:
05/12/2009
Application #:
11445326
Filing Dt:
06/02/2006
Publication #:
Pub Dt:
12/06/2007
Title:
RADIATION SENSITIVE SELF-ASSEMBLED MONOLAYERS AND USES THEREOF
8
Patent #:
Issue Dt:
08/07/2007
Application #:
11445345
Filing Dt:
06/02/2006
Publication #:
Pub Dt:
12/14/2006
Title:
LOW-POWER MULTIPLE-CHANNEL FULLY DEPLETED QUANTUM WELL CMOSFETS
9
Patent #:
Issue Dt:
11/06/2007
Application #:
11446358
Filing Dt:
06/05/2006
Publication #:
Pub Dt:
10/19/2006
Title:
LOW TEMPERATURE MELT-PROCESSING OF ORGANIC-INORGANIC HYBRID
10
Patent #:
Issue Dt:
08/09/2011
Application #:
11446426
Filing Dt:
06/05/2006
Publication #:
Pub Dt:
12/20/2007
Title:
CUSTOMIZABLE SYSTEM FOR THE AUTOMATIC GATHERING OF SOFTWARE SERVICE INFORMATION
11
Patent #:
Issue Dt:
05/13/2014
Application #:
11448788
Filing Dt:
06/08/2006
Publication #:
Pub Dt:
12/13/2007
Title:
COPPER INTERCONNECTS WITH IMPROVED ELECTROMIGRATION LIFETIME
12
Patent #:
Issue Dt:
06/23/2009
Application #:
11450258
Filing Dt:
06/09/2006
Publication #:
Pub Dt:
12/28/2006
Title:
OPTICALLY CONNECTABLE CIRCUIT BOARD WITH OPTICAL COMPONENT(S) MOUNTED THEREON
13
Patent #:
Issue Dt:
01/03/2012
Application #:
11450583
Filing Dt:
06/12/2006
Publication #:
Pub Dt:
12/13/2007
Title:
HIGH PERFORMANCE RESONANT ELEMENT
14
Patent #:
Issue Dt:
10/06/2009
Application #:
11451869
Filing Dt:
06/13/2006
Publication #:
Pub Dt:
12/13/2007
Title:
HIGH PERFORMANCE CMOS DEVICES COMPRISING GAPPED DUAL STRESSORS WITH DIELECTRIC GAP FILLERS, AND METHODS OF FABRICATING THE SAME
15
Patent #:
Issue Dt:
05/19/2009
Application #:
11452741
Filing Dt:
06/14/2006
Publication #:
Pub Dt:
12/27/2007
Title:
MAGNETIC TUNNEL JUNCTION WITH ENHANCED MAGNETIC SWITCHING CHARACTERISTICS
16
Patent #:
Issue Dt:
02/22/2011
Application #:
11456326
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
01/10/2008
Title:
STACKING FAULT REDUCTION IN EPITAXIALLY GROWN SILICON
17
Patent #:
Issue Dt:
11/25/2008
Application #:
11456351
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
10/23/2008
Title:
LOW PASS METAL POWDER FILTER
18
Patent #:
Issue Dt:
07/08/2008
Application #:
11456721
Filing Dt:
07/11/2006
Publication #:
Pub Dt:
01/17/2008
Title:
INTERCONNECT STRUCTURE WITH DIELECTRIC AIR GAPS
19
Patent #:
Issue Dt:
05/25/2010
Application #:
11457477
Filing Dt:
07/14/2006
Publication #:
Pub Dt:
01/31/2008
Title:
SELF-REFERENCED MATCH-LINE SENSE AMPLIFIER FOR CONTENT ADDRESSABLE MEMORIES
20
Patent #:
Issue Dt:
11/04/2008
Application #:
11457495
Filing Dt:
07/14/2006
Publication #:
Pub Dt:
01/17/2008
Title:
SLEW CONSTRAINED MINIMUM COST BUFFERING
21
Patent #:
Issue Dt:
08/26/2008
Application #:
11457637
Filing Dt:
07/14/2006
Publication #:
Pub Dt:
01/17/2008
Title:
DUTY CYCLE CORRECTION CIRCUIT WHOSE OPERATION IS LARGELY INDEPENDENT OF OPERATING VOLTAGE AND PROCESS
22
Patent #:
Issue Dt:
06/17/2008
Application #:
11458120
Filing Dt:
07/18/2006
Publication #:
Pub Dt:
12/07/2006
Title:
METHOD OF FABRICATING A BOTTLE TRENCH AND A BOTTLE TRENCH CAPACITOR
23
Patent #:
Issue Dt:
07/20/2010
Application #:
11458161
Filing Dt:
07/18/2006
Publication #:
Pub Dt:
11/02/2006
Title:
METHOD AND APPARATUS FOR REPAIR OF REFLECTIVE PHOTOMASKS
24
Patent #:
Issue Dt:
05/06/2008
Application #:
11458250
Filing Dt:
07/18/2006
Publication #:
Pub Dt:
11/16/2006
Title:
FINFET TRANSISTOR AND CIRCUIT
25
Patent #:
Issue Dt:
06/02/2009
Application #:
11458616
Filing Dt:
07/19/2006
Publication #:
Pub Dt:
05/29/2008
Title:
VIRTUAL POWER RAILS FOR INTEGRATED CIRCUITS
26
Patent #:
Issue Dt:
07/29/2008
Application #:
11458712
Filing Dt:
07/20/2006
Publication #:
Pub Dt:
01/24/2008
Title:
DIFFERENTIAL AMPLIFIER AND METHOD
27
Patent #:
Issue Dt:
01/06/2009
Application #:
11458726
Filing Dt:
07/20/2006
Publication #:
Pub Dt:
12/28/2006
Title:
METHOD FOR MAKING INTEGRATED CIRCUIT CHIP HAVING CARBON NANOTUBE COMPOSITE INTERCONNECTION VIAS
28
Patent #:
Issue Dt:
05/18/2010
Application #:
11459316
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
01/24/2008
Title:
SOI DEVICE AND METHOD FOR ITS FABRICATION
29
Patent #:
Issue Dt:
06/03/2008
Application #:
11459367
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
01/24/2008
Title:
A SYSTEM FOR ACQUIRING DEVICE PARAMETERS
30
Patent #:
Issue Dt:
03/18/2008
Application #:
11459968
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
01/31/2008
Title:
COMPUTER SYSTEM HAVING DAISY CHAINED SELF TIMED MEMORY CHIPS
31
Patent #:
Issue Dt:
03/11/2008
Application #:
11459994
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
02/07/2008
Title:
DAISY CHAINABLE MEMORY CHIP
32
Patent #:
Issue Dt:
12/30/2008
Application #:
11460010
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
01/31/2008
Title:
SEMICONDUCTOR STRUCTURE WITH SELF-ALIGNED DEVICE CONTACTS
33
Patent #:
Issue Dt:
01/27/2009
Application #:
11460011
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
01/31/2008
Title:
INTERCONNECT STRUCTURE FOR BEOL APPLICATIONS
34
Patent #:
Issue Dt:
07/01/2008
Application #:
11460013
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
05/29/2008
Title:
SELF-ALIGNMENT SCHEME FOR A HETEROJUNCTION BIPOLAR TRANSISTOR
35
Patent #:
Issue Dt:
12/11/2007
Application #:
11460464
Filing Dt:
07/27/2006
Title:
APPARATUS AND METHOD FOR IMPROVING SENSING MARGIN OF ELECTRICALLY PROGRAMMABLE FUSES
36
Patent #:
Issue Dt:
01/20/2009
Application #:
11460537
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
02/01/2007
Title:
MULTIPLE VOLTAGE INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR
37
Patent #:
Issue Dt:
10/04/2011
Application #:
11460751
Filing Dt:
07/28/2006
Publication #:
Pub Dt:
01/31/2008
Title:
SCAN TESTING IN SINGLE-CHIP MULTICORE SYSTEMS
38
Patent #:
Issue Dt:
02/10/2009
Application #:
11461137
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
INTERCONNECT STRUCTURE AND PROCESS OF MAKING THE SAME
39
Patent #:
Issue Dt:
12/30/2008
Application #:
11461208
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
SOLDER CONNECTOR STRUCTURE AND METHOD
40
Patent #:
Issue Dt:
05/27/2008
Application #:
11461220
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
11/23/2006
Title:
A METHOD OF FORMING AN INTERCONNECT STRUCTURE DIFFUSION BARRIER WITH HIGH NITROGEN CONTENT
41
Patent #:
Issue Dt:
08/19/2014
Application #:
11461428
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
MEMORY CELL SYSTEM WITH MULTIPLE NITRIDE LAYERS
42
Patent #:
Issue Dt:
07/08/2008
Application #:
11461469
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD FOR PERFORMING VERIFICATION OF LOGIC CIRCUITS
43
Patent #:
Issue Dt:
01/27/2009
Application #:
11461960
Filing Dt:
08/02/2006
Publication #:
Pub Dt:
02/07/2008
Title:
DOUBLE-SIDED WAFFLE PACK
44
Patent #:
Issue Dt:
07/29/2008
Application #:
11462124
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
05/29/2008
Title:
PREVENTION OF BACKSIDE CRACKS IN SEMICONDUCTOR CHIPS OR WAFERS USING BACKSIDE FILM OR BACKSIDE WET ETCH
45
Patent #:
Issue Dt:
12/07/2010
Application #:
11462648
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
11/30/2006
Title:
HIGH PERFORMANCE STRAINED CMOS DEVICES
46
Patent #:
Issue Dt:
05/27/2008
Application #:
11463039
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
08/23/2007
Title:
GATE STACKS
47
Patent #:
Issue Dt:
07/29/2008
Application #:
11463269
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
02/14/2008
Title:
APPARATUS, SYSTEM, AND METHOD FOR INCREMENTAL ENCODING CONVERSION OF XML DATA USING JAVA
48
Patent #:
Issue Dt:
01/08/2008
Application #:
11463348
Filing Dt:
08/09/2006
Publication #:
Pub Dt:
12/28/2006
Title:
CHIP DICING
49
Patent #:
Issue Dt:
10/14/2008
Application #:
11463640
Filing Dt:
08/10/2006
Publication #:
Pub Dt:
02/14/2008
Title:
STRAINED MOSFETS ON SEPARATED SILICON LAYERS
50
Patent #:
Issue Dt:
11/11/2008
Application #:
11463917
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/14/2008
Title:
CONFIGURABLE SRAM SYSTEM AND METHOD
51
Patent #:
Issue Dt:
10/28/2008
Application #:
11464009
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
04/05/2007
Title:
FACILITATING SIMULATION OF A MODEL WITHIN A DISTRIBUTED ENVIRONMENT
52
Patent #:
Issue Dt:
10/21/2008
Application #:
11464090
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD FOR FABRICATING STRESS ENHANCED MOS CIRCUITS
53
Patent #:
Issue Dt:
01/31/2012
Application #:
11464664
Filing Dt:
08/15/2006
Publication #:
Pub Dt:
05/29/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH CARBON AND NON-CARBON SILICON
54
Patent #:
Issue Dt:
09/25/2007
Application #:
11464959
Filing Dt:
08/16/2006
Publication #:
Pub Dt:
12/14/2006
Title:
COMPLIANT PASSIVATED EDGE SEAL FOR LOW-K INTERCONNECT STRUCTURES
55
Patent #:
Issue Dt:
11/02/2010
Application #:
11465176
Filing Dt:
08/17/2006
Publication #:
Pub Dt:
02/21/2008
Title:
SOLUTION FOR FORMING POLISHING SLURRY, POLISHING SLURRY AND RELATED METHODS
56
Patent #:
Issue Dt:
04/19/2011
Application #:
11465473
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
SYSTEM AND METHOD OF AUTOMATED WIRE AND VIA LAYOUT OPTIMIZATION DESCRIPTION
57
Patent #:
Issue Dt:
07/06/2010
Application #:
11465639
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
SYSTEM AND METHOD FOR SWITCHING DIGITAL CIRCUIT CLOCK NET DRIVER WITHOUT LOSING CLOCK PULSES
58
Patent #:
Issue Dt:
09/07/2010
Application #:
11465663
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
12/14/2006
Title:
METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
59
Patent #:
Issue Dt:
02/03/2009
Application #:
11466120
Filing Dt:
08/22/2006
Publication #:
Pub Dt:
12/07/2006
Title:
METHOD, SYSTEM AND STORAGE MEDIUM FOR DETERMINING CIRCUIT PLACEMENT
60
Patent #:
Issue Dt:
07/15/2008
Application #:
11466572
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
05/03/2007
Title:
EMBEDDED STRAIN LAYER IN THIN SOI TRANSISTORS AND A METHOD OF FORMING THE SAME
61
Patent #:
Issue Dt:
02/26/2008
Application #:
11466754
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
12/14/2006
Title:
SINGLE SUPPLY LEVEL CONVERTER
62
Patent #:
Issue Dt:
07/01/2008
Application #:
11467294
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
02/28/2008
Title:
HEAT-SHIELDED LOW POWER PCM-BASED REPROGRAMMABLE EFUSE DEVICE
63
Patent #:
Issue Dt:
12/09/2008
Application #:
11467446
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
12/21/2006
Title:
METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
64
Patent #:
Issue Dt:
05/01/2012
Application #:
11467493
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
05/29/2008
Title:
VERIFICATION OF A PROGRAM PARTITIONED ACCORDING TO THE CONTROL FLOW INFORMATION OF THE PROGRAM
65
Patent #:
Issue Dt:
05/13/2008
Application #:
11467593
Filing Dt:
08/28/2006
Publication #:
Pub Dt:
01/04/2007
Title:
IMPROVED HDP-BASED ILD CAPPING LAYER
66
Patent #:
Issue Dt:
07/14/2009
Application #:
11467712
Filing Dt:
08/28/2006
Publication #:
Pub Dt:
02/28/2008
Title:
EMBEDDED INTERCONNECTS, AND METHODS FOR FORMING SAME
67
Patent #:
Issue Dt:
04/19/2011
Application #:
11467862
Filing Dt:
08/28/2006
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD OF STEP-AND-FLASH IMPRINT LITHOGRAPHY
68
Patent #:
Issue Dt:
08/19/2008
Application #:
11468030
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
12/28/2006
Title:
YIELD IMPROVEMENT IN SILICON-GERMANIUM EPITAXIAL GROWTH
69
Patent #:
Issue Dt:
10/19/2010
Application #:
11468068
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
DEVICE STRUCTURES INCLUDING BACKSIDE CONTACTS, AND METHODS FOR FORMING SAME
70
Patent #:
Issue Dt:
11/04/2008
Application #:
11468078
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD, SYSTEM, AND PROGRAM PRODUCT FOR AUTOMATED VERIFICATION OF GATING LOGIC USING FORMAL VERIFICATION
71
Patent #:
Issue Dt:
03/22/2011
Application #:
11468089
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
FLUIDIC TEST APPARATUS AND METHOD
72
Patent #:
Issue Dt:
12/09/2008
Application #:
11468402
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD AND STRUCTURE FOR IMPROVING DEVICE PERFORMANCE VARIATION IN DUAL STRESS LINER TECHNOLOGY
73
Patent #:
Issue Dt:
06/17/2014
Application #:
11468403
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
05/29/2008
Title:
SEMICONDUCTOR STRUCTURE HAVING UNDERCUT-GATE-OXIDE GATE STACK ENCLOSED BY PROTECTIVE BARRIER MATERIAL
74
Patent #:
Issue Dt:
10/21/2008
Application #:
11469039
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
04/12/2007
Title:
SOI DEVICE WITH DIFFERENT CRYSTALLOGRAPHIC ORIENTATIONS
75
Patent #:
Issue Dt:
05/13/2008
Application #:
11469206
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
03/06/2008
Title:
TRANSISTOR GATE SHAPE METROLOGY USING MULTIPLE DATA SOURCES
76
Patent #:
Issue Dt:
07/22/2008
Application #:
11469423
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
04/05/2007
Title:
PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP
77
Patent #:
Issue Dt:
02/01/2011
Application #:
11469578
Filing Dt:
09/01/2006
Publication #:
Pub Dt:
03/20/2008
Title:
STATIC PULSED BUS CIRCUIT AND METHOD HAVING DYNAMIC POWER SUPPLY RAIL SELECTION
78
Patent #:
Issue Dt:
11/03/2009
Application #:
11470024
Filing Dt:
09/05/2006
Publication #:
Pub Dt:
05/31/2007
Title:
TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS
79
Patent #:
Issue Dt:
08/05/2008
Application #:
11470349
Filing Dt:
09/06/2006
Publication #:
Pub Dt:
03/06/2008
Title:
LOW RESISTANCE CONTACT STRUCTURE AND FABRICATION THEREOF
80
Patent #:
Issue Dt:
08/18/2009
Application #:
11470809
Filing Dt:
09/07/2006
Publication #:
Pub Dt:
03/13/2008
Title:
DEEP TRENCH CAPACITOR THROUGH SOI SUBSTRATE AND METHODS OF FORMING
81
Patent #:
Issue Dt:
10/19/2010
Application #:
11473338
Filing Dt:
06/23/2006
Publication #:
Pub Dt:
01/10/2008
Title:
GRADED SPIN-ON ORGANIC ANTIREFLECTIVE COATING FOR PHOTOLITHOGRAPHY
82
Patent #:
Issue Dt:
12/02/2008
Application #:
11473757
Filing Dt:
06/23/2006
Publication #:
Pub Dt:
10/26/2006
Title:
ULTRA THIN BODY FULLY-DEPLETED SOI MOSFETS
83
Patent #:
Issue Dt:
10/12/2010
Application #:
11474678
Filing Dt:
06/26/2006
Publication #:
Pub Dt:
12/27/2007
Title:
METHOD FOR HIGH DENSITY DATA STORAGE AND READ-BACK
84
Patent #:
Issue Dt:
11/11/2008
Application #:
11475675
Filing Dt:
06/26/2006
Publication #:
Pub Dt:
12/27/2007
Title:
INTEGRATED CIRCUIT DESIGN SYSTEM
85
Patent #:
Issue Dt:
04/21/2009
Application #:
11477664
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/18/2007
Title:
METHOD OF PREPARING AN EXTENED CONJUGATED MOLECULAR ASSEMBLY
86
Patent #:
Issue Dt:
06/08/2010
Application #:
11478695
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
APPARATUS AND METHOD FOR WIRELESS NETWORK PARAMETER LOGGING AND REPORTING WITHIN A PORTABLE DEVICE HAVING WIRELESS COMMUNICATION FUNCTIONALITY
87
Patent #:
Issue Dt:
04/27/2010
Application #:
11478901
Filing Dt:
06/30/2006
Title:
INTEGRATED CIRCUIT HAVING AFTER MARKET MODIFIABLE PERFORMANCE
88
Patent #:
Issue Dt:
05/11/2010
Application #:
11479485
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
METHOD AND APPARATUS FOR AUTOMATIC UNCERTAINTY-BASED MANAGEMENT FEEDBACK CONTROLLER
89
Patent #:
Issue Dt:
01/06/2009
Application #:
11481120
Filing Dt:
07/05/2006
Publication #:
Pub Dt:
11/09/2006
Title:
CONCURRENT FIN-FET AND THICK BODY DEVICE FABRICATION
90
Patent #:
Issue Dt:
10/13/2009
Application #:
11481514
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/30/2006
Title:
TRENCH TYPE BURIED ON-CHIP PRECISION PROGRAMMABLE RESISTOR
91
Patent #:
Issue Dt:
01/01/2008
Application #:
11481525
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
92
Patent #:
Issue Dt:
10/28/2008
Application #:
11481532
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/09/2006
Title:
NITRIDE-ENCAPSULATED FET (NNCFET)
93
Patent #:
Issue Dt:
07/19/2011
Application #:
11482688
Filing Dt:
07/07/2006
Publication #:
Pub Dt:
12/28/2006
Title:
METHOD OF FORMING A HIGH IMPEDANCE ANTIFUSE
94
Patent #:
Issue Dt:
05/15/2007
Application #:
11485390
Filing Dt:
07/13/2006
Title:
INTEGRATED CMOS SPECTRUM ANALYZER FOR ON-CHIP DIAGNOSTICS USING DIGITAL AUTOCORRELATION OF COARSELY QUANTIZED SIGNALS
95
Patent #:
Issue Dt:
08/10/2010
Application #:
11490248
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
07/08/2010
Title:
COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF
96
Patent #:
Issue Dt:
03/25/2008
Application #:
11491216
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
12/28/2006
Title:
PACKAGING RELIABILITY SUPER CHIPS
97
Patent #:
Issue Dt:
03/24/2009
Application #:
11491635
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
11/16/2006
Title:
SYSTEM AND METHOD FOR IDENTIFYING EMPTY LOCATIONS IN A SCRAMBLED MEMORY
98
Patent #:
Issue Dt:
07/10/2007
Application #:
11491701
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
11/16/2006
Title:
HIGH SPEED LATCH CIRCUITS USING GATED DIODES
99
Patent #:
Issue Dt:
07/22/2008
Application #:
11492271
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
12/07/2006
Title:
STRAINED SILICON CMOS ON HYBRID CRYSTAL ORIENTATIONS
100
Patent #:
Issue Dt:
10/23/2007
Application #:
11492455
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
11/23/2006
Title:
METHOD OF FABRICATING STRAINED CHANNEL FIELD EFFECT TRANSISTOR PAIR HAVING UNDERLAPPED DUAL LINERS
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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