|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11623185
|
Filing Dt:
|
01/15/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
LEVEL-SHIFTING DIFFERENTIAL AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
11623372
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
TEST STRUCTURE FOR MONITORING LEAKAGE CURRENTS IN A METALLIZATION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11623434
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
MULTI-PORT DYNAMIC MEMORY STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11623500
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
ADDRESS TRANSLATION FOR INPUT/OUTPUT (I/O) DEVICES AND INTERRUPT REMAPPING FOR I/O DEVICES IN AN I/O MEMORY MANAGEMENT UNIT (IOMMU)
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
11623541
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
GRAPH-BASED PATTERN MATCHING IN L3GO DESIGNS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11623619
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR DETERMINING UTILIZATION OF PROCESS TOOLS IN A MANUFACTURING ENVIRONMENT BASED ON CHARACTERISTICS OF AN AUTOMATED MATERIAL HANDLING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11623626
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
VIRTUALIZING AN IOMMU
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11623820
|
Filing Dt:
|
01/17/2007
|
Title:
|
METHOD FOR MODIFYING AN ELECTRICAL CONNECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11623882
|
Filing Dt:
|
01/17/2007
|
Title:
|
PRE-EPITAXIAL DISPOSABLE SPACER INTEGRATION SCHEME WITH VERY LOW TEMPERATURE SELECTIVE EPITAXY FOR ENHANCED DEVICE PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
11624235
|
Filing Dt:
|
01/18/2007
|
Publication #:
|
|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
ENHANCED QUALITY OF LASER ABLATION BY CONTROLLING LASER REPETITION RATE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11624436
|
Filing Dt:
|
01/18/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
CHIP CARRIER SUBSTRATE CAPACITOR AND METHOD FOR FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11624990
|
Filing Dt:
|
01/19/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
METHOD FOR THE SEMI-AUTOMATIC EDITING OF TIMED AND ANNOTATED DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
11625190
|
Filing Dt:
|
01/19/2007
|
Title:
|
METHODS FOR FORMING SMALL CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2011
|
Application #:
|
11625576
|
Filing Dt:
|
01/22/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
HYBRID INTERCONNECT STRUCTURE FOR PERFORMANCE IMPROVEMENT AND RELIABILITY ENHANCEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2010
|
Application #:
|
11625839
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
07/23/2009
| | | | |
Title:
|
METHOD FOR FORMING AND ALIGNING CHEMICALLY MEDIATED DISPERSION OF MAGNETIC NANOPARTICLES IN A POLYMER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
11625883
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
MIM CAPACITOR AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
11626360
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
METHODS FOR REMOVING PHOTORESIST FROM SEMICONDUCTOR STRUCTURES HAVING HIGH-K DIELECTRIC MATERIAL LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2010
|
Application #:
|
11626548
|
Filing Dt:
|
01/24/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
AIR GAP UNDER ON-CHIP PASSIVE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
11626550
|
Filing Dt:
|
01/24/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
MECHANICALLY ROBUST METAL/LOW-K INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
11626915
|
Filing Dt:
|
01/25/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
EFFICIENT METHODOLOGY FOR THE ACCURATE GENERATION OF CUSTOMIZED COMPACT MODEL PARAMETERS FROM ELECTRICAL TEST DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
11626967
|
Filing Dt:
|
01/25/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
SYSTEM AND METHOD FOR DEVELOPING EMBEDDED SOFTWARE IN-SITU
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
11627430
|
Filing Dt:
|
01/26/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
COMPLIANT PENETRATING PACKAGING INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
11627494
|
Filing Dt:
|
01/26/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
MULTI-ANODE SYSTEM FOR UNIFORM PLATING OF ALLOYS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11627653
|
Filing Dt:
|
01/26/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
TWO-SIDED SEMICONDUCTOR-ON-INSULATOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
11627723
|
Filing Dt:
|
01/26/2007
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
ELECTRONICALLY PROGRAMMABLE ANTIFUSE AND CIRCUITS MADE THEREWITH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
11627824
|
Filing Dt:
|
01/26/2007
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
ROBUST SELF-ALIGNED PROCESS FOR SUB-65NM CURRENT-PERPENDICULAR JUNCTION PILLARS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
11636336
|
Filing Dt:
|
12/08/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
METHOD FOR ROBUST STATISTICAL SEMICONDUCTOR DEVICE MODELING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
11639865
|
Filing Dt:
|
12/15/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
SENSING DEVICE FOR FLOATING BODY CELL MEMORY AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
11641647
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
Method of depositing copper using physical vapor deposition
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
11646053
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
EUV PELLICLE AND METHOD FOR FABRICATING SEMICONDUCTOR DIES USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
11649041
|
Filing Dt:
|
01/03/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
HEAT TRANSFER DEVICE IN A ROTATING STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2010
|
Application #:
|
11650883
|
Filing Dt:
|
01/08/2007
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
SILICON BASED PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
11653975
|
Filing Dt:
|
01/17/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
Live connection enhancement for data source interface
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
11655534
|
Filing Dt:
|
01/19/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
METHOD FOR QUALITY ASSURED SEMICONDUCTOR DEVICE MODELING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
11657000
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
PREVENTION AND CONTROL OF INTERMETALLIC ALLOY INCLUSIONS THAT FORM DURING REFLOW OF PB FREE, SN RICH, SOLDERS IN CONTACTS IN MICROELECTRONIC PACKAGING IN INTEGRATED CIRCUIT CONTACT STRUCTURES WHERE ELECTROLESS NI(P) METALLIZATION IS PRESENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11657154
|
Filing Dt:
|
01/24/2007
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
METHOD OF APPLYING STRESSES TO PFET AND NFET TRANSISTOR CHANNELS FOR IMPROVED PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11668224
|
Filing Dt:
|
01/29/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
FABRICATION OF PHASE CHANGE MEMORY ELEMENT WITH PHASE-CHANGE ELECTRODES USING CONFORMAL DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
11668542
|
Filing Dt:
|
01/30/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
PRINT EVENTS IN THE SIMULATION OF A DIGITAL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
11668731
|
Filing Dt:
|
01/30/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR PRODUCT RANDOMIZATION AND ANALYSIS IN A MANUFACTURING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11669175
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
PELLICLE FILM OPTIMIZED FOR IMMERSION LITHOGRAPHY SYSTEMS WITH NA>1
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
11669179
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR INTELLIGENT AUTOMATED RETICLE MANAGMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11669250
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
ELECTRONIC CIRCUIT FOR MEASUREMENT OF TRANSISTOR VARIABILITY AND THE LIKE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11669389
|
Filing Dt:
|
01/31/2007
|
Title:
|
METHODS FOR FABRICATING DEVICE FEATURES HAVING SMALL DIMENSIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2010
|
Application #:
|
11669401
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
METHODS FOR FABRICATING LOW CONTACT RESISTANCE CMOS CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
11669496
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
METHOD FOR FORMING AN INDIUM CAP LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/2009
|
Application #:
|
11669902
|
Filing Dt:
|
01/31/2007
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
STRAINED MOS DEVICES USING SOURCE/DRAIN EPITAXY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
11670017
|
Filing Dt:
|
02/01/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR USING DIRECT MEMORY ACCESS TO INITIALIZE A PROGRAMMABLE LOGIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
11670080
|
Filing Dt:
|
02/01/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
REDUCED FRICTION MOLDS FOR INJECTION MOLDED SOLDER PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
11670537
|
Filing Dt:
|
02/02/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
FLEXIBLE MULTIMODE LOGIC ELEMENT FOR USE IN A CONFIGURABLE MIXED-LOGIC SIGNAL DISTRIBUTION PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
11670621
|
Filing Dt:
|
02/02/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR CONTROLLING POSITION OF CHARGED POLYMER INSIDE NANOPORE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11670778
|
Filing Dt:
|
02/02/2007
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
METHODS OF FORMING LOW-K DIELECTRIC LAYERS CONTAINING CARBON NANOSTRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11671599
|
Filing Dt:
|
02/06/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT FAILURE PREDICTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2009
|
Application #:
|
11671795
|
Filing Dt:
|
02/06/2007
|
Publication #:
|
|
Pub Dt:
|
06/14/2007
| | | | |
Title:
|
METHOD AND STRUCTURE TO CREATE MULTIPLE DEVICE WIDTHS IN FINFET TECHNOLOGY IN BOTH BULK AND SOI
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11672109
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE INCLUDING DOPED SILICON CARBON LINER LAYER AND METHOD FOR FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11672110
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
PROGRAMMABLE FUSE/NON-VOLATILE MEMORY STRUCTURES USING EXTERNALLY HEATED PHASE CHANGE MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
11672146
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
TEST STRUCTURE FOR DETERMINING CHARACTERISTICS OF SEMICONDUCTOR ALLOYS IN SOI TRANSISTORS BY X-RAY DIFFRACTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
11672217
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
METHOD, SYSTEM, PROGRAM PRODUCT FOR BONDING TWO CIRCUITRY-INCLUDING SUBSTRATES AND RELATED STAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11672251
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
SILICON-ON-INSULATOR (SOI) READ ONLY MEMORY (ROM) ARRAY AND METHOD OF MAKING A SOI ROM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11672309
|
Filing Dt:
|
02/07/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
METHODS AND APPARATUS FOR CALIBRATING OUTPUT VOLTAGE LEVELS ASSOCIATED WITH CURRENT-INTEGRATING SUMMING AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11672737
|
Filing Dt:
|
02/08/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
AUTOMATIC STATIC PHASE ERROR AND JITTER COMPENSATION IN PLL CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2009
|
Application #:
|
11673276
|
Filing Dt:
|
02/09/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
METHOD FOR INTEGRATING LINER FORMATION IN BACK END OF LINE PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11673298
|
Filing Dt:
|
02/09/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
SYSTEM AND METHOD FOR GENERATING CONSTRAINT PRESERVING TESTCASES IN THE PRESENCE OF DEAD-END CONSTRAINTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
|
Application #:
|
11673369
|
Filing Dt:
|
02/09/2007
|
Publication #:
|
|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
NON-DESTRUCTIVE EVALUATION OF MICROSTRUCTURE AND INTERFACE ROUGHNESS OF ELECTRICALLY CONDUCTING LINES IN SEMICONDUCTOR INTEGRATED CIRCUITS IN DEEP SUB-MICRON REGIME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11673901
|
Filing Dt:
|
02/12/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
METAL GATES WITH LOW CHARGE TRAPPING AND ENHANCED DIELECTRIC RELIABILITY CHARACTERISTICS FOR HIGH-K GATE DIELECTRIC STACKS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
11674292
|
Filing Dt:
|
02/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
SINGLE-ENDED MEMORY CELL WITH IMPROVED READ STABILITY AND MEMORY USING THE CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
11674362
|
Filing Dt:
|
02/13/2007
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
DRAIN/SOURCE EXTENSION STRUCTURE OF A FIELD EFFECT TRANSISTOR WITH REDUCED BORON DIFFUSION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11674566
|
Filing Dt:
|
02/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
REDIRECT RECOVERY CACHE THAT RECEIVES BRANCH MISPREDICTION REDIRECTS AND CACHES INSTRUCTIONS TO BE DISPATCHED IN RESPONSE TO THE REDIRECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
11674598
|
Filing Dt:
|
02/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
METHODOLOGIES AND ANALYTICS TOOLS FOR IDENTIFYING WHITE SPACE OPPORTUNITIES IN A GIVEN INDUSTRY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2010
|
Application #:
|
11674713
|
Filing Dt:
|
02/14/2007
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
TRANSISTOR HAVING A CHANNEL WITH BIAXIAL STRAIN INDUCED BY SILICON/GERMANIUM IN THE GATE ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2011
|
Application #:
|
11675445
|
Filing Dt:
|
02/15/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR MANUFACTURING ELECTRONIC INTEGRATED CIRCUIT CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11676030
|
Filing Dt:
|
02/16/2007
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
Title:
|
SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
11676674
|
Filing Dt:
|
02/20/2007
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
Title:
|
SYSTEM AND METHOD FOR PLASMA INDUCED MODIFICATION AND IMPROVEMENT OF CRITICAL DIMENSION UNIFORMITY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11676853
|
Filing Dt:
|
02/20/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
METHOD AND SYSTEM FOR DETECTING SYNCHRONIZATION ERRORS IN PROGRAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
11677207
|
Filing Dt:
|
02/21/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE INCLUDING GATE ELECTRODE HAVING LATERALLY VARIABLE WORK FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11677652
|
Filing Dt:
|
02/22/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
SEQUENTIAL ENCODING FOR RELATIONAL ANALYSIS (SERA) OF A SOFTWARE MODEL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
11678089
|
Filing Dt:
|
02/23/2007
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
RECYCLING OF ELECTROCHEMICAL-MECHANICAL PLANARIZATION (ECMP) SLURRIES/ELECTROLYTES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2011
|
Application #:
|
11678163
|
Filing Dt:
|
02/23/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
VARIABLE FILL AND CHEESE FOR MITIGATION OF BEOL TOPOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
11678338
|
Filing Dt:
|
02/23/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
LOW-TEMPERATURE ELECTRICALLY ACTIVATED GATE ELECTRODE AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11679242
|
Filing Dt:
|
02/27/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
OVER TEMPERATURE DETECTION APPARATUS AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11679247
|
Filing Dt:
|
02/27/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
METHOD OF REMOVING GRAPHITIC AND/OR FLUORINATED ORGANIC LAYERS FROM THE SURFACE OF A CHIP PASSIVATION LAYER HAVING SI-CONTAINING COMPOUNDS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
11679483
|
Filing Dt:
|
02/27/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
STRUCTURE INCLUDING VIA HAVING REFRACTORY METAL COLLAR AT COPPER WIRE AND DIELECTRIC LAYER LINER-LESS INTERFACE AND RELATED METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11679785
|
Filing Dt:
|
02/27/2007
|
Title:
|
RECTIFYING ELEMENT FOR A CROSSPOINT BASED MEMORY ARRAY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
11679869
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
RADIATION HARDENED FINFET
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
11679873
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
Title:
|
BORDERLESS CONTACT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11680003
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
METHODS AND APPARATUS FOR ASSESSING HEALTH OF MEMORY UTILIZATION OF A PROGRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
11680163
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC SELF-ALIGNED BASE USING SELECTIVE EPITAXIAL GROWTH FOR BICMOS INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
11680221
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
FINFET WITH REDUCED GATE TO FIN OVERLAY SENSITIVITY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
11680371
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
DYNAMIC MEMORY ALLOCATION BETWEEN INBOUND AND OUTBOUND BUFFERS IN A PROTOCOL HANDLER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
11680568
|
Filing Dt:
|
02/28/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT SYSTEM WITH MOS DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11681454
|
Filing Dt:
|
03/02/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
METHOD OF FORMING PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11682542
|
Filing Dt:
|
03/06/2007
|
Title:
|
PULSED RING OSCILLATOR CIRCUIT FOR STORAGE CELL READ TIMING EVALUATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
11682554
|
Filing Dt:
|
03/06/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
ENHANCED TRANSISTOR PERFORMANCE BY NON-CONFORMAL STRESSED LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
|
Application #:
|
11682581
|
Filing Dt:
|
03/06/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
PLATING SEED LAYER INCLUDING AN OXYGEN/NITROGEN TRANSITION REGION FOR BARRIER ENHANCEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11682638
|
Filing Dt:
|
03/06/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHOD FOR PREPARING 2-DIMENSIONAL SEMICONDUCTOR DEVICES FOR INTEGRATION IN A THIRD DIMENSION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
11683068
|
Filing Dt:
|
03/07/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHOD OF MANUFACTURING AN ELECTRICAL ANTIFUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11683285
|
Filing Dt:
|
03/07/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHOD AND SYSTEM FOR PROVIDING AN IMPROVED STORE-IN CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11683590
|
Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHODS OF FORMING INTEGRATED CIRCUIT STRUCTURES USING INSULATOR DEPOSITION AND INSULATOR GAP FILLING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11683596
|
Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
CARBON TUBE FOR ELECTRON BEAM APPLICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11683648
|
Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHODS OF FORMING MASK PATTERNS ON SEMICONDUCTOR WAFERS THAT COMPENSATE FOR NONUNIFORM CENTER-TO-EDGE ETCH RATES DURING PHOTOLITHOGRAPHIC PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
11683825
|
Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
REVERSIBLE THERMAL THICKENING GREASE
|
|