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10/26/2010
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11772418
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07/02/2007
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12/06/2007
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03/09/2010
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11772464
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07/02/2007
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01/08/2009
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08/31/2010
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11772503
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07/02/2007
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01/08/2009
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01/06/2009
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11772592
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07/02/2007
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01/08/2009
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03/02/2010
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11772899
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07/03/2007
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11/01/2007
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07/12/2011
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11772908
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07/03/2007
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01/08/2009
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EFFICIENT UTILIZATION OF A MULTI-SOURCE NETWORK OF CONTROL LOGIC TO ACHIEVE TIMING CLOSURE IN A CLOCKED LOGIC CIRCUIT
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02/03/2009
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11773607
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07/05/2007
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01/08/2009
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BODY-CONTACTED FINFET
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01/24/2012
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11773631
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07/05/2007
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01/31/2008
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10/19/2010
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11774087
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07/06/2007
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10/16/2008
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DETECTOR FOR DETECTING ELECTROMAGNETIC WAVES
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07/12/2011
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11774245
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07/06/2007
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11/01/2007
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01/12/2010
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11774663
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07/09/2007
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11/01/2007
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06/03/2008
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11774853
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07/09/2007
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11/22/2007
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DUAL WIRED INTEGRATED CIRCUIT CHIPS
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11/16/2010
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11775257
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07/10/2007
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01/15/2009
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10/19/2010
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11775451
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07/10/2007
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01/15/2009
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METHOD AND APPARATUS FOR LENGTH DECODING VARIABLE LENGTH INSTRUCTIONS
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10/19/2010
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11775456
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07/10/2007
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01/15/2009
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02/22/2011
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11775531
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07/10/2007
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01/15/2009
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04/21/2009
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11775607
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07/10/2007
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11/08/2007
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04/17/2012
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11775619
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07/10/2007
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01/17/2008
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STRAINED MOS DEVICE AND METHODS FOR ITS FABRICATION
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06/15/2010
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11776118
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07/11/2007
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01/15/2009
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12/29/2009
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11776155
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07/11/2007
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06/05/2008
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SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
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01/13/2009
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11776710
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07/12/2007
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01/15/2009
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PROCESS FOR FINFET SPACER FORMATION
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12/21/2010
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11776738
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07/12/2007
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11/08/2007
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STRUCTURE AND METHOD FOR LATCHUP SUPPRESSION
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09/13/2011
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11776810
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07/12/2007
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01/15/2009
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DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA
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02/22/2011
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11776986
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07/12/2007
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01/15/2009
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MECHANISM FOR USING PERFORMANCE COUNTERS TO IDENTIFY REASONS AND DELAY TIMES FOR INSTRUCTIONS THAT ARE STALLED DURING RETIREMENT
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06/16/2009
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11777329
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07/13/2007
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01/15/2009
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APPARATUS AND METHOD FOR DETERMINING THE SLEW RATE OF A SIGNAL PRODUCED BY AN INTEGRATED CIRCUIT
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02/08/2011
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11777837
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07/13/2007
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01/15/2009
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THERMALLY PUMPED LIQUID/GAS HEAT EXCHANGER FOR COOLING HEAT-GENERATING DEVICES
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03/22/2011
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11778045
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07/15/2007
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01/15/2009
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03/29/2011
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11778185
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07/16/2007
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01/22/2009
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ASYMMETRIC FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD
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06/08/2010
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11778209
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07/16/2007
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01/22/2009
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GRAPHENE-BASED TRANSISTOR
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04/06/2010
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11778217
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07/16/2007
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01/22/2009
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04/29/2014
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11778238
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07/16/2007
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01/17/2008
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METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC
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07/14/2009
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11778641
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07/16/2007
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01/17/2008
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AUTONOMIC PARITY EXCHANGE
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05/18/2010
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11778852
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07/17/2007
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01/22/2009
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INVERSE SELF-ALIGNED SPACER LITHOGRAPHY
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10/12/2010
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11778876
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07/17/2007
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01/22/2009
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INTEGRATED WAFER PROCESSING SYSTEM FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS
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02/18/2014
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11778930
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07/17/2007
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07/31/2008
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METHOD FOR FORMING SILICON/GERMANIUM CONTAINING DRAIN/SOURCE REGIONS IN TRANSISTORS WITH REDUCED SILICON/GERMANIUM LOSS
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11/08/2011
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11779432
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07/18/2007
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01/22/2009
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STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS
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04/19/2011
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07/19/2007
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01/22/2009
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SPECULATIVE MEMORY PREFETCH
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03/15/2011
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11780519
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07/20/2007
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01/22/2009
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THIN GATE ELECTRODE CMOS DEVICES AND METHODS OF FABRICATING SAME
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09/13/2011
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07/20/2007
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01/22/2009
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METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT
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10/19/2010
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11780712
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07/20/2007
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01/31/2008
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10/11/2011
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07/23/2007
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01/29/2009
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MODELING HOMOGENEOUS PARALLELISM
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07/15/2008
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07/23/2007
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11/15/2007
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ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
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05/02/2017
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07/23/2007
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01/29/2009
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10/11/2011
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07/23/2007
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12/13/2007
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01/12/2010
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07/23/2007
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01/29/2009
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COOLING DEVICE WITH A PREFORMED COMPLIANT INTERFACE
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07/06/2010
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01/29/2009
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HALF-SELECT COMPLIANT MEMORY CELL PRECHARGE CIRCUIT
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12/28/2010
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07/24/2007
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01/29/2009
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PARTIALLY GATED FINFET WITH GATE DIELECTRIC ON ONLY ONE SIDEWALL
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04/27/2010
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07/25/2007
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07/03/2008
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TEST STRUCTURE FOR ESTIMATING ELECTROMIGRATION EFFECTS WITH INCREASED ROBUSTNESS WITH RESPECT TO BARRIER DEFECTS IN VIAS
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01/20/2009
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07/25/2007
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01/29/2009
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METHOD AND APPARATUS FOR IMPLEMENTING ENHANCED SRAM READ PERFORMANCE SORT RING OSCILLATOR (PSRO)
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10/19/2010
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11788215
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04/18/2007
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10/23/2008
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TOKEN BASED POWER CONTROL MECHANISM
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03/15/2011
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04/23/2007
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10/23/2008
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METHOD OF CONTROLLED LOW-K VIA ETCH FOR CU INTERCONNECTIONS
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07/28/2015
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11789157
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04/23/2007
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10/23/2008
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Method for semiconductor wafer fabrication utilizing a cleaning substrate
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02/12/2013
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11796073
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04/26/2007
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10/30/2008
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MEMORY DEVICE WITH IMPROVED PERFORMANCE
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06/17/2008
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11799261
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04/10/2007
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09/20/2007
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INTEGRATION OF STRAINED GE INTO ADVANCED CMOS TECHNOLOGY
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11/26/2013
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11811418
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06/07/2007
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12/11/2008
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METHOD FOR DEPOSITING A CONDUCTIVE CAPPING LAYER ON METAL LINES
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01/04/2011
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11819748
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06/28/2007
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09/04/2008
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SYSTEM AND METHOD FOR SYSTEM-ON-CHIP INTERCONNECT VERIFICATION
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03/25/2008
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11820713
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06/19/2007
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10/25/2007
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METHOD OF FORMING SILICON-ON-INSULATOR WAFER HAVING REENTRANT SHAPE DIELECTRIC TRENCHES
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03/25/2014
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06/26/2007
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01/01/2009
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Title:
|
Method for preventing void formation in a solder joint
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Patent #:
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Issue Dt:
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02/01/2011
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Application #:
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11828382
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Filing Dt:
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07/26/2007
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Publication #:
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Pub Dt:
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01/29/2009
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Title:
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METHOD AND APPARATUS FOR HANDLING EXCESS DATA DURING MEMORY ACCESS
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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11828657
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Filing Dt:
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07/26/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
Title:
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OVERHEAD TRANSPORT SERVICE VEHICLE AND METHOD
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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11828705
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Filing Dt:
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07/26/2007
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Publication #:
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Pub Dt:
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01/29/2009
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Title:
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METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR DYNAMICALLY SELECTING COMPILED INSTRUCTIONS
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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11829187
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Filing Dt:
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07/27/2007
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Publication #:
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Pub Dt:
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01/24/2008
| | | | |
Title:
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ENABLING MEMORY REDUNDANCY DURING TESTING
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Patent #:
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Issue Dt:
|
05/08/2012
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Application #:
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11830090
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
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SEMICONDUCTOR TRANSISTORS HAVING REDUCED DISTANCES BETWEEN GATE ELECTRODE REGIONS
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Patent #:
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Issue Dt:
|
10/20/2009
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Application #:
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11830116
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
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SHRINK TEST MODE TO IDENTIFY NTH ORDER SPEED PATHS
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Patent #:
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Issue Dt:
|
02/24/2009
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Application #:
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11830200
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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01/24/2008
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Title:
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APPARATUS AND METHODS FOR INTEGRALLY PACKAGING OPTOELECTRONIC DEVICES, IC CHIPS AND OPTICAL TRANSMISSION LINES
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Patent #:
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Issue Dt:
|
04/19/2011
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Application #:
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11830213
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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12/25/2008
| | | | |
Title:
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ELECTROLYTIC DEVICE BASED ON A SOLUTION-PROCESSED ELECTROLYTE
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Patent #:
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Issue Dt:
|
12/02/2008
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Application #:
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11830221
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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02/07/2008
| | | | |
Title:
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CIRCUITS AND METHODS FOR IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER WAVE FREQUENCIES
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|
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Patent #:
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Issue Dt:
|
02/19/2013
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Application #:
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11830239
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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01/17/2013
| | | | |
Title:
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APPARATUS AND METHODS FOR PACKAGING ANTENNAS WITH INTEGRATED CIRCUIT CHIPS FOR MILLIMETER WAVE APPLICATIONS
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|
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Patent #:
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Issue Dt:
|
02/07/2012
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Application #:
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11830316
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Filing Dt:
|
07/30/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
FIELD EFFECT TRANSISTOR HAVING AN ASYMMETRIC GATE ELECTRODE
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|
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Patent #:
|
|
Issue Dt:
|
11/17/2009
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Application #:
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11830328
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Filing Dt:
|
07/30/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
FINFET FLASH MEMORY DEVICE WITH AN EXTENDED FLOATING BACK GATE
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|
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Patent #:
|
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Issue Dt:
|
07/06/2010
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Application #:
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11830349
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Filing Dt:
|
07/30/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
C4NP SERVO CONTROLLED SOLDER FILL HEAD
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|
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Patent #:
|
|
Issue Dt:
|
09/09/2008
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Application #:
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11830464
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Filing Dt:
|
07/30/2007
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Publication #:
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Pub Dt:
|
11/15/2007
| | | | |
Title:
|
STRAINED SILICON DIRECTLY-ON-INSULATOR SUBSTRATE WITH HYBRID CRYSTALLINE ORIENTATION AND DIFFERENT STRESS LEVELS
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|
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Patent #:
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Issue Dt:
|
09/16/2008
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Application #:
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11830489
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
|
11/22/2007
| | | | |
Title:
|
STRUCTURE AND METHOD OF FABRICATING A HYBRID SUBSTRATE FOR HIGH-PERFORMANCE HYBRID-ORIENTATION SILICON-ON-INSULATOR CMOS DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
05/26/2009
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Application #:
|
11830872
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
11/22/2007
| | | | |
Title:
|
DOUBLE GATE ISOLATION
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|
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Patent #:
|
|
Issue Dt:
|
06/14/2011
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Application #:
|
11831005
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Filing Dt:
|
07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING SAME
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|
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Patent #:
|
|
Issue Dt:
|
04/12/2011
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Application #:
|
11831099
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Filing Dt:
|
07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
LAYER PATTERNING USING DOUBLE EXPOSURE PROCESSES IN A SINGLE PHOTORESIST LAYER
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|
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Patent #:
|
|
Issue Dt:
|
10/04/2011
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Application #:
|
11831119
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Filing Dt:
|
07/31/2007
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Publication #:
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|
Pub Dt:
|
02/05/2009
| | | | |
Title:
|
PLACING VIRTUAL MACHINE MONITOR (VMM) CODE IN GUEST CONTEXT TO SPEED MEMORY MAPPED INPUT/OUTPUT VIRTUALIZATION
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|
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Patent #:
|
|
Issue Dt:
|
02/07/2012
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Application #:
|
11831137
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Filing Dt:
|
07/31/2007
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Publication #:
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Pub Dt:
|
01/24/2008
| | | | |
Title:
|
METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING)
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|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
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Application #:
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11831138
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Filing Dt:
|
07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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MICROELECTRONIC STRUCTURE INCLUDING DUAL DAMASCENE STRUCTURE AND HIGH CONTRAST ALIGNMENT MARK
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|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
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Application #:
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11831149
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
|
INTERCONNECT STRUCTURE WITH GRAIN GROWTH PROMOTION LAYER AND METHOD FOR FORMING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
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Application #:
|
11831208
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
ORIENTATION-INDEPENDENT MULTI-LAYER BEOL CAPACITOR
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|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
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Application #:
|
11832220
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Filing Dt:
|
08/01/2007
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Publication #:
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Pub Dt:
|
12/20/2007
| | | | |
Title:
|
DRAM ACCESS COMMAND QUEUING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
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Application #:
|
11832453
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Filing Dt:
|
08/01/2007
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Publication #:
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Pub Dt:
|
01/24/2008
| | | | |
Title:
|
ENHANCING A POWER DISTRIBUTION SYSTEM IN A CERAMIC INTEGRATED CIRCUIT PACKAGE
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|
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Patent #:
|
|
Issue Dt:
|
03/08/2011
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Application #:
|
11833112
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Filing Dt:
|
08/02/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
SMALL AREA, ROBUST SILICON VIA STRUCTURE AND PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
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Application #:
|
11833143
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Filing Dt:
|
08/02/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
PHASE CHANGE MEMORY WITH DUAL WORD LINES AND SOURCE LINES AND METHOD OF OPERATING SAME
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|
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Patent #:
|
|
Issue Dt:
|
09/25/2012
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Application #:
|
11833274
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Filing Dt:
|
08/03/2007
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Publication #:
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Pub Dt:
|
03/06/2008
| | | | |
Title:
|
DATA STORAGE SYSTEMS
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|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
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Application #:
|
11833283
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Filing Dt:
|
08/03/2007
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Publication #:
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Pub Dt:
|
11/22/2007
| | | | |
Title:
|
POST CHEMICAL MECHANICAL POLISHING ETCH FOR IMPROVED TIME DEPENDENT DIELECTRIC BREAKDOWN RELIABILITY
|
|
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Patent #:
|
|
Issue Dt:
|
06/28/2011
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Application #:
|
11833321
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Filing Dt:
|
08/03/2007
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Publication #:
|
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
PROGRAMMABLE VIA DEVICES IN BACK END OF LINE LEVEL
|
|
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Patent #:
|
|
Issue Dt:
|
02/09/2010
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Application #:
|
11833354
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Filing Dt:
|
08/03/2007
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Publication #:
|
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
PROGRAMMABLE VIA DEVICES WITH AIR GAP ISOLATION
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|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
11833538
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Filing Dt:
|
08/03/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
|
MULTIPLE SOURCE-SINGLE DRAIN FIELD EFFECT SEMICONDUCTOR DEVICE AND CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11834110
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Filing Dt:
|
08/06/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
|
DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11834552
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Filing Dt:
|
08/06/2007
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Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
HEAT SINK WITH THERMALLY COMPLIANT BEAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
11834641
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Filing Dt:
|
08/06/2007
|
Publication #:
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|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
FET DEVICE WITH STABILIZED THRESHOLD MODIFYING MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2010
|
Application #:
|
11834752
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
BIDIRECTIONAL AND EXPANDABLE HEAT FLOW MEASUREMENT TOOL FOR UNITS OF AIR COOLED ELECTRICAL EQUIPMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
11834956
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Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
11834961
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
11834971
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
APPARATUS AND METHOD OF ELECTROLYTIC REMOVAL OF METALS FROM A WAFER SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11834979
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
MULTIPLE EXPOSURE TECHNIQUE USING OPC TO CORRECT DISTORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11835167
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
01/24/2008
| | | | |
Title:
|
VERTICAL NANOTUBE FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2010
|
Application #:
|
11835182
|
Filing Dt:
|
08/07/2007
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
Title:
|
METHODS FOR MANUFACTURING A FINFET USING A CONVENTIONAL WAFER AND APPARATUS MANUFACTURED THEREFROM
|
|