skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 14520
Page 51 of 146
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146
1
Patent #:
7445988
Issue Dt:
11/04/2008
Application #:
12023175
Filing Dt:
01/31/2008
Publication #:
US20080124863
Pub Dt:
05/29/2008
Title:
TRENCH MEMORY
2
Patent #:
8117579
Issue Dt:
02/14/2012
Application #:
12023337
Filing Dt:
01/31/2008
Publication #:
US20090199036
Pub Dt:
08/06/2009
Title:
LSSD COMPATIBILITY FOR GSD UNIFIED GLOBAL CLOCK BUFFERS
3
Patent #:
7947566
Issue Dt:
05/24/2011
Application #:
12023887
Filing Dt:
01/31/2008
Publication #:
US20090121312
Pub Dt:
05/14/2009
Title:
METHOD AND APPARATUS FOR MAKING COPLANAR ISOLATED REGIONS OF DIFFERENT SEMICONDUCTOR MATERIALS ON A SUBSTRATE
4
Patent #:
7865864
Issue Dt:
01/04/2011
Application #:
12024188
Filing Dt:
02/01/2008
Publication #:
US20090199151
Pub Dt:
08/06/2009
Title:
ELECTRICALLY DRIVEN OPTICAL PROXIMITY CORRECTION
5
Patent #:
7750459
Issue Dt:
07/06/2010
Application #:
12024394
Filing Dt:
02/01/2008
Publication #:
US20090194864
Pub Dt:
08/06/2009
Title:
INTEGRATED MODULE FOR DATA PROCESSING SYSTEM
6
Patent #:
8029716
Issue Dt:
10/04/2011
Application #:
12024985
Filing Dt:
02/01/2008
Publication #:
US20090194502
Pub Dt:
08/06/2009
Title:
AMORPHOUS NITRIDE RELEASE LAYERS FOR IMPRINT LITHOGRAPHY, AND METHOD OF USE
7
Patent #:
7882481
Issue Dt:
02/01/2011
Application #:
12025213
Filing Dt:
02/04/2008
Publication #:
US20090007028
Pub Dt:
01/01/2009
Title:
WAFER LAYOUT OPTIMIZATION METHOD AND SYSTEM
8
Patent #:
7846834
Issue Dt:
12/07/2010
Application #:
12025297
Filing Dt:
02/04/2008
Publication #:
US20090194876
Pub Dt:
08/06/2009
Title:
INTERCONNECT STRUCTURE AND METHOD FOR CU/ULTRA LOW K INTEGRATION
9
Patent #:
8215074
Issue Dt:
07/10/2012
Application #:
12026123
Filing Dt:
02/05/2008
Publication #:
US20120138571
Pub Dt:
06/07/2012
Title:
PATTERN FORMATION EMPLOYING SELF-ASSEMBLED MATERIAL
10
Patent #:
7879667
Issue Dt:
02/01/2011
Application #:
12026273
Filing Dt:
02/05/2008
Publication #:
US20090001371
Pub Dt:
01/01/2009
Title:
BLOCKING PRE-AMORPHIZATION OF A GATE ELECTRODE OF A TRANSISTOR
11
Patent #:
7566632
Issue Dt:
07/28/2009
Application #:
12026843
Filing Dt:
02/06/2008
Publication #:
US20090197390
Pub Dt:
08/06/2009
Title:
LOCK AND KEY STRUCTURE FOR THREE-DIMENTIONAL CHIP CONNECTION AND PROCESS THEREOF
12
Patent #:
7930672
Issue Dt:
04/19/2011
Application #:
12027085
Filing Dt:
02/06/2008
Publication #:
US20080127002
Pub Dt:
05/29/2008
Title:
INCREMENTAL DESIGN REDUCTION VIA ITERATIVE OVERAPPROXIMATION AND RE-ENCODING STRATEGIES
13
Patent #:
7993504
Issue Dt:
08/09/2011
Application #:
12027563
Filing Dt:
02/07/2008
Publication #:
US20080128086
Pub Dt:
06/05/2008
Title:
BACKSIDE UNLAYERING OF MOSFET DEVICES FOR ELECTRICAL AND PHYSICAL CHARACTERIZATION
14
Patent #:
7955958
Issue Dt:
06/07/2011
Application #:
12027675
Filing Dt:
02/07/2008
Publication #:
US20090200534
Pub Dt:
08/13/2009
Title:
METHOD FOR FABRICATION OF POLYCRYSTALLINE DIODES FOR RESISTIVE MEMORIES
15
Patent #:
8165864
Issue Dt:
04/24/2012
Application #:
12028038
Filing Dt:
02/08/2008
Publication #:
US20090204796
Pub Dt:
08/13/2009
Title:
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR VERIFYING ADDRESS GENERATION, INTERLOCKS AND BYPASSES
16
Patent #:
7989922
Issue Dt:
08/02/2011
Application #:
12028145
Filing Dt:
02/08/2008
Publication #:
US20090200642
Pub Dt:
08/13/2009
Title:
HIGHLY TUNABLE METAL-ON-SEMICONDUCTOR TRENCH VARACTOR
17
Patent #:
7838932
Issue Dt:
11/23/2010
Application #:
12028191
Filing Dt:
02/08/2008
Publication #:
US20080128712
Pub Dt:
06/05/2008
Title:
RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFORMANCE ENHANCEMENT WITH EMBEDDED SILICON CARBON
18
Patent #:
7935604
Issue Dt:
05/03/2011
Application #:
12028847
Filing Dt:
02/11/2008
Publication #:
US20100279480
Pub Dt:
11/04/2010
Title:
METHOD OF MAKING SMALL GEOMETRY FEATURES
19
Patent #:
7473904
Issue Dt:
01/06/2009
Application #:
12028850
Filing Dt:
02/11/2008
Publication #:
US20080128629
Pub Dt:
06/05/2008
Title:
DEVICE FOR MONITORING IONIZING RADIATION IN SILICON-ON INSULATOR INTEGRATED CIRCUITS
20
Patent #:
7960096
Issue Dt:
06/14/2011
Application #:
12028861
Filing Dt:
02/11/2008
Publication #:
US20090202952
Pub Dt:
08/13/2009
Title:
SUBLITHOGRAPHIC PATTERNING METHOD INCORPORATING A SELF-ALIGNED SINGLE MASK PROCESS
21
Patent #:
8003460
Issue Dt:
08/23/2011
Application #:
12028895
Filing Dt:
02/11/2008
Publication #:
US20090004799
Pub Dt:
01/01/2009
Title:
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING A FORMATION OF AT LEAST ONE SIDEWALL SPACER STRUCTURE
22
Patent #:
8004335
Issue Dt:
08/23/2011
Application #:
12028973
Filing Dt:
02/11/2008
Publication #:
US20090201064
Pub Dt:
08/13/2009
Title:
PHASE INTERPOLATOR SYSTEM AND ASSOCIATED METHODS
23
Patent #:
8008133
Issue Dt:
08/30/2011
Application #:
12029305
Filing Dt:
02/11/2008
Publication #:
US20090200659
Pub Dt:
08/13/2009
Title:
CHIP PACKAGE WITH CHANNEL STIFFENER FRAME
24
Patent #:
7960245
Issue Dt:
06/14/2011
Application #:
12029575
Filing Dt:
02/12/2008
Publication #:
US20080213948
Pub Dt:
09/04/2008
Title:
DUAL WIRED INTEGRATED CIRCUIT CHIPS
25
Patent #:
7939914
Issue Dt:
05/10/2011
Application #:
12029589
Filing Dt:
02/12/2008
Publication #:
US20080128812
Pub Dt:
06/05/2008
Title:
DUAL WIRED INTEGRATED CIRCUIT CHIPS
26
Patent #:
7666794
Issue Dt:
02/23/2010
Application #:
12029848
Filing Dt:
02/12/2008
Publication #:
US20080150091
Pub Dt:
06/26/2008
Title:
MULTIPLE PATTERNING USING PATTERNABLE LOW-K DIELECTRIC MATERIALS
27
Patent #:
8054630
Issue Dt:
11/08/2011
Application #:
12030260
Filing Dt:
02/13/2008
Publication #:
US20080205024
Pub Dt:
08/28/2008
Title:
ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
28
Patent #:
8108817
Issue Dt:
01/31/2012
Application #:
12030903
Filing Dt:
02/14/2008
Publication #:
US20090210833
Pub Dt:
08/20/2009
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF DESIGNING SEMICONDUCTOR STRUCTURE TO AVOID HIGH VOLTAGE INITIATED LATCH-UP IN LOW VOLTAGE SECTORS
29
Patent #:
7843039
Issue Dt:
11/30/2010
Application #:
12030917
Filing Dt:
02/14/2008
Publication #:
US20090206449
Pub Dt:
08/20/2009
Title:
STRESS-MODIFIED DEVICE STRUCTURES, METHODS OF FABRICATING SUCH STRESS-MODIFIED DEVICE STRUCTURES, AND DESIGN STRUCTURES FOR AN INTEGRATED CIRCUIT
30
Patent #:
7943438
Issue Dt:
05/17/2011
Application #:
12031084
Filing Dt:
02/14/2008
Publication #:
US20090206367
Pub Dt:
08/20/2009
Title:
DESIGN STRUCTURE AND METHOD FOR A SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE FOR SOI TECHNOLOGY
31
Patent #:
7384842
Issue Dt:
06/10/2008
Application #:
12031093
Filing Dt:
02/14/2008
Title:
METHODS INVOLVING SILICON-ON-INSULATOR TRENCH MEMORY WITH IMPLANTED PLATE
32
Patent #:
7952531
Issue Dt:
05/31/2011
Application #:
12031282
Filing Dt:
02/14/2008
Publication #:
US20090015496
Pub Dt:
01/15/2009
Title:
PLANAR CIRCULARLY POLARIZED ANTENNAS
33
Patent #:
7818074
Issue Dt:
10/19/2010
Application #:
12031374
Filing Dt:
02/14/2008
Publication #:
US20090210176
Pub Dt:
08/20/2009
Title:
METHODS TO SELECT GOLDEN DEVICES FOR DEVICE MODEL EXTRACTIONS
34
Patent #:
7851064
Issue Dt:
12/14/2010
Application #:
12031493
Filing Dt:
02/14/2008
Publication #:
US20080160312
Pub Dt:
07/03/2008
Title:
METHODS AND STRUCTURES FOR PROMOTING STABLE SYNTHESIS OF CARBON NANOTUBES
35
Patent #:
8227792
Issue Dt:
07/24/2012
Application #:
12031530
Filing Dt:
02/14/2008
Publication #:
US20080135875
Pub Dt:
06/12/2008
Title:
RELAXED LOW-DEFECT SGOI FOR STRAINED SI CMOS APPLICATIONS
36
Patent #:
7883956
Issue Dt:
02/08/2011
Application #:
12031760
Filing Dt:
02/15/2008
Publication #:
US20090206441
Pub Dt:
08/20/2009
Title:
METHOD OF FORMING COPLANAR ACTIVE AND ISOLATION REGIONS AND STRUCTURES THEREOF
37
Patent #:
7935621
Issue Dt:
05/03/2011
Application #:
12031761
Filing Dt:
02/15/2008
Publication #:
US20090206447
Pub Dt:
08/20/2009
Title:
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
38
Patent #:
8086980
Issue Dt:
12/27/2011
Application #:
12032276
Filing Dt:
02/15/2008
Publication #:
US20090210835
Pub Dt:
08/20/2009
Title:
EFFICIENT POWER REGION CHECKING OF MULTI-SUPPLY VOLTAGE MICROPROCESSORS
39
Patent #:
7823283
Issue Dt:
11/02/2010
Application #:
12032316
Filing Dt:
02/15/2008
Publication #:
US20080141528
Pub Dt:
06/19/2008
Title:
METHOD OF FORMING A LAND GRID ARRAY INTERPOSER
40
Patent #:
8028259
Issue Dt:
09/27/2011
Application #:
12032417
Filing Dt:
02/15/2008
Publication #:
US20090210836
Pub Dt:
08/20/2009
Title:
AUTOMATED METHOD AND APPARATUS FOR VERY EARLY VALIDATION OF CHIP POWER DISTRIBUTION NETWORKS IN SEMICONDUCTOR CHIP DESIGNS
41
Patent #:
7847496
Issue Dt:
12/07/2010
Application #:
12032420
Filing Dt:
02/15/2008
Publication #:
US20090206190
Pub Dt:
08/20/2009
Title:
DYNAMIC TAPE DRIVE CALIBRATION
42
Patent #:
7979838
Issue Dt:
07/12/2011
Application #:
12032517
Filing Dt:
02/15/2008
Publication #:
US20090210843
Pub Dt:
08/20/2009
Title:
METHOD OF AUTOMATING CREATION OF A CLOCK CONTROL DISTRIBUTION NETWORK IN AN INTEGRATED CIRCUIT FLOORPLAN
43
Patent #:
8006213
Issue Dt:
08/23/2011
Application #:
12032542
Filing Dt:
02/15/2008
Publication #:
US20090210840
Pub Dt:
08/20/2009
Title:
OPTIMIZATION METHOD OF INTEGRATED CIRCUIT DESIGN FOR REDUCTION OF GLOBAL CLOCK LOAD AND BALANCING CLOCK SKEW
44
Patent #:
8000384
Issue Dt:
08/16/2011
Application #:
12032610
Filing Dt:
02/15/2008
Publication #:
US20090207900
Pub Dt:
08/20/2009
Title:
APPARATUS FOR STABILIZING CONVERGENCE OF AN ADAPTIVE LINE EQUALIZER
45
Patent #:
7913216
Issue Dt:
03/22/2011
Application #:
12032643
Filing Dt:
02/16/2008
Publication #:
US20090210849
Pub Dt:
08/20/2009
Title:
ACCURATE PARASITICS ESTIMATION FOR HIERARCHICAL CUSTOMIZED VLSI DESIGN
46
Patent #:
7844931
Issue Dt:
11/30/2010
Application #:
12032728
Filing Dt:
02/18/2008
Publication #:
US20080216042
Pub Dt:
09/04/2008
Title:
METHOD AND COMPUTER SYSTEM FOR OPTIMIZING THE SIGNAL TIME BEHAVIOR OF AN ELECTRONIC CIRCUIT DESIGN
47
Patent #:
7886245
Issue Dt:
02/08/2011
Application #:
12032734
Filing Dt:
02/18/2008
Publication #:
US20080216043
Pub Dt:
09/04/2008
Title:
STRUCTURE FOR OPTIMIZING THE SIGNAL TIME BEHAVIOR OF AN ELECTRONIC CIRCUIT DESIGN
48
Patent #:
8010922
Issue Dt:
08/30/2011
Application #:
12032762
Filing Dt:
02/18/2008
Publication #:
US20090210842
Pub Dt:
08/20/2009
Title:
AUTOMATED METHOD FOR BUFFERING IN A VLSI DESIGN
49
Patent #:
7643357
Issue Dt:
01/05/2010
Application #:
12032798
Filing Dt:
02/18/2008
Publication #:
US20090207650
Pub Dt:
08/20/2009
Title:
SYSTEM AND METHOD FOR INTEGRATING DYNAMIC LEAKAGE REDUCTION WITH WRITE-ASSISTED SRAM ARCHITECTURE
50
Patent #:
7971162
Issue Dt:
06/28/2011
Application #:
12032841
Filing Dt:
02/18/2008
Publication #:
US20090210832
Pub Dt:
08/20/2009
Title:
VERIFICATION OF SPARE LATCH PLACEMENT IN SYNTHESIZED MACROS
51
Patent #:
8047762
Issue Dt:
11/01/2011
Application #:
12032857
Filing Dt:
02/18/2008
Publication #:
US20090035102
Pub Dt:
02/05/2009
Title:
METHOD AND SYSTEM FOR LOCALLY BUFFERING SUBSTRATE CARRIERS IN AN OVERHEAD TRANSPORT SYSTEM FOR ENHANCING INPUT/OUTPUT CAPABILITIES OF PROCESS TOOLS
52
Patent #:
7856341
Issue Dt:
12/21/2010
Application #:
12033200
Filing Dt:
02/19/2008
Publication #:
US20090210190
Pub Dt:
08/20/2009
Title:
HEAT SINK
53
Patent #:
9368410
Issue Dt:
06/14/2016
Application #:
12033280
Filing Dt:
02/19/2008
Publication #:
US20090206407
Pub Dt:
08/20/2009
Title:
SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING
54
Patent #:
7871895
Issue Dt:
01/18/2011
Application #:
12033322
Filing Dt:
02/19/2008
Publication #:
US20090206442
Pub Dt:
08/20/2009
Title:
METHOD AND STRUCTURE FOR RELIEVING TRANSISTOR PERFORMANCE DEGRADATION DUE TO SHALLOW TRENCH ISOLATION INDUCED STRESS
55
Patent #:
7888750
Issue Dt:
02/15/2011
Application #:
12033325
Filing Dt:
02/19/2008
Publication #:
US20090206374
Pub Dt:
08/20/2009
Title:
MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT
56
Patent #:
8022478
Issue Dt:
09/20/2011
Application #:
12033359
Filing Dt:
02/19/2008
Publication #:
US20090209074
Pub Dt:
08/20/2009
Title:
METHOD OF FORMING A MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT
57
Patent #:
7895538
Issue Dt:
02/22/2011
Application #:
12033974
Filing Dt:
02/20/2008
Publication #:
US20090210387
Pub Dt:
08/20/2009
Title:
SYSTEM AND METHOD FOR PROVIDING A COMMON INSTRUCTION TABLE
58
Patent #:
7692590
Issue Dt:
04/06/2010
Application #:
12034023
Filing Dt:
02/20/2008
Publication #:
US20090207080
Pub Dt:
08/20/2009
Title:
RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES WITH INTEGRATED APERTURE-COUPLED PATCH ANTENNA(S)
59
Patent #:
8103998
Issue Dt:
01/24/2012
Application #:
12034161
Filing Dt:
02/20/2008
Publication #:
US20090210837
Pub Dt:
08/20/2009
Title:
VERIFYING NON-DETERMINISTIC BEHAVIOR OF A DESIGN UNDER TEST
60
Patent #:
8405127
Issue Dt:
03/26/2013
Application #:
12034210
Filing Dt:
02/20/2008
Publication #:
US20090206370
Pub Dt:
08/20/2009
Title:
METHOD AND APPARATUS FOR FABRICATING A HETEROJUNCTION BIPOLAR TRANSISTOR
61
Patent #:
7449378
Issue Dt:
11/11/2008
Application #:
12034296
Filing Dt:
02/20/2008
Publication #:
US20080145986
Pub Dt:
06/19/2008
Title:
STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN PFETS WITH EMBEDDED SIGE SOURCE/DRAIN REGIONS
62
Patent #:
8261224
Issue Dt:
09/04/2012
Application #:
12034644
Filing Dt:
02/20/2008
Publication #:
US20090210845
Pub Dt:
08/20/2009
Title:
COMPUTER PROGRAM PRODUCT, APPARATUS, AND METHOD FOR INSERTING COMPONENTS IN A HIERARCHICAL CHIP DESIGN
63
Patent #:
8232647
Issue Dt:
07/31/2012
Application #:
12034708
Filing Dt:
02/21/2008
Publication #:
US20090212433
Pub Dt:
08/27/2009
Title:
STRUCTURE AND PROCESS FOR METALLIZATION IN HIGH ASPECT RATIO FEATURES
64
Patent #:
8120143
Issue Dt:
02/21/2012
Application #:
12034728
Filing Dt:
02/21/2008
Publication #:
US20080130200
Pub Dt:
06/05/2008
Title:
INTEGRATED CIRCUIT COMB CAPACITOR
65
Patent #:
7868374
Issue Dt:
01/11/2011
Application #:
12034899
Filing Dt:
02/21/2008
Publication #:
US20090212341
Pub Dt:
08/27/2009
Title:
SEMITUBULAR METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR
66
Patent #:
7825525
Issue Dt:
11/02/2010
Application #:
12034901
Filing Dt:
02/21/2008
Publication #:
US20080142995
Pub Dt:
06/19/2008
Title:
LAYOUT AND PROCESS TO CONTACT SUB-LITHOGRAPHIC STRUCTURES
67
Patent #:
8021828
Issue Dt:
09/20/2011
Application #:
12034971
Filing Dt:
02/21/2008
Publication #:
US20090214959
Pub Dt:
08/27/2009
Title:
PHOTORESIST COMPOSITIONS AND METHODS RELATED TO NEAR FIELD MASKS
68
Patent #:
8053172
Issue Dt:
11/08/2011
Application #:
12035009
Filing Dt:
02/21/2008
Publication #:
US20090214981
Pub Dt:
08/27/2009
Title:
PHOTORESISTS AND METHODS FOR OPTICAL PROXIMITY CORRECTION
69
Patent #:
7560721
Issue Dt:
07/14/2009
Application #:
12035237
Filing Dt:
02/21/2008
Title:
PHASE CHANGE MATERIAL WITH FILAMENT ELECTRODE
70
Patent #:
8969195
Issue Dt:
03/03/2015
Application #:
12035449
Filing Dt:
02/22/2008
Publication #:
US20090212434
Pub Dt:
08/27/2009
Title:
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES AND A SEMICONDUCTOR STRUCTURE
71
Patent #:
7728089
Issue Dt:
06/01/2010
Application #:
12035462
Filing Dt:
02/22/2008
Publication #:
US20080145787
Pub Dt:
06/19/2008
Title:
TOPCOAT COMPOSITIONS AND METHODS OF USE THEREOF
72
Patent #:
7987400
Issue Dt:
07/26/2011
Application #:
12035500
Filing Dt:
02/22/2008
Publication #:
US20090217115
Pub Dt:
08/27/2009
Title:
METHOD FOR OPTIMIZING SCAN CHAINS IN AN INTEGRATED CIRCUIT THAT HAS MULTIPLE LEVELS OF HIERARCHY
73
Patent #:
8404577
Issue Dt:
03/26/2013
Application #:
12035518
Filing Dt:
02/22/2008
Publication #:
US20090035936
Pub Dt:
02/05/2009
Title:
SEMICONDUCTOR DEVICE HAVING A GRAIN ORIENTATION LAYER
74
Patent #:
7882463
Issue Dt:
02/01/2011
Application #:
12035572
Filing Dt:
02/22/2008
Publication #:
US20080148210
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT SELECTIVE SCALING
75
Patent #:
7906031
Issue Dt:
03/15/2011
Application #:
12036091
Filing Dt:
02/22/2008
Publication #:
US20090212016
Pub Dt:
08/27/2009
Title:
ALIGNING POLYMER FILMS
76
Patent #:
7908534
Issue Dt:
03/15/2011
Application #:
12036320
Filing Dt:
02/25/2008
Publication #:
US20090217116
Pub Dt:
08/27/2009
Title:
DIAGNOSABLE GENERAL PURPOSE TEST REGISTERS SCAN CHAIN DESIGN
77
Patent #:
7913379
Issue Dt:
03/29/2011
Application #:
12036664
Filing Dt:
02/25/2008
Publication #:
US20090211083
Pub Dt:
08/27/2009
Title:
TOOL ASSEMBLY FOR EXTRACTING AND INSTALLING DUAL IN-LINE MEMORY MODULE CARDLETS
78
Patent #:
7984341
Issue Dt:
07/19/2011
Application #:
12036697
Filing Dt:
02/25/2008
Publication #:
US20090217110
Pub Dt:
08/27/2009
Title:
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT INVOLVING ERROR THRESHOLDS
79
Patent #:
8195986
Issue Dt:
06/05/2012
Application #:
12036745
Filing Dt:
02/25/2008
Publication #:
US20090217108
Pub Dt:
08/27/2009
Title:
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING ERROR INFORMATION IN A SYSTEM
80
Patent #:
7851315
Issue Dt:
12/14/2010
Application #:
12037113
Filing Dt:
02/26/2008
Publication #:
US20080213964
Pub Dt:
09/04/2008
Title:
METHOD FOR FABRICATING A FIELD EFFECT TRANSISTOR HAVING A DUAL THICKNESS GATE ELECTRODE
81
Patent #:
7560753
Issue Dt:
07/14/2009
Application #:
12037121
Filing Dt:
02/26/2008
Publication #:
US20080157188
Pub Dt:
07/03/2008
Title:
FIELD EFFECT TRANSISTOR WITH THIN GATE ELECTRODE AND METHOD OF FABRICATING SAME
82
Patent #:
7947549
Issue Dt:
05/24/2011
Application #:
12037158
Filing Dt:
02/26/2008
Publication #:
US20090212369
Pub Dt:
08/27/2009
Title:
GATE EFFECTIVE-WORKFUNCTION MODIFICATION FOR CMOS
83
Patent #:
8112690
Issue Dt:
02/07/2012
Application #:
12037191
Filing Dt:
02/26/2008
Publication #:
US20090217089
Pub Dt:
08/27/2009
Title:
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONNECTION STATE RECOVERY AFTER FAULT
84
Patent #:
8103989
Issue Dt:
01/24/2012
Application #:
12037421
Filing Dt:
02/26/2008
Publication #:
US20090212819
Pub Dt:
08/27/2009
Title:
METHOD AND SYSTEM FOR CHANGING CIRCUITS IN AN INTEGRATED CIRCUIT
85
Patent #:
7892635
Issue Dt:
02/22/2011
Application #:
12037507
Filing Dt:
02/26/2008
Publication #:
US20080188578
Pub Dt:
08/07/2008
Title:
PRECURSORS FOR POROUS LOW-DIELECTRIC CONSTANT MATERIALS FOR USE IN ELECTRONIC DEVICES
86
Patent #:
8099557
Issue Dt:
01/17/2012
Application #:
12037595
Filing Dt:
02/26/2008
Publication #:
US20090216950
Pub Dt:
08/27/2009
Title:
PUSH FOR SHARING INSTRUCTION
87
Patent #:
8219376
Issue Dt:
07/10/2012
Application #:
12037956
Filing Dt:
02/27/2008
Publication #:
US20090216513
Pub Dt:
08/27/2009
Title:
DESIGN VERIFICATION USING DIRECTIVES HAVING LOCAL VARIABLES
88
Patent #:
7877714
Issue Dt:
01/25/2011
Application #:
12038320
Filing Dt:
02/27/2008
Publication #:
US20090217221
Pub Dt:
08/27/2009
Title:
SYSTEM AND METHOD TO OPTIMIZE SEMICONDUCTOR POWER BY INTEGRATION OF PHYSICAL DESIGN TIMING AND PRODUCT PERFORMANCE MEASUREMENTS
89
Patent #:
7945888
Issue Dt:
05/17/2011
Application #:
12038818
Filing Dt:
02/28/2008
Publication #:
US20090222694
Pub Dt:
09/03/2009
Title:
MODEL-BASED HARDWARE EXERCISER, DEVICE, SYSTEM AND METHOD THEREOF
90
Patent #:
7873923
Issue Dt:
01/18/2011
Application #:
12038845
Filing Dt:
02/28/2008
Publication #:
US20090222772
Pub Dt:
09/03/2009
Title:
POWER GATING LOGIC CONES
91
Patent #:
7808780
Issue Dt:
10/05/2010
Application #:
12038894
Filing Dt:
02/28/2008
Publication #:
US20090218078
Pub Dt:
09/03/2009
Title:
VARIABLE FLOW COMPUTER COOLING SYSTEM FOR A DATA CENTER AND METHOD OF OPERATION
92
Patent #:
7813162
Issue Dt:
10/12/2010
Application #:
12038985
Filing Dt:
02/28/2008
Publication #:
US20090218631
Pub Dt:
09/03/2009
Title:
SRAM CELL HAVING ASYMMETRIC PASS GATES
93
Patent #:
7900178
Issue Dt:
03/01/2011
Application #:
12039109
Filing Dt:
02/28/2008
Publication #:
US20090222783
Pub Dt:
09/03/2009
Title:
INTEGRATED CIRCUIT (IC) DESIGN METHOD, SYSTEM AND PROGRAM PRODUCT
94
Patent #:
8211786
Issue Dt:
07/03/2012
Application #:
12039177
Filing Dt:
02/28/2008
Publication #:
US20090218632
Pub Dt:
09/03/2009
Title:
CMOS STRUCTURE INCLUDING NON-PLANAR HYBRID ORIENTATION SUBSTRATE WITH PLANAR GATE ELECTRODES AND METHOD FOR FABRICATION
95
Patent #:
8020020
Issue Dt:
09/13/2011
Application #:
12039278
Filing Dt:
02/28/2008
Publication #:
US20090222684
Pub Dt:
09/03/2009
Title:
FAST, AUTOMATICALLY SCALED PROCESSOR TIME STAMP COUNTER
96
Patent #:
7708909
Issue Dt:
05/04/2010
Application #:
12039309
Filing Dt:
02/28/2008
Publication #:
US20080202386
Pub Dt:
08/28/2008
Title:
SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
97
Patent #:
8592675
Issue Dt:
11/26/2013
Application #:
12039900
Filing Dt:
02/29/2008
Publication #:
US20090217971
Pub Dt:
09/03/2009
Title:
Photovoltaic Devices with Enhanced Efficiencies Using High-Aspect-Ratio Nanostructures
98
Patent #:
8551558
Issue Dt:
10/08/2013
Application #:
12039953
Filing Dt:
02/29/2008
Publication #:
US20090217972
Pub Dt:
09/03/2009
Title:
Techniques for Enhancing Efficiency of Photovoltaic Devices Using High-Aspect-Ratio Nanostructures
99
Patent #:
9218994
Issue Dt:
12/22/2015
Application #:
12039980
Filing Dt:
02/29/2008
Publication #:
US20090035101
Pub Dt:
02/05/2009
Title:
TWO-DIMENSIONAL TRANSFER STATION USED AS INTERFACE BETWEEN A PROCESS TOOL AND A TRANSPORT SYSTEM AND A METHOD OF OPERATING THE SAME
100
Patent #:
7868410
Issue Dt:
01/11/2011
Application #:
12040350
Filing Dt:
02/29/2008
Publication #:
US20080142894
Pub Dt:
06/19/2008
Title:
GATE STACK ENGINEERING BY ELECTROCHEMICAL PROCESSING UTILIZING THROUGH-GATE-DIELECTRIC CURRENT FLOW
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

Search Results as of: 05/09/2024 10:42 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT