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Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
11/20/2012
Application #:
12620664
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
06/03/2010
Title:
BUILT-IN COMPLIANCE IN TEST STRUCTURES FOR LEAKAGE AND DIELECTRIC BREAKDOWN OF DIELECTRIC MATERIALS OF METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES
2
Patent #:
Issue Dt:
03/27/2012
Application #:
12621000
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/18/2010
Title:
PHASE CHANGE MEMORY CELL IN VIA ARRAY WITH SELF-ALIGNED, SELF-CONVERGED BOTTOM ELECTRODE AND METHOD FOR MANUFACTURING
3
Patent #:
Issue Dt:
01/31/2012
Application #:
12621216
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/19/2011
Title:
DIFFUSION SIDEWALL FOR A SEMICONDUCTOR STRUCTURE
4
Patent #:
Issue Dt:
10/18/2011
Application #:
12621226
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
09/02/2010
Title:
HOLEY ELECTRODE GRIDS FOR PHOTOVOLTAIC CELLS WITH SUBWAVELENGTH AND SUPERWAVELENGTH FEATURE SIZES
5
Patent #:
Issue Dt:
11/06/2012
Application #:
12621299
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/19/2011
Title:
IMPLANT FREE EXTREMELY THIN SEMICONDUCTOR DEVICES
6
Patent #:
Issue Dt:
03/20/2012
Application #:
12621460
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/19/2011
Title:
HYBRID FINFET/PLANAR SOI FETS
7
Patent #:
Issue Dt:
05/07/2013
Application #:
12621564
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
10/21/2010
Title:
AUTOMATED GENERATION OF OXIDE PILLAR SLOT SHAPES IN SILICON-ON-INSULATOR FORMATION TECHNOLOGY
8
Patent #:
Issue Dt:
02/14/2012
Application #:
12621685
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
09/02/2010
Title:
GRID-LINE-FREE CONTACT FOR A PHOTOVOLTAIC CELL
9
Patent #:
Issue Dt:
07/26/2011
Application #:
12621956
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
05/19/2011
Title:
SEMISPHERICAL INTEGRATED CIRCUIT STRUCTURES
10
Patent #:
Issue Dt:
02/05/2013
Application #:
12622111
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
05/19/2011
Title:
INTERCONNECT STRUCTURE INCLUDING A MODIFIED PHOTORESIST AS A PERMANENT INTERCONNECT DIELECTRIC AND METHOD OF FABRICATING SAME
11
Patent #:
Issue Dt:
03/06/2012
Application #:
12622461
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
10/14/2010
Title:
METHODS, PHOTOMASKS AND METHODS OF FABRICATING PHOTOMASKS FOR IMPROVING DAMASCENE WIRE UNIFORMITY WITHOUT REDUCING PERFORMANCE
12
Patent #:
Issue Dt:
10/30/2012
Application #:
12622464
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
09/30/2010
Title:
METHODS FOR NORMALIZING STRAIN IN SEMICONDUCTOR DEVICES AND STRAIN NORMALIZED SEMICONDUCTOR DEVICES
13
Patent #:
Issue Dt:
09/27/2011
Application #:
12622504
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
09/02/2010
Title:
SOLAR CONCENTRATION SYSTEM
14
Patent #:
Issue Dt:
07/31/2012
Application #:
12622557
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
10/14/2010
Title:
SPACER LINEWIDTH CONTROL
15
Patent #:
Issue Dt:
02/28/2012
Application #:
12622733
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
05/26/2011
Title:
INTEGRATED CIRCUIT INCLUDING FINFET RF SWITCH ANGLED RELATIVE TO PLANAR MOSFET AND RELATED DESIGN STRUCTURE
16
Patent #:
Issue Dt:
09/25/2012
Application #:
12623462
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
05/26/2011
Title:
POWER DELIVERY IN A HETEROGENEOUS 3-D STACKED APPARATUS
17
Patent #:
Issue Dt:
01/08/2013
Application #:
12623493
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
06/03/2010
Title:
REDUCED TOPOGRAPHY-RELATED IRREGULARITIES DURING THE PATTERNING OF TWO DIFFERENT STRESS-INDUCING LAYERS IN THE CONTACT LEVEL OF A SEMICONDUCTOR DEVICE
18
Patent #:
Issue Dt:
05/15/2012
Application #:
12623836
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
05/26/2011
Title:
OPTICAL ALIGNMENT MODULE UTILIZING TRANSPARENT RETICLE TO FACILITATE TOOL CALIBRATION DURING HIGH TEMPERATURE PROCESS
19
Patent #:
Issue Dt:
04/24/2012
Application #:
12624065
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
03/18/2010
Title:
METHODS OF FORMING SOLDER CONNECTIONS AND STRUCTURE THEREOF
20
Patent #:
Issue Dt:
07/03/2012
Application #:
12624141
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
05/26/2011
Title:
HIGH DENSITY LOW POWER NANOWIRE PHASE CHANGE MATERIAL MEMORY DEVICE
21
Patent #:
Issue Dt:
01/15/2013
Application #:
12624605
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
05/26/2011
Title:
POLYMERIC FILMS MADE FROM POLYHEDRAL OLIGOMERIC SILSESQUIOXANE (POSS) AND A HYDROPHILIC COMONOMER
22
Patent #:
Issue Dt:
09/06/2011
Application #:
12624633
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
05/26/2011
Title:
COMPOSITE MEMBRANES WITH PERFORMANCE ENHANCING LAYERS
23
Patent #:
Issue Dt:
03/20/2012
Application #:
12624677
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
05/26/2011
Title:
FREQUENCY LOCKED FEEDBACK LOOP FOR WIRELESS COMMUNICATIONS
24
Patent #:
Issue Dt:
08/07/2012
Application #:
12625590
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
05/26/2011
Title:
PASSIVATION LAYER SURFACE TOPOGRAPHY MODIFICATIONS FOR IMPROVED INTEGRITY IN PACKAGED ASSEMBLIES
25
Patent #:
Issue Dt:
09/20/2011
Application #:
12625701
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
05/26/2011
Title:
SIMULTANEOUSLY FORMED ISOLATION TRENCH AND THROUGH-BOX CONTACT FOR SILICON-ON-INSULATOR TECHNOLOGY
26
Patent #:
Issue Dt:
02/19/2013
Application #:
12625703
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
05/26/2011
Title:
METHOD AND APPARATUS FOR INCREASED EFFECTIVENESS OF DELAY AND TRANSISTION FAULT TESTING
27
Patent #:
Issue Dt:
12/25/2012
Application #:
12625827
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
05/26/2011
Title:
EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
28
Patent #:
Issue Dt:
05/17/2011
Application #:
12625855
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
05/26/2011
Title:
SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT
29
Patent #:
Issue Dt:
07/03/2012
Application #:
12627076
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
DOSIMETER POWERED BY PASSIVE RF ABSORPTION
30
Patent #:
Issue Dt:
09/23/2014
Application #:
12627120
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
SELF ALIGNED CARBIDE SOURCE/DRAIN FET
31
Patent #:
Issue Dt:
03/15/2011
Application #:
12627249
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
03/25/2010
Title:
METHOD AND APPARATUS FOR FORMING PLANAR ALLOY DEPOSITS ON A SUBSTRATE
32
Patent #:
Issue Dt:
06/14/2011
Application #:
12627282
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
METHOD OF AND STRUCTURE FOR RECOVERING GAIN IN A BIPOLAR TRANSISTOR
33
Patent #:
Issue Dt:
06/25/2013
Application #:
12627343
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
SILICON-ON-INSULATOR (SOI) STRUCTURE CONFIGURED FOR REDUCED HARMONICS AND METHOD OF FORMING THE STRUCTURE
34
Patent #:
Issue Dt:
08/30/2011
Application #:
12627424
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
EXTREMELY THIN SEMICONDUCTOR ON INSULATOR SEMICONDUCTOR DEVICE WITH SUPPRESSED DOPANT SEGREGATION
35
Patent #:
Issue Dt:
01/01/2013
Application #:
12627747
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
NANOPILLAR E-FUSE STRUCTURE AND PROCESS
36
Patent #:
Issue Dt:
09/20/2011
Application #:
12628663
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
06/02/2011
Title:
METHOD AND STRUCTURE FOR FORMING FINFETS WITH MULTIPLE DOPING REGIONS ON A SAME CHIP
37
Patent #:
Issue Dt:
01/15/2013
Application #:
12628686
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
06/02/2011
Title:
MULTIPLYING PATTERN DENSITY BY SINGLE SIDEWALL IMAGING TRANSFER
38
Patent #:
Issue Dt:
11/27/2012
Application #:
12628724
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
06/02/2011
Title:
ENHANCING MOSFET PERFORMANCE BY OPTIMIZING STRESS PROPERTIES
39
Patent #:
Issue Dt:
12/18/2012
Application #:
12629156
Filing Dt:
12/02/2009
Publication #:
Pub Dt:
06/02/2011
Title:
MODELING COMPLEX HIEARCHICAL SYSTEMS ACROSS SPACE AND TIME
40
Patent #:
Issue Dt:
06/05/2012
Application #:
12630091
Filing Dt:
12/03/2009
Publication #:
Pub Dt:
06/09/2011
Title:
INTEGRATED CIRCUIT AND A METHOD USING INTEGRATED PROCESS STEPS TO FORM DEEP TRENCH ISOLATION STRUCTURES AND DEEP TRENCH CAPACITOR STRUCTURES FOR THE INTEGRATED CIRCUIT
41
Patent #:
Issue Dt:
03/27/2012
Application #:
12630939
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
OMEGA SHAPED NANOWIRE TUNNEL FIELD EFFECT TRANSISTORS FABRICATION
42
Patent #:
Issue Dt:
05/08/2012
Application #:
12630942
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
GATE-ALL-AROUND NANOWIRE TUNNEL FIELD EFFECT TRANSISTORS
43
Patent #:
Issue Dt:
03/20/2012
Application #:
12630946
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
EVENT TRACKING HARDWARE
44
Patent #:
Issue Dt:
12/25/2012
Application #:
12630993
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
HIGH-SPEED CERAMIC MODULES WITH HYBRID REFERENCING SCHEME FOR IMPROVED PERFORMANCE AND REDUCED COST
45
Patent #:
Issue Dt:
02/26/2013
Application #:
12631199
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
GATE-ALL-AROUND NANOWIRE FIELD EFFECT TRANSISTORS
46
Patent #:
Issue Dt:
11/20/2012
Application #:
12631203
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
47
Patent #:
Issue Dt:
03/06/2012
Application #:
12631205
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
OMEGA SHAPED NANOWIRE FIELD EFFECT TRANSISTORS
48
Patent #:
Issue Dt:
01/17/2012
Application #:
12631213
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
SELF-ALIGNED CONTACTS FOR NANOWIRE FIELD EFFECT TRANSISTORS
49
Patent #:
Issue Dt:
11/13/2012
Application #:
12631218
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
50
Patent #:
Issue Dt:
01/31/2012
Application #:
12631310
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
RESISTIVE MEMORY DEVICES HAVING A NOT-AND (NAND) STRUCTURE
51
Patent #:
Issue Dt:
05/17/2011
Application #:
12631900
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
04/01/2010
Title:
INTEGRATING NONVOLATILE MEMORY CAPABILITY WITHIN SRAM DEVICES
52
Patent #:
Issue Dt:
01/29/2013
Application #:
12632015
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
09/30/2010
Title:
ELECTRICAL OVERSTRESS PROTECTION CIRCUIT
53
Patent #:
Issue Dt:
02/19/2013
Application #:
12632030
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
09/23/2010
Title:
CHIP INDUCTOR WITH FREQUENCY DEPENDENT INDUCTANCE
54
Patent #:
Issue Dt:
07/23/2013
Application #:
12632040
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
06/09/2011
Title:
MICRO-ELECTRO-MECHANICAL SYSTEM TILTABLE LENS
55
Patent #:
Issue Dt:
08/21/2012
Application #:
12632154
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
06/09/2011
Title:
COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
56
Patent #:
Issue Dt:
05/15/2012
Application #:
12632351
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
06/09/2011
Title:
NMOS ARCHITECTURE INVOLVING EPITAXIALLY-GROWN IN-SITU N-TYPE-DOPED EMBEDDED ESIGE:C SOURCE/DRAIN TARGETING
57
Patent #:
Issue Dt:
07/03/2012
Application #:
12632836
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
09/30/2010
Title:
HORIZONTAL MICRO-ELECTRO-MECHANICAL-SYSTEM SWITCH
58
Patent #:
Issue Dt:
03/20/2012
Application #:
12632838
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
10/21/2010
Title:
METAL FILL STRUCTURES FOR REDUCING PARASITIC CAPACITANCE
59
Patent #:
Issue Dt:
07/24/2012
Application #:
12634137
Filing Dt:
12/09/2009
Publication #:
Pub Dt:
04/08/2010
Title:
SEMICONDUCTOR DEVICE STRUCTURES WITH FLOATING BODY CHARGE STORAGE AND METHODS FOR FORMING SUCH SEMICONDUCTOR DEVICE STRUCTURES
60
Patent #:
Issue Dt:
10/30/2012
Application #:
12634742
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
09/23/2010
Title:
INTERCONNECT STRUCTURES, METHODS FOR FABRICATING INTERCONNECT STRUCTURES, AND DESIGN STRUCTURES FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
61
Patent #:
Issue Dt:
04/15/2014
Application #:
12634893
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
06/02/2011
Title:
SILICON-ON-INSULATOR (SOI) STRUCTURE CONFIGURED FOR REDUCED HARMONICS, DESIGN STRUCTURE AND METHOD
62
Patent #:
Issue Dt:
01/31/2012
Application #:
12634898
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
04/08/2010
Title:
CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
63
Patent #:
Issue Dt:
10/05/2010
Application #:
12635385
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
04/15/2010
Title:
DIRECT MEMORY ACCESS (DMA) ADDRESS TRANSLATION IN AN INPUT/OUTPUT MEMORY MANAGEMENT UNIT (IOMMU)
64
Patent #:
Issue Dt:
10/25/2011
Application #:
12635599
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
06/16/2011
Title:
IMPROVING DATA AVAILABILITY DURING FAILURE DETECTION AND RECOVERY PROCESSING IN A SHARED RESOURCE SYSTEM
65
Patent #:
Issue Dt:
02/05/2013
Application #:
12636015
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
06/16/2011
Title:
REMOVAL OF MASKING MATERIAL
66
Patent #:
Issue Dt:
08/04/2015
Application #:
12636057
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
06/16/2011
Title:
ANALYZING COMPUTER PROGRAMS TO IDENTIFY ERRORS
67
Patent #:
Issue Dt:
06/18/2013
Application #:
12636426
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
06/16/2011
Title:
ISOLATION OF SINGLE-WALLED CARBON NANOTUBES FROM DOUBLE AND MULTI-WALLED CARBON NANOTUBES
68
Patent #:
Issue Dt:
02/25/2014
Application #:
12637016
Filing Dt:
12/14/2009
Publication #:
Pub Dt:
06/16/2011
Title:
Modeling for Soft Error Specification
69
Patent #:
Issue Dt:
01/21/2014
Application #:
12637048
Filing Dt:
12/14/2009
Publication #:
Pub Dt:
04/15/2010
Title:
WAFER WITH DESIGN PRINTED OUTSIDE ACTIVE REGION AND SPACED BY DESIGN TOLERANCE OF RETICLE BLIND
70
Patent #:
Issue Dt:
11/08/2011
Application #:
12638004
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
SEMICONDUCTOR STRUCTURE INCORPORATING MULTIPLE NITRIDE LAYERS TO IMPROVE THERMAL DISSIPATION AWAY FROM A DEVICE AND A METHOD OF FORMING THE STRUCTURE
71
Patent #:
Issue Dt:
09/27/2011
Application #:
12639454
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
06/16/2011
Title:
LEAKAGE COMPENSATED REFERENCE VOLTAGE GENERATION SYSTEM
72
Patent #:
Issue Dt:
10/02/2012
Application #:
12640129
Filing Dt:
12/17/2009
Publication #:
Pub Dt:
06/23/2011
Title:
PROPAGATING DESIGN TOLERANCES TO SHAPE TOLERANCES FOR LITHOGRAPHY
73
Patent #:
Issue Dt:
03/27/2012
Application #:
12640192
Filing Dt:
12/17/2009
Publication #:
Pub Dt:
04/15/2010
Title:
LATERAL TRENCH FETS (FIELD EFFECT TRANSISTORS)
74
Patent #:
Issue Dt:
06/05/2012
Application #:
12640444
Filing Dt:
12/17/2009
Publication #:
Pub Dt:
07/01/2010
Title:
LOCAL SILICIDATION OF VIA BOTTOMS IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES
75
Patent #:
Issue Dt:
05/21/2013
Application #:
12640752
Filing Dt:
12/17/2009
Publication #:
Pub Dt:
06/23/2011
Title:
STRUCTURES AND METHODS TO REDUCE MAXIMUM CURRENT DENSITY IN A SOLDER BALL
76
Patent #:
Issue Dt:
09/02/2014
Application #:
12641959
Filing Dt:
12/18/2009
Publication #:
Pub Dt:
06/23/2011
Title:
METHODS OF DIRECTED SELF-ASSEMBLY AND LAYERED STRUCTURES FORMED THEREFROM
77
Patent #:
Issue Dt:
01/07/2014
Application #:
12642018
Filing Dt:
12/18/2009
Publication #:
Pub Dt:
06/23/2011
Title:
METHODS OF DIRECTED SELF-ASSEMBLY, AND LAYERED STRUCTURES FORMED THEREFROM
78
Patent #:
Issue Dt:
06/10/2014
Application #:
12642331
Filing Dt:
12/18/2009
Publication #:
Pub Dt:
06/23/2011
Title:
METHOD OF MANUFACTURING SUPERCONDUCTING LOW PASS FILTER FOR QUANTUM COMPUTING
79
Patent #:
Issue Dt:
07/17/2012
Application #:
12642806
Filing Dt:
12/19/2009
Publication #:
Pub Dt:
06/23/2011
Title:
SYSTEM TO IMPROVE CORELESS PACKAGE CONNECTIONS
80
Patent #:
Issue Dt:
10/22/2013
Application #:
12642989
Filing Dt:
12/21/2009
Publication #:
Pub Dt:
07/01/2010
Title:
HEAT DISSIPATION IN TEMPERATURE CRITICAL DEVICE AREAS OF SEMICONDUCTOR DEVICES BY HEAT PIPES CONNECTING TO THE SUBSTRATE BACKSIDE
81
Patent #:
Issue Dt:
08/28/2012
Application #:
12643454
Filing Dt:
12/21/2009
Publication #:
Pub Dt:
06/23/2011
Title:
SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
82
Patent #:
Issue Dt:
08/14/2012
Application #:
12644895
Filing Dt:
12/22/2009
Publication #:
Pub Dt:
08/26/2010
Title:
SEMICONDUCTOR SWITCHING DEVICE EMPLOYING A QUANTUM DOT STRUCTURE
83
Patent #:
Issue Dt:
12/11/2012
Application #:
12644980
Filing Dt:
12/22/2009
Publication #:
Pub Dt:
06/23/2011
Title:
SIGNAL CONTROL ELEMENTS IN FERROMAGNETIC LOGIC
84
Patent #:
Issue Dt:
08/13/2013
Application #:
12645583
Filing Dt:
12/23/2009
Publication #:
Pub Dt:
07/01/2010
Title:
ELECTROCHEMICAL PLANARIZATION SYSTEM COMPRISING ENHANCED ELECTROLYTE FLOW
85
Patent #:
Issue Dt:
07/31/2012
Application #:
12645981
Filing Dt:
12/23/2009
Publication #:
Pub Dt:
04/22/2010
Title:
SEMICONDUCTOR TRANSISTORS HAVING HIGH-K GATE DIELECTRIC LAYERS, METAL GATE ELECTRODE REGIONS, AND LOW FRINGING CAPACITANCES
86
Patent #:
Issue Dt:
03/29/2011
Application #:
12646292
Filing Dt:
12/23/2009
Publication #:
Pub Dt:
04/22/2010
Title:
ON DEMAND CIRCUIT FUNCTION EXECUTION EMPLOYING OPTICAL SENSING
87
Patent #:
Issue Dt:
08/14/2012
Application #:
12647796
Filing Dt:
12/28/2009
Publication #:
Pub Dt:
06/30/2011
Title:
STRUCTURE AND METHOD TO CREATE STRESS TRENCH
88
Patent #:
Issue Dt:
12/11/2012
Application #:
12647888
Filing Dt:
12/28/2009
Publication #:
Pub Dt:
06/30/2011
Title:
EFUSE ENABLEMENT WITH THIN POLYSILICON OR AMORPHOUS-SILICON GATE-STACK FOR HKMG CMOS
89
Patent #:
Issue Dt:
07/14/2015
Application #:
12647999
Filing Dt:
12/28/2009
Publication #:
Pub Dt:
06/30/2011
Title:
ELECTROMIGRATION-RESISTANT UNDER-BUMP METALLIZATION OF NICKEL-IRON ALLOYS FOR SN-RICH SOLDER BUMPS IN PB-FREE FLIP-CHIP
90
Patent #:
Issue Dt:
05/28/2013
Application #:
12648400
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
07/01/2010
Title:
ADJUSTING CONFIGURATION OF A MULTIPLE GATE TRANSISTOR BY CONTROLLING INDIVIDUAL FINS
91
Patent #:
Issue Dt:
01/01/2013
Application #:
12648442
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
06/30/2011
Title:
AUTOMATED RELATIONSHIP CLASSIFICATION
92
Patent #:
Issue Dt:
08/14/2012
Application #:
12648456
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
06/30/2011
Title:
GENERATING CAPACITANCE LOOK-UP TABLES FOR WIRING PATTERNS IN THE PRESENCE OF METAL FILLS
93
Patent #:
Issue Dt:
08/27/2013
Application #:
12648744
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
07/01/2010
Title:
ADJUSTING OF STRAIN CAUSED IN A TRANSISTOR CHANNEL BY SEMICONDUCTOR MATERIAL PROVIDED FOR THRESHOLD ADJUSTMENT
94
Patent #:
Issue Dt:
12/25/2012
Application #:
12648867
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
07/01/2010
Title:
TRANSISTOR DEVICE COMPRISING AN EMBEDDED SEMICONDUCTOR ALLOY HAVING AN ASYMMETRIC CONFIGURATION
95
Patent #:
Issue Dt:
07/05/2011
Application #:
12649199
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
04/29/2010
Title:
PRODUCT-RELATED FEEDBACK FOR PROCESS CONTROL
96
Patent #:
Issue Dt:
05/01/2012
Application #:
12649391
Filing Dt:
12/30/2009
Publication #:
Pub Dt:
05/06/2010
Title:
OPTICAL INSPECTION METHODS
97
Patent #:
Issue Dt:
01/11/2011
Application #:
12651499
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
04/29/2010
Title:
SOI FET WITH SOURCE-SIDE BODY DOPING
98
Patent #:
Issue Dt:
11/08/2011
Application #:
12651504
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
07/07/2011
Title:
ULTRA LOW-POWER CMOS BASED BIO-SENSOR CIRCUIT
99
Patent #:
Issue Dt:
02/22/2011
Application #:
12651608
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
04/29/2010
Title:
TRENCH MEMORY WITH SELF-ALIGNED STRAP FORMED BY SELF-LIMITING PROCESS
100
Patent #:
Issue Dt:
07/31/2012
Application #:
12651804
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
07/07/2011
Title:
MAGNETIC TUNNEL JUNCTION TRANSISTOR DEVICE
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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