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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/30/2012
Application #:
12652275
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
06/10/2010
Title:
MOSFET WITH MULTIPLE FULLY SILICIDED GATE AND METHOD FOR MAKING THE SAME
2
Patent #:
Issue Dt:
06/12/2012
Application #:
12652338
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
07/07/2011
Title:
TIMING POINT SELECTION FOR A STATIC TIMING ANALYSIS IN THE PRESENCE OF INTERCONNECT ELECTRICAL ELEMENTS
3
Patent #:
Issue Dt:
08/09/2011
Application #:
12652428
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
06/10/2010
Title:
METAL-GATED MOSFET DEVICES HAVING SCALED GATE STACK THICKNESS INCLUDING GETTERING SPECIES IN A BURIED OXIDE
4
Patent #:
Issue Dt:
07/24/2012
Application #:
12652546
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
07/07/2011
Title:
ANALYZING ANTICIPATED VALUE AND EFFORT IN USING CLOUD COMPUTING TO PROCESS A SPECIFIED WORKLOAD
5
Patent #:
Issue Dt:
08/08/2017
Application #:
12658615
Filing Dt:
02/08/2010
Publication #:
Pub Dt:
11/25/2010
Title:
COATING COMPOSITIONS SUITABLE FOR USE WITH AN OVERCOATED PHOTORESIST
6
Patent #:
Issue Dt:
03/20/2012
Application #:
12674065
Filing Dt:
02/18/2010
Publication #:
Pub Dt:
04/28/2011
Title:
APPARATUS FOR EXTERNALLY CHANGING THE DIRECTION OF AIR FLOWING THROUGH ELECTRONIC EQUIPMENT
7
Patent #:
Issue Dt:
01/29/2013
Application #:
12678298
Filing Dt:
07/08/2010
Publication #:
Pub Dt:
11/18/2010
Title:
INTEGRATED CIRCUIT STACK
8
Patent #:
Issue Dt:
02/28/2012
Application #:
12683080
Filing Dt:
01/06/2010
Publication #:
Pub Dt:
07/07/2011
Title:
TUNNEL JUNCTION VIA
9
Patent #:
Issue Dt:
07/31/2012
Application #:
12683456
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
BULK SUBSTRATE FET INTEGRATED ON CMOS SOI
10
Patent #:
Issue Dt:
04/08/2014
Application #:
12683465
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
SUPERFILLED METAL CONTACT VIAS FOR SEMICONDUCTOR DEVICES
11
Patent #:
Issue Dt:
04/17/2012
Application #:
12683535
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
05/06/2010
Title:
CMOS STRUCTURE AND METHOD FOR FABRICATION THEREOF USING MULTIPLE CRYSTALLOGRAPHIC ORIENTATIONS AND GATE MATERIALS
12
Patent #:
Issue Dt:
05/21/2013
Application #:
12683602
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
ASYMMETRIC FET INCLUDING SLOPED THRESHOLD VOLTAGE ADJUSTING MATERIAL LAYER AND METHOD OF FABRICATING SAME
13
Patent #:
Issue Dt:
04/23/2013
Application #:
12683606
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
BODY-TIED ASYMMETRIC P-TYPE FIELD EFFECT TRANSISTOR
14
Patent #:
Issue Dt:
02/04/2014
Application #:
12683634
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
Body-Tied Asymmetric N-Type Field Effect Transistor
15
Patent #:
Issue Dt:
07/24/2012
Application #:
12683720
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
METHOD AND SYSTEM FOR FEATURE FUNCTION AWARE PRIORITY PRINTING
16
Patent #:
Issue Dt:
04/29/2014
Application #:
12683759
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
METHOD TO DYNAMICALLY TUNE PRECISION RESISTANCE
17
Patent #:
Issue Dt:
12/06/2011
Application #:
12683770
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
LOW CAPACITANCE PRECISION RESISTOR
18
Patent #:
Issue Dt:
04/09/2013
Application #:
12683857
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
07/07/2011
Title:
SELECTIVE COPPER ENCAPSULATION LAYER DEPOSITION
19
Patent #:
Issue Dt:
09/18/2012
Application #:
12684174
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
PRECAST THERMAL INTERFACE ADHESIVE FOR EASY AND REPEATED, SEPARATION AND REMATING
20
Patent #:
Issue Dt:
09/13/2011
Application #:
12684185
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
DEPOSITION OF AMORPHOUS PHASE CHANGE MATERIAL
21
Patent #:
Issue Dt:
10/04/2011
Application #:
12684225
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
BACK-GATED FULLY DEPLETED SOI TRANSISTOR
22
Patent #:
Issue Dt:
05/13/2014
Application #:
12684280
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
NANOWIRE PIN TUNNEL FIELD EFFECT DEVICES
23
Patent #:
Issue Dt:
09/11/2012
Application #:
12684331
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
STRUCTURE FOR USE IN FABRICATION OF PIN HETEROJUNCTION TFET
24
Patent #:
Issue Dt:
10/09/2012
Application #:
12684372
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
OPTIMIZED FREE LAYER FOR SPIN TORQUE MAGNETIC RANDOM ACCESS MEMORY
25
Patent #:
Issue Dt:
01/31/2012
Application #:
12684510
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
READ DIRECTION FOR SPIN-TORQUE BASED MEMORY DEVICE
26
Patent #:
Issue Dt:
12/20/2011
Application #:
12684551
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
05/06/2010
Title:
FABRICATING SEMICONDUCTOR STRUCTURES
27
Patent #:
Issue Dt:
07/30/2013
Application #:
12684697
Filing Dt:
01/08/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD OF FABRICATING MULTI-FINGERED SEMICONDUCTOR DEVICES ON A COMMON SUBSTRATE
28
Patent #:
Issue Dt:
09/30/2014
Application #:
12685022
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
08/05/2010
Title:
METHOD AND SYSTEM FOR SEMICONDUCTOR PROCESS CONTROL AND MONITORING BY USING A DATA QUALITY METRIC
29
Patent #:
Issue Dt:
04/26/2011
Application #:
12685027
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
05/06/2010
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE
30
Patent #:
Issue Dt:
04/19/2011
Application #:
12685054
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
05/06/2010
Title:
METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES
31
Patent #:
Issue Dt:
07/23/2013
Application #:
12685156
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
07/14/2011
Title:
DEEP TRENCH DECOUPLING CAPACITOR
32
Patent #:
Issue Dt:
05/22/2012
Application #:
12685393
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD AND SYSTEM FOR DETERMINING MANUFACTURING THROUGHPUT TARGET
33
Patent #:
Issue Dt:
05/08/2012
Application #:
12685491
Filing Dt:
01/11/2010
Publication #:
Pub Dt:
07/15/2010
Title:
METHOD AND APPARATUS FOR SUB-PELLICLE DEFECT REDUCTION ON PHOTOMASKS
34
Patent #:
Issue Dt:
10/30/2012
Application #:
12685734
Filing Dt:
01/12/2010
Publication #:
Pub Dt:
07/14/2011
Title:
NANOPOROUS SEMI-PERMEABLE MEMBRANE AND METHODS FOR FABRICATING THE SAME
35
Patent #:
Issue Dt:
07/23/2013
Application #:
12685938
Filing Dt:
01/12/2010
Publication #:
Pub Dt:
07/14/2011
Title:
Chemical-Mechanical Polishing Formulation and Methods of Use
36
Patent #:
Issue Dt:
10/30/2012
Application #:
12686013
Filing Dt:
01/12/2010
Publication #:
Pub Dt:
07/14/2011
Title:
CHARGE PUMP SYSTEM AND METHOD UTILIZING ADJUSTABLE OUTPUT CHARGE AND COMPILATION SYSTEM AND METHOD FOR USE BY THE CHARGE PUMP
37
Patent #:
Issue Dt:
04/17/2012
Application #:
12686403
Filing Dt:
01/13/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD AND STRUCTURE FOR FORMING CAPACITORS AND MEMORY DEVICES ON SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES
38
Patent #:
Issue Dt:
10/15/2013
Application #:
12686457
Filing Dt:
01/13/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD OF MANAGING ELECTRO MIGRATION IN LOGIC DESIGNS AND DESIGN STRUCTURE THEREOF
39
Patent #:
Issue Dt:
07/10/2012
Application #:
12687147
Filing Dt:
01/14/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD FOR CREATING ELECTRICALLY TESTABLE PATTERNS
40
Patent #:
Issue Dt:
01/01/2013
Application #:
12687273
Filing Dt:
01/14/2010
Publication #:
Pub Dt:
07/14/2011
Title:
EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) INTEGRATED CIRCUIT WITH ON-CHIP RESISTORS AND METHOD OF FORMING THE SAME
41
Patent #:
Issue Dt:
02/12/2013
Application #:
12687607
Filing Dt:
01/14/2010
Publication #:
Pub Dt:
07/14/2011
Title:
SEMICONDUCTOR TRANSISTOR DEVICE STRUCTURE WITH BACK SIDE SOURCE/DRAIN CONTACT PLUGS, AND RELATED MANUFACTURING METHOD
42
Patent #:
Issue Dt:
10/23/2012
Application #:
12687610
Filing Dt:
01/14/2010
Publication #:
Pub Dt:
07/14/2011
Title:
SEMICONDUCTOR TRANSISTOR DEVICE STRUCTURE WITH BACK SIDE GATE CONTACT PLUGS, AND RELATED MANUFACTURING METHOD
43
Patent #:
Issue Dt:
02/21/2012
Application #:
12688243
Filing Dt:
01/15/2010
Publication #:
Pub Dt:
05/13/2010
Title:
HIGH PERFORMANCE CAPACITORS IN PLANAR BACK GATES CMOS
44
Patent #:
Issue Dt:
09/17/2013
Application #:
12688254
Filing Dt:
01/15/2010
Publication #:
Pub Dt:
05/13/2010
Title:
METHODS AND SYSTEMS INVOLVING ELECTRICALLY REPROGRAMMABLE FUSES
45
Patent #:
Issue Dt:
08/14/2012
Application #:
12688347
Filing Dt:
01/15/2010
Publication #:
Pub Dt:
07/21/2011
Title:
FINFET WITH THIN GATE DIELECTRIC LAYER
46
Patent #:
Issue Dt:
02/15/2011
Application #:
12688470
Filing Dt:
01/15/2010
Publication #:
Pub Dt:
05/13/2010
Title:
SEMICONDUCTOR STRUCTURES INCORPORATING MULTIPLE CRYSTALLOGRAPHIC PLANES AND METHODS FOR FABRICATION THEREOF
47
Patent #:
Issue Dt:
07/17/2012
Application #:
12688471
Filing Dt:
01/15/2010
Publication #:
Pub Dt:
07/21/2011
Title:
CMOS CIRCUIT WITH LOW-K SPACER AND STRESS LINER
48
Patent #:
Issue Dt:
10/09/2012
Application #:
12688929
Filing Dt:
01/18/2010
Publication #:
Pub Dt:
07/29/2010
Title:
HIGH PERFORMANCE FLASH MEMORY DEVICES
49
Patent #:
Issue Dt:
01/29/2013
Application #:
12689268
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
METHOD AND STRUCTURE TO REDUCE SOFT ERROR RATE SUSCEPTIBILITY IN SEMICONDUCTOR STRUCTURES
50
Patent #:
Issue Dt:
05/01/2012
Application #:
12689339
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
STRAINED CMOS DEVICE, CIRCUIT AND METHOD OF FABRICATION
51
Patent #:
Issue Dt:
10/16/2012
Application #:
12689346
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
DEVICE STRUCTURE, LAYOUT AND FABRICATION METHOD FOR UNIAXIALLY STRAINED TRANSISTORS
52
Patent #:
Issue Dt:
12/22/2015
Application #:
12689455
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
3D CHIP STACK HAVING ENCAPSULATED CHIP-IN-CHIP
53
Patent #:
Issue Dt:
10/23/2012
Application #:
12689464
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
EFFICIENCY IN ANTIREFLECTIVE COATING LAYERS FOR SOLAR CELLS
54
Patent #:
Issue Dt:
10/30/2012
Application #:
12689481
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
LEAKAGE AWARE DESIGN POST-PROCESSING
55
Patent #:
Issue Dt:
07/23/2013
Application #:
12689501
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
08/19/2010
Title:
HIGHLY SCALABLE TRENCH CAPACITOR
56
Patent #:
Issue Dt:
08/20/2013
Application #:
12689743
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
07/21/2011
Title:
METHOD AND STRUCTURE FOR FORMING HIGH PERFORMANCE MOS CAPACITOR ALONG WITH FULLY DEPLETED SEMICONDUCTOR ON INSULATOR DEVICES ON THE SAME CHIP
57
Patent #:
Issue Dt:
04/09/2013
Application #:
12690178
Filing Dt:
01/20/2010
Publication #:
Pub Dt:
07/21/2011
Title:
FIELD-EFFECT TRANSISTOR DEVICE HAVING A METAL GATE STACK WITH AN OXYGEN BARRIER LAYER
58
Patent #:
Issue Dt:
12/03/2013
Application #:
12690467
Filing Dt:
01/20/2010
Publication #:
Pub Dt:
07/21/2011
Title:
HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
59
Patent #:
Issue Dt:
01/01/2013
Application #:
12691192
Filing Dt:
01/21/2010
Publication #:
Pub Dt:
08/05/2010
Title:
WORK FUNCTION ADJUSTMENT IN A HIGH-K GATE ELECTRODE STRUCTURE AFTER TRANSISTOR FABRICATION BY USING LANTHANUM
60
Patent #:
Issue Dt:
07/31/2012
Application #:
12691213
Filing Dt:
01/21/2010
Publication #:
Pub Dt:
07/21/2011
Title:
INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING ENHANCED ELECTROMIGRATION RESISTANCE
61
Patent #:
Issue Dt:
11/13/2012
Application #:
12692198
Filing Dt:
01/22/2010
Publication #:
Pub Dt:
07/28/2011
Title:
NAVIGATING ANALYTICAL TOOLS USING LAYOUT SOFTWARE
62
Patent #:
Issue Dt:
08/14/2012
Application #:
12692698
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
08/05/2010
Title:
SHORT CHANNEL TRANSISTOR WITH REDUCED LENGTH VARIATION BY USING AMORPHOUS ELECTRODE MATERIAL DURING IMPLANTATION
63
Patent #:
Issue Dt:
06/16/2015
Application #:
12692760
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
07/28/2011
Title:
EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD
64
Patent #:
Issue Dt:
08/02/2011
Application #:
12692859
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
07/28/2011
Title:
TRANSISTOR HAVING V-SHAPED EMBEDDED STRESSOR
65
Patent #:
Issue Dt:
02/26/2013
Application #:
12692923
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
08/05/2010
Title:
NON-VOLATILE MEMORY DEVICE USING HOT-CARRIER INJECTION
66
Patent #:
Issue Dt:
01/01/2013
Application #:
12692961
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
07/28/2011
Title:
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
67
Patent #:
Issue Dt:
02/19/2013
Application #:
12693030
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
08/05/2010
Title:
METHOD OF FORMING A METALLIZATION SYSTEM OF A SEMICONDUCTOR DEVICE BY USING A HARD MASK FOR DEFINING THE VIA SIZE
68
Patent #:
Issue Dt:
02/07/2012
Application #:
12693373
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
07/28/2011
Title:
AUTOMATED SYSTEM PROBLEM DIAGNOSING
69
Patent #:
Issue Dt:
03/06/2012
Application #:
12693545
Filing Dt:
01/26/2010
Publication #:
Pub Dt:
08/05/2010
Title:
VOID SEALING IN A DIELECTRIC MATERIAL OF A CONTACT LEVEL OF A SEMICONDUCTOR DEVICE COMPRISING CLOSELY SPACED TRANSISTORS
70
Patent #:
Issue Dt:
04/17/2012
Application #:
12694649
Filing Dt:
01/27/2010
Publication #:
Pub Dt:
07/28/2011
Title:
FIELD EFFECT TRANSISTORS (FETS) AND METHODS OF MANUFACTURE
71
Patent #:
Issue Dt:
07/24/2012
Application #:
12695494
Filing Dt:
01/28/2010
Publication #:
Pub Dt:
07/28/2011
Title:
MODEL BASED SIMULATION OF ELECTRONIC DISCHARGE AND OPTIMIZATION METHODOLOGY FOR DESIGN CHECKING
72
Patent #:
Issue Dt:
06/14/2011
Application #:
12695660
Filing Dt:
01/28/2010
Publication #:
Pub Dt:
05/27/2010
Title:
GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT DESCRIPTION
73
Patent #:
Issue Dt:
07/24/2012
Application #:
12695991
Filing Dt:
01/28/2010
Publication #:
Pub Dt:
07/28/2011
Title:
SURFACE MODIFIED NANOPARTICLES, METHODS OF THEIR PREPARATION, AND USES THEREOF FOR GENE AND DRUG DELIVERY
74
Patent #:
Issue Dt:
05/01/2012
Application #:
12696104
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
RADIO FREQUENCY-ENABLED ELECTROMIGRATION FUSE
75
Patent #:
Issue Dt:
09/11/2012
Application #:
12696186
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
ORDERING OF STATISTICAL CORRELATED QUANTITIES
76
Patent #:
Issue Dt:
04/17/2012
Application #:
12696227
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
08/05/2010
Title:
SWITCHABLE ELEMENT
77
Patent #:
Issue Dt:
01/08/2013
Application #:
12696417
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
NANOSCALE CHEMICAL TEMPLATING WITH OXYGEN REACTIVE MATERIALS
78
Patent #:
Issue Dt:
12/04/2012
Application #:
12696746
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD AND APPARATUS OF PARALLEL COMPUTING WITH SIMULTANEOUSLY OPERATING STREAM PREFETCHING AND LIST PREFETCHING ENGINES
79
Patent #:
Issue Dt:
04/02/2013
Application #:
12696764
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
05/19/2011
Title:
GLOBAL SYNCHRONIZATION OF PARALLEL PROCESSORS USING CLOCK PULSE WIDTH MODULATION
80
Patent #:
Issue Dt:
01/24/2012
Application #:
12696780
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
05/19/2011
Title:
LOCAL ROLLBACK FOR FAULT-TOLERANCE IN PARALLEL COMPUTING SYSTEMS
81
Patent #:
Issue Dt:
09/03/2013
Application #:
12697164
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
05/19/2011
Title:
MECHANISM OF SUPPORTING SUB-COMMUNICATOR COLLECTIVES WITH O(64) COUNTERS AS OPPOSED TO ONE COUNTER FOR EACH SUB-COMMUNICATOR
82
Patent #:
Issue Dt:
10/30/2012
Application #:
12697556
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
08/05/2010
Title:
PERFORMING OPTICAL PROXIMITY CORRECTION BY INCORPORATING CRITICAL DIMENSION CORRECTION
83
Patent #:
Issue Dt:
04/17/2012
Application #:
12697562
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
08/05/2010
Title:
METHOD OF MAKING 3D INTEGRATED CIRCUITS
84
Patent #:
Issue Dt:
07/19/2011
Application #:
12697778
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
06/03/2010
Title:
CMOS-PROCESS-COMPATIBLE PROGRAMMABLE VIA DEVICE
85
Patent #:
Issue Dt:
03/20/2012
Application #:
12697787
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
08/04/2011
Title:
ASSESSING, FORECASTING AND SIMULATING ENERGY CONSUMPTION OF BUILDINGS USING ENERGY EFFICIENCY COEFFICIENTS
86
Patent #:
Issue Dt:
02/03/2015
Application #:
12697799
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
05/19/2011
Title:
CONDITIONAL LOAD AND STORE IN A SHARED MEMORY
87
Patent #:
Issue Dt:
10/12/2010
Application #:
12697805
Filing Dt:
02/01/2010
Publication #:
Pub Dt:
05/27/2010
Title:
CMOS-PROCESS-COMPATIBLE PROGRAMMABLE VIA DEVICE
88
Patent #:
Issue Dt:
02/22/2011
Application #:
12698141
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
06/03/2010
Title:
MULTI-LEVEL MEMORY CELL UTILIZING MEASUREMENT TIME DELAY AS THE CHARACTERISTIC PARAMETER FOR LEVEL DEFINITION
89
Patent #:
Issue Dt:
11/30/2010
Application #:
12698189
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
06/03/2010
Title:
THERMALLY PROGRAMMABLE ANTI-REVERSE ENGINEERING INTERCONNECTS WHEREIN INTERCONNECTS ONLY CONDUCT WHEN HEATED ABOVE ROOM TEMPERATURE
90
Patent #:
Issue Dt:
12/04/2012
Application #:
12698191
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/04/2011
Title:
FIELD EFFECT TRANSISTOR (FET) AND METHOD OF FORMING THE FET WITHOUT DAMAGING THE WAFER SURFACE
91
Patent #:
Issue Dt:
04/03/2012
Application #:
12698258
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/04/2011
Title:
MULTI-OUTPUT PLL OUTPUT SHIFT
92
Patent #:
Issue Dt:
04/23/2013
Application #:
12698293
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/05/2010
Title:
EMBEDDED DRAM MEMORY CELL WITH ADDITIONAL PATTERNING LAYER FOR IMPROVED STRAP FORMATION
93
Patent #:
Issue Dt:
02/19/2013
Application #:
12698448
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/12/2010
Title:
CUT FIRST METHODOLOGY FOR DOUBLE EXPOSURE DOUBLE ETCH INTEGRATION
94
Patent #:
Issue Dt:
03/19/2013
Application #:
12698629
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/04/2011
Title:
POST-EQUALIZATION AMPLITUDE LATCH-BASED CHANNEL CHARACTERISTIC MEASUREMENT
95
Patent #:
Issue Dt:
12/10/2013
Application #:
12698759
Filing Dt:
02/02/2010
Publication #:
Pub Dt:
08/04/2011
Title:
EXTREMELY COMPACT TABLE LOOKUP METHOD FOR FAST AND ACCURATE PHYSICS BASED MODELS FOR SPICE-LIKE SIMULATORS
96
Patent #:
Issue Dt:
10/23/2012
Application #:
12699211
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/12/2010
Title:
DETECTING ASYMMETRICAL TRANSISTOR LEAKAGE DEFECTS
97
Patent #:
Issue Dt:
10/30/2012
Application #:
12699225
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
09/09/2010
Title:
CMOS TRANSISTORS WITH SILICON GERMANIUM CHANNEL AND DUAL EMBEDDED STRESSORS
98
Patent #:
Issue Dt:
10/16/2012
Application #:
12699411
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/04/2011
Title:
HIGH ENERGY DENSITY STORAGE MATERIAL DEVICE USING NANOCHANNEL STRUCTURE
99
Patent #:
Issue Dt:
08/02/2011
Application #:
12699592
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/04/2011
Title:
EFFICIENT RATELESS DISTRIBUTED COMPRESSION OF NON-BINARY SOURCES
100
Patent #:
Issue Dt:
10/16/2012
Application #:
12699601
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/19/2010
Title:
METHOD OF MAKING AN MIM CAPACITOR AND MIM CAPACITOR STRUCTURE FORMED THEREBY
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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