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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/16/2012
Application #:
12780962
Filing Dt:
05/17/2010
Publication #:
Pub Dt:
09/02/2010
Title:
FORMATION OF RAISED SOURCE/DRAIN STRUCTURES IN NFET WITH EMBEDDED SIGE IN PFET
2
Patent #:
Issue Dt:
09/09/2014
Application #:
12781514
Filing Dt:
05/17/2010
Publication #:
Pub Dt:
11/17/2011
Title:
FET Nanopore Sensor
3
Patent #:
Issue Dt:
08/23/2011
Application #:
12781851
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
09/02/2010
Title:
REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC CIRCUIT
4
Patent #:
Issue Dt:
11/08/2011
Application #:
12782320
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
11/24/2011
Title:
BODY CONTACT STRUCTURES AND METHODS OF MANUFACTURING THE SAME
5
Patent #:
Issue Dt:
10/30/2012
Application #:
12782359
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
11/24/2011
Title:
METHOD AND SYSTEM TO OPTIMIZE SEMICONDUCTOR PRODUCTS FOR POWER, PERFORMANCE, NOISE, AND COST THROUGH USE OF VARIABLE POWER SUPPLY VOLTAGE COMPRESSION
6
Patent #:
Issue Dt:
06/14/2011
Application #:
12782388
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
09/09/2010
Title:
PARTIALLY AND FULLY SILICIDED GATE STACKS
7
Patent #:
Issue Dt:
01/01/2013
Application #:
12782407
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
11/24/2011
Title:
EQUATION BASED RETARGETING OF DESIGN LAYOUTS
8
Patent #:
Issue Dt:
05/21/2013
Application #:
12783676
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
11/24/2011
Title:
GRAPHENE CHANNEL-BASED DEVICES AND METHODS FOR FABRICATION THEREOF
9
Patent #:
Issue Dt:
12/11/2012
Application #:
12783702
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
11/24/2011
Title:
FOREIGN MATERIAL CONTAMINATION DETECTION
10
Patent #:
Issue Dt:
02/25/2014
Application #:
12783787
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
11/04/2010
Title:
ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
11
Patent #:
Issue Dt:
02/17/2015
Application #:
12783914
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
11/24/2011
Title:
SHALLOW TRENCH ISOLATION EXTENSION
12
Patent #:
Issue Dt:
06/18/2013
Application #:
12784583
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
11/24/2011
Title:
ASYMMETRIC SILICON-ON-INSULATOR (SOI) JUNCTION FIELD EFFECT TRANSISTOR (JFET) AND A METHOD OF FORMING THE ASYMMETRICAL SOI JFET
13
Patent #:
Issue Dt:
08/21/2012
Application #:
12784688
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
12/09/2010
Title:
THIN SUBSTRATE FABRICATION USING STRESS-INDUCED SUBSTRATE SPALLING
14
Patent #:
Issue Dt:
11/22/2011
Application #:
12784819
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
12/02/2010
Title:
STRAIN TRANSFORMATION IN BIAXIALLY STRAINED SOI SUBSTRATES FOR PERFORMANCE ENHANCEMENT OF P-CHANNEL AND N-CHANNEL TRANSISTORS
15
Patent #:
Issue Dt:
04/26/2011
Application #:
12785007
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
11/25/2010
Title:
ELECTRO-OPTICAL MEMORY CELL
16
Patent #:
Issue Dt:
10/30/2012
Application #:
12785185
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
12/02/2010
Title:
WORK FUNCTION ADJUSTMENT IN HIGH-K METAL GATE ELECTRODE STRUCTURES BY SELECTIVELY REMOVING A BARRIER LAYER
17
Patent #:
Issue Dt:
05/17/2011
Application #:
12785435
Filing Dt:
05/22/2010
Publication #:
Pub Dt:
09/16/2010
Title:
METHOD TO IMPROVE REQUIREMENTS, DESIGN MANUFACTURING, AND TRANSPORTATION IN MASS MANUFACTURING INDUSTRIES THROUGH ANALYSIS OF DEFECT DATA
18
Patent #:
Issue Dt:
10/09/2012
Application #:
12785849
Filing Dt:
05/24/2010
Publication #:
Pub Dt:
12/02/2010
Title:
ENHANCED ETCH STOP CAPABILITY DURING PATTERNING OF SILICON NITRIDE INCLUDING LAYER STACKS BY PROVIDING A CHEMICALLY FORMED OXIDE LAYER DURING SEMICONDUCTOR PROCESSING
19
Patent #:
Issue Dt:
11/01/2011
Application #:
12786019
Filing Dt:
05/24/2010
Publication #:
Pub Dt:
12/02/2010
Title:
MICROSTRUCTURE DEVICE INCLUDING A METALLIZATION STRUCTURE WITH SELF-ALIGNED AIR GAPS FORMED BASED ON A SACRIFICIAL MATERIAL
20
Patent #:
Issue Dt:
06/12/2012
Application #:
12786572
Filing Dt:
05/25/2010
Publication #:
Pub Dt:
12/01/2011
Title:
COMPUTING RESISTANCE SENSITIVITIES WITH RESPECT TO GEOMETRIC PARAMETERS OF CONDUCTORS WITH ARBITRARY SHAPES
21
Patent #:
Issue Dt:
03/19/2013
Application #:
12786829
Filing Dt:
05/25/2010
Publication #:
Pub Dt:
12/02/2010
Title:
ESTABLISHING A HYDROPHOBIC SURFACE OF SENSITIVE LOW-K DIELECTRICS OF MICROSTRUCTURE DEVICES BY IN SITU PLASMA TREATMENT
22
Patent #:
Issue Dt:
04/22/2014
Application #:
12786956
Filing Dt:
05/25/2010
Publication #:
Pub Dt:
12/01/2011
Title:
ELECTRICALLY PROGRAMMABLE FLOATING COMMON GATE CMOS DEVICE AND APPLICATIONS THEREOF
23
Patent #:
Issue Dt:
05/08/2012
Application #:
12787167
Filing Dt:
05/25/2010
Publication #:
Pub Dt:
09/16/2010
Title:
POWER MANAGEMENT ARCHITECTURE AND METHOD OF MODULATING OSCILLATOR FREQUENCY BASED ON VOLTAGE SUPPLY
24
Patent #:
Issue Dt:
03/20/2012
Application #:
12787417
Filing Dt:
05/26/2010
Publication #:
Pub Dt:
09/16/2010
Title:
METHOD AND SYSTEM FOR TONE INVERTING OF RESIDUAL LAYER TOLERANT IMPRINT LITHOGRAPHY
25
Patent #:
Issue Dt:
03/20/2012
Application #:
12787429
Filing Dt:
05/26/2010
Publication #:
Pub Dt:
09/16/2010
Title:
METHOD AND SYSTEM FOR TONE INVERTING OF RESIDUAL LAYER TOLERANT IMPRINT LITHOGRAPHY
26
Patent #:
Issue Dt:
05/21/2013
Application #:
12787461
Filing Dt:
05/26/2010
Publication #:
Pub Dt:
12/30/2010
Title:
UNIFORM HIGH-K METAL GATE STACKS BY ADJUSTING THRESHOLD VOLTAGE FOR SOPHISTICATED TRANSISTORS BY DIFFUSING A METAL SPECIES PRIOR TO GATE PATTERNING
27
Patent #:
Issue Dt:
07/03/2012
Application #:
12788411
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
IMPLEMENTING LOW POWER DATA PREDICTING LOCAL EVALUATION FOR DOUBLE PUMPED ARRAYS
28
Patent #:
Issue Dt:
02/08/2011
Application #:
12788486
Filing Dt:
05/27/2010
Title:
COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF
29
Patent #:
Issue Dt:
01/25/2011
Application #:
12788521
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
09/16/2010
Title:
SEMICONDUCTOR CHIPS WITH CRACK STOP REGIONS FOR REDUCING CRACK PROPAGATION FROM CHIP EDGES/CORNERS
30
Patent #:
Issue Dt:
03/25/2014
Application #:
12788839
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
Laser Ablation of Adhesive for Integrated Circuit Fabrication
31
Patent #:
Issue Dt:
07/09/2013
Application #:
12788910
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
03/17/2011
Title:
Differential Cross-Coupled Power Combiner or Divider
32
Patent #:
Issue Dt:
02/12/2013
Application #:
12788912
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
INTERCONNECT STRUCTURE WITH AN OXYGEN-DOPED SIC ANTIREFLECTIVE COATING AND METHOD OF FABRICATION
33
Patent #:
Issue Dt:
04/02/2013
Application #:
12788987
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
SELF-ADJUSTING CRITICAL PATH TIMING OF MULTI-CORE VLSI CHIP
34
Patent #:
Issue Dt:
04/16/2013
Application #:
12789013
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
INTEGRATED CIRCUIT WITH FINFETS AND MIM FIN CAPACITOR
35
Patent #:
Issue Dt:
02/01/2011
Application #:
12789505
Filing Dt:
05/28/2010
Publication #:
Pub Dt:
11/25/2010
Title:
COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF
36
Patent #:
Issue Dt:
02/26/2013
Application #:
12789699
Filing Dt:
05/28/2010
Publication #:
Pub Dt:
12/01/2011
Title:
THIN CHANNEL DEVICE AND FABRICATION METHOD WITH A REVERSE EMBEDDED STRESSOR
37
Patent #:
Issue Dt:
10/04/2016
Application #:
12789792
Filing Dt:
05/28/2010
Publication #:
Pub Dt:
12/01/2011
Title:
DEVICE AND METHOD FOR FABRICATING THIN SEMICONDUCTOR CHANNEL AND BURIED STRAIN MEMORIZATION LAYER
38
Patent #:
Issue Dt:
06/19/2012
Application #:
12789839
Filing Dt:
05/28/2010
Publication #:
Pub Dt:
12/01/2011
Title:
DEVICE AND METHOD OF REDUCING JUNCTION LEAKAGE
39
Patent #:
Issue Dt:
09/16/2014
Application #:
12791372
Filing Dt:
06/01/2010
Publication #:
Pub Dt:
12/01/2011
Title:
REDUCED CORNER LEAKAGE IN SOI STRUCTURE AND METHOD
40
Patent #:
Issue Dt:
05/08/2012
Application #:
12791942
Filing Dt:
06/02/2010
Publication #:
Pub Dt:
09/23/2010
Title:
FORMATION OF MASKS/RETICLES HAVING DUMMY FEATURES
41
Patent #:
Issue Dt:
07/23/2013
Application #:
12792242
Filing Dt:
06/02/2010
Publication #:
Pub Dt:
12/08/2011
Title:
INTERFACE STRUCTURE FOR CHANNEL MOBILITY IMPROVEMENT IN HIGH-K METAL GATE STACK
42
Patent #:
Issue Dt:
10/11/2011
Application #:
12792837
Filing Dt:
06/03/2010
Publication #:
Pub Dt:
09/23/2010
Title:
NEUTRALIZATION OF TRAPPED CHARGE IN A CHARGE ACCUMULATION LAYER OF A SEMICONDUCTOR STRUCTURE
43
Patent #:
Issue Dt:
10/15/2013
Application #:
12793046
Filing Dt:
06/03/2010
Publication #:
Pub Dt:
12/08/2011
Title:
CONTACT RESISTIVITY REDUCTION IN TRANSISTOR DEVICES BY DEEP LEVEL IMPURITY FORMATION
44
Patent #:
Issue Dt:
10/14/2014
Application #:
12793292
Filing Dt:
06/03/2010
Publication #:
Pub Dt:
12/08/2011
Title:
FINFET-COMPATIBLE METAL-INSULATOR-METAL CAPACITOR
45
Patent #:
Issue Dt:
01/31/2012
Application #:
12793896
Filing Dt:
06/04/2010
Publication #:
Pub Dt:
09/30/2010
Title:
VARIABLE FLOW COMPUTER COOLING SYSTEM FOR A DATA CENTER AND METHOD OF OPERATION
46
Patent #:
Issue Dt:
08/23/2011
Application #:
12793905
Filing Dt:
06/04/2010
Publication #:
Pub Dt:
09/23/2010
Title:
VARIABLE FLOW COMPUTER COOLING SYSTEM FOR A DATA CENTER AND METHOD OF OPERATION
47
Patent #:
Issue Dt:
02/28/2012
Application #:
12794208
Filing Dt:
06/04/2010
Publication #:
Pub Dt:
09/23/2010
Title:
METHOD FOR USING COMPOSITIONS CONTAINING FLUOROCARBINOLS IN LITHOGRAPHIC PROCESSES
48
Patent #:
Issue Dt:
01/14/2014
Application #:
12794995
Filing Dt:
06/07/2010
Publication #:
Pub Dt:
12/08/2011
Title:
LOW VOLTAGE SIGNALING
49
Patent #:
Issue Dt:
08/02/2011
Application #:
12795108
Filing Dt:
06/07/2010
Publication #:
Pub Dt:
09/30/2010
Title:
METHODS OF FORMING A HYPER-ABRUPT P-N JUNCTION AND DESIGN STRUCTURES FOR AN INTEGRATED CIRCUIT
50
Patent #:
Issue Dt:
01/31/2012
Application #:
12795681
Filing Dt:
06/08/2010
Publication #:
Pub Dt:
12/16/2010
Title:
LOCAL METALLIZATION AND USE THEREOF IN SEMICONDUCTOR DEVICES
51
Patent #:
Issue Dt:
02/12/2013
Application #:
12795962
Filing Dt:
06/08/2010
Publication #:
Pub Dt:
12/08/2011
Title:
STRUCTURE AND METHOD FOR REPLACEMENT GATE MOSFET WITH SELF-ALIGNED CONTACT USING SACRIFICIAL MANDREL DIELECTRIC
52
Patent #:
Issue Dt:
04/16/2013
Application #:
12795973
Filing Dt:
06/08/2010
Publication #:
Pub Dt:
12/08/2011
Title:
REPLACEMENT GATE MOSFET WITH SELF-ALIGNED DIFFUSION CONTACT
53
Patent #:
Issue Dt:
01/01/2013
Application #:
12796501
Filing Dt:
06/08/2010
Publication #:
Pub Dt:
12/08/2011
Title:
DETAILED ROUTABILITY BY CELL PLACEMENT
54
Patent #:
Issue Dt:
12/04/2012
Application #:
12797181
Filing Dt:
06/09/2010
Publication #:
Pub Dt:
12/15/2011
Title:
MEMORY TESTING SYSTEM
55
Patent #:
Issue Dt:
04/23/2013
Application #:
12797420
Filing Dt:
06/09/2010
Publication #:
Pub Dt:
12/15/2011
Title:
SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS
56
Patent #:
Issue Dt:
02/15/2011
Application #:
12813491
Filing Dt:
06/10/2010
Publication #:
Pub Dt:
09/30/2010
Title:
DETECTION AND CORRECTION OF DROPPED WRITE ERRORS IN A DATA STORAGE SYSTEM
57
Patent #:
Issue Dt:
08/07/2012
Application #:
12813598
Filing Dt:
06/11/2010
Publication #:
Pub Dt:
10/07/2010
Title:
TRENCH STRUCTURE AND METHOD OF FORMING THE TRENCH STRUCTURE
58
Patent #:
Issue Dt:
07/17/2012
Application #:
12813828
Filing Dt:
06/11/2010
Publication #:
Pub Dt:
03/17/2011
Title:
PHASE AND FREQUENCY DETECTOR WITH OUTPUT PROPORTIONAL TO FREQUENCY DIFFERENCE
59
Patent #:
Issue Dt:
12/18/2012
Application #:
12814162
Filing Dt:
06/11/2010
Publication #:
Pub Dt:
12/15/2011
Title:
INTERCONNECT STRUCTURE AND METHOD OF FABRICATING
60
Patent #:
Issue Dt:
03/12/2013
Application #:
12814346
Filing Dt:
06/11/2010
Publication #:
Pub Dt:
12/15/2011
Title:
SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS
61
Patent #:
Issue Dt:
07/17/2012
Application #:
12814930
Filing Dt:
06/14/2010
Publication #:
Pub Dt:
10/07/2010
Title:
CMOS DIODES WITH DUAL GATE CONDUCTORS, AND METHODS FOR FORMING THE SAME
62
Patent #:
Issue Dt:
02/15/2011
Application #:
12814942
Filing Dt:
06/14/2010
Publication #:
Pub Dt:
12/02/2010
Title:
MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
63
Patent #:
Issue Dt:
12/27/2011
Application #:
12815129
Filing Dt:
06/14/2010
Publication #:
Pub Dt:
09/30/2010
Title:
METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS
64
Patent #:
Issue Dt:
02/05/2013
Application #:
12815845
Filing Dt:
06/15/2010
Publication #:
Pub Dt:
12/15/2011
Title:
FINFET DEVICES
65
Patent #:
Issue Dt:
09/04/2012
Application #:
12815902
Filing Dt:
06/15/2010
Publication #:
Pub Dt:
12/15/2011
Title:
FABRICATION OF A VERTICAL HETEROJUNCTION TUNNEL-FET
66
Patent #:
Issue Dt:
10/01/2013
Application #:
12816399
Filing Dt:
06/16/2010
Publication #:
Pub Dt:
12/22/2011
Title:
STRAINED THIN BODY CMOS DEVICE HAVING VERTICALLY RAISED SOURCE/DRAIN STRESSORS WITH SINGLE SPACER
67
Patent #:
Issue Dt:
11/26/2013
Application #:
12816605
Filing Dt:
06/16/2010
Publication #:
Pub Dt:
12/22/2011
Title:
Gate-Last Fabrication of Quarter-Gap MGHK FET
68
Patent #:
Issue Dt:
01/29/2013
Application #:
12816697
Filing Dt:
06/16/2010
Publication #:
Pub Dt:
12/22/2011
Title:
FIELD EFFECTS TRANSISTOR WITH ASYMMETRIC ABRUPT JUNCTION IMPLANT
69
Patent #:
Issue Dt:
11/06/2012
Application #:
12816825
Filing Dt:
06/16/2010
Publication #:
Pub Dt:
12/22/2011
Title:
DIFFERENTIALLY RECESSED CONTACTS FOR MULTI-GATE TRANSISTOR OF SRAM CELL
70
Patent #:
Issue Dt:
03/26/2013
Application #:
12817249
Filing Dt:
06/17/2010
Publication #:
Pub Dt:
12/22/2011
Title:
TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE STRUCTURE
71
Patent #:
Issue Dt:
10/22/2013
Application #:
12818828
Filing Dt:
06/18/2010
Publication #:
Pub Dt:
12/22/2011
Title:
INTERFACE-FREE METAL GATE STACK
72
Patent #:
Issue Dt:
05/31/2011
Application #:
12819228
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
10/14/2010
Title:
LATERAL JUNCTION VARACTOR WITH LARGE TUNING RANGE
73
Patent #:
Issue Dt:
03/12/2013
Application #:
12819440
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
12/22/2011
Title:
SEMICONDUCTOR DEVICES FABRICATED BY DOPED MATERIAL LAYER AS DOPANT SOURCE
74
Patent #:
Issue Dt:
10/23/2012
Application #:
12819634
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
12/22/2011
Title:
METHOD AND STRUCTURE OF FORMING SILICIDE AND DIFFUSION BARRIER LAYER WITH DIRECT DEPOSITED FILM ON SILICON
75
Patent #:
Issue Dt:
02/14/2012
Application #:
12819721
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
10/07/2010
Title:
PHASE CHANGE MATERIAL BASED TEMPERATURE SENSOR
76
Patent #:
Issue Dt:
02/15/2011
Application #:
12819786
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
10/07/2010
Title:
CONSTRAINT PROGRAMMING FOR REDUCTION OF SYSTEM TEST-CONFIGURATION-MATRIX COMPLEXITY
77
Patent #:
Issue Dt:
05/21/2013
Application #:
12821507
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
SHORT CHANNEL SEMICONDUCTOR DEVICES WITH REDUCED HALO DIFFUSION
78
Patent #:
Issue Dt:
08/07/2012
Application #:
12821526
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PHASE LOCKED LOOP WITH STARTUP OSCILLATOR AND PRIMARY OSCILLATOR
79
Patent #:
Issue Dt:
07/19/2011
Application #:
12821583
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/30/2010
Title:
ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING A HARD MASK FOR OFFSET SPACER PATTERNING
80
Patent #:
Issue Dt:
07/23/2013
Application #:
12821953
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
METHOD OF PURIFYING NANOPARTICLES IN A COLLOID
81
Patent #:
Issue Dt:
12/03/2013
Application #:
12822021
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PORT ENABLE SIGNAL GENERATION FOR GATING A MEMORY ARRAY DEVICE OUTPUT
82
Patent #:
Issue Dt:
01/01/2013
Application #:
12822058
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
INTERNAL BYPASSING OF MEMORY ARRAY DEVICES
83
Patent #:
Issue Dt:
07/02/2013
Application #:
12822287
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
INTEGRATED CIRCUIT ARRANGEMENT FOR TEST INPUTS
84
Patent #:
Issue Dt:
11/04/2014
Application #:
12822426
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
SEMICONDUCTOR DEVICES WITH ASYMMETRIC HALO IMPLANTATION AND METHOD OF MANUFACTURE
85
Patent #:
Issue Dt:
10/01/2013
Application #:
12822469
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
RAIM SYSTEM USING DECODING OF VIRTUAL ECC
86
Patent #:
Issue Dt:
11/01/2016
Application #:
12822492
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
STRUCTURE AND METHOD TO CONTROL BOTTOM CORNER THRESHOLD IN AN SOI DEVICE
87
Patent #:
Issue Dt:
10/22/2013
Application #:
12822498
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
FAILING BUS LANE DETECTION USING SYNDROME ANALYSIS
88
Patent #:
Issue Dt:
07/09/2013
Application #:
12822503
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
ERROR CORRECTION AND DETECTION IN A REDUNDANT MEMORY SYSTEM
89
Patent #:
Issue Dt:
11/05/2013
Application #:
12822507
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
Dual Loop Voltage Regulator with Bias Voltage Capacitor
90
Patent #:
Issue Dt:
10/14/2014
Application #:
12822508
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
ISOLATION OF FAULTY LINKS IN A TRANSMISSION MEDIUM
91
Patent #:
Issue Dt:
08/21/2012
Application #:
12822789
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/30/2010
Title:
TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS
92
Patent #:
Issue Dt:
11/25/2014
Application #:
12822964
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
HOMOGENEOUS RECOVERY IN A REDUNDANT MEMORY SYSTEM
93
Patent #:
Issue Dt:
01/14/2014
Application #:
12822968
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
HETEROGENEOUS RECOVERY IN A REDUNDANT MEMORY SYSTEM
94
Patent #:
Issue Dt:
09/18/2012
Application #:
12823010
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
12/29/2011
Title:
HIERARCHICAL ERROR INJECTION FOR COMPLEX RAIM/ECC DESIGN
95
Patent #:
Issue Dt:
10/30/2012
Application #:
12823163
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
DELTA MONOLAYER DOPANTS EPITAXY FOR EMBEDDED SOURCE/DRAIN SILICIDE
96
Patent #:
Issue Dt:
04/01/2014
Application #:
12823168
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
METHOD OF FORMING A SHALLOW TRENCH ISOLATION EMBEDDED POLYSILICON RESISTOR
97
Patent #:
Issue Dt:
02/05/2013
Application #:
12823232
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
BUFFER-AWARE ROUTING IN INTEGRATED CIRCUIT DESIGN
98
Patent #:
Issue Dt:
02/26/2013
Application #:
12823438
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/30/2010
Title:
CONTACT OPTIMIZATION FOR ENHANCING STRESS TRANSFER IN CLOSELY SPACED TRANSISTORS
99
Patent #:
Issue Dt:
05/28/2013
Application #:
12823660
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/30/2010
Title:
NON-INSULATING STRESSED MATERIAL LAYERS IN A CONTACT LEVEL OF SEMICONDUCTOR DEVICES
100
Patent #:
Issue Dt:
05/28/2013
Application #:
12823728
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
FERRO-ELECTRIC CAPACITOR MODULES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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