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12/16/2014
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13623314
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09/20/2012
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03/20/2014
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06/16/2015
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13623873
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09/20/2012
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03/20/2014
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12/17/2013
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13623893
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09/21/2012
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05/14/2013
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13624235
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09/21/2012
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01/17/2013
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12/17/2013
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09/21/2012
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06/20/2013
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04/07/2015
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13624307
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09/21/2012
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06/13/2013
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06/16/2015
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13625286
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09/24/2012
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03/27/2014
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03/31/2015
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09/24/2012
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01/24/2013
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11/25/2014
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13625440
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09/24/2012
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03/27/2014
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07/29/2014
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09/25/2012
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03/27/2014
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01/06/2015
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09/25/2012
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03/27/2014
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04/12/2016
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09/25/2012
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03/27/2014
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07/23/2013
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09/25/2012
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07/11/2013
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01/06/2015
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09/26/2012
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03/27/2014
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06/03/2014
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09/27/2012
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01/31/2013
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08/05/2014
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13628715
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09/27/2012
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03/27/2014
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FERROELECTRIC RANDOM ACCESS MEMORY WITH OPTIMIZED HARDMASK
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03/25/2014
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09/27/2012
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03/27/2014
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09/30/2014
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09/27/2012
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03/27/2014
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METHODS OF FORMING 3-D SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND A NOVEL 3-D DEVICE
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07/01/2014
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09/28/2012
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04/03/2014
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STRESS ENGINEERED MULTI-LAYERS FOR INTEGRATION OF CMOS AND SI NANOPHOTONICS
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03/15/2016
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10/01/2012
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04/03/2014
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06/16/2015
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10/01/2012
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01/23/2014
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PLANNING ECONOMIC ENERGY DISPATCH IN ELECTRICAL GRID UNDER UNCERTAINTY
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12/17/2013
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10/02/2012
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03/31/2015
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10/02/2012
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04/03/2014
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01/06/2015
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10/03/2012
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04/03/2014
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07/21/2015
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10/03/2012
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04/03/2014
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TRANSISTOR FORMATION USING COLD WELDING
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05/20/2014
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10/03/2012
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06/27/2013
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Techniques for Thermal Modeling of Data Centers to Improve Energy Efficiency
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05/06/2014
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13644683
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10/04/2012
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04/10/2014
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SIMULTANEOUS PHOTORESIST DEVELOPMENT AND NEUTRAL POLYMER LAYER FORMATION
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11/18/2014
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10/04/2012
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04/10/2014
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SEMICONDUCTOR ALLOY FIN FIELD EFFECT TRANSISTOR
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08/19/2014
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10/04/2012
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04/10/2014
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BACK-END-OF-LINE METAL-OXIDE-SEMICONDUCTOR VARACTORS
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02/24/2015
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10/05/2012
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04/10/2014
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THERMALLY ADAPTIVE IN-SYSTEM ALLOCATION
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08/18/2015
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13646120
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10/05/2012
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04/10/2014
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Laser Doping of Crystalline Semiconductors Using a Dopant-Containing Amorphous Silicon Stack For Dopant Source and Passivation
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03/18/2014
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10/08/2012
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04/10/2014
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DOUBLE PATTERNING COMPATIBLE COLORLESS M1 ROUTE
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07/14/2015
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10/09/2012
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02/07/2013
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12/16/2014
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10/09/2012
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03/27/2014
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12/01/2015
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10/10/2012
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04/10/2014
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CHIP AUTHENTICATION USING MULTI-DOMAIN INTRINSIC IDENTIFIERS
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12/09/2014
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10/10/2012
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04/10/2014
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SINGLE FIN CUT EMPLOYING ANGLED PROCESSING METHODS
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12/09/2014
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10/10/2012
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04/10/2014
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11/03/2015
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10/10/2012
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04/10/2014
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METHODS OF FORMING A CAPACITOR AND CONTACT STRUCTURES
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04/16/2013
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10/10/2012
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02/07/2013
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COLLECTING FAILURE INFORMATION ON ERROR CORRECTION CODE (ECC) PROTECTED DATA
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10/28/2014
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10/11/2012
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06/20/2013
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FINFET WITH VERTICAL SILICIDE STRUCTURE
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02/21/2017
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10/11/2012
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04/17/2014
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METHODOLOGY OF GRADING RELIABILITY AND PERFORMANCE OF CHIPS ACROSS WAFER
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09/30/2014
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10/11/2012
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02/07/2013
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THERMAL EXPANSION CONTROL EMPLOYING PLATELET FILLERS
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10/21/2014
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10/11/2012
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04/17/2014
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MULTI-FINGER TRANSISTOR LAYOUT FOR REDUCING CROSS-FINGER ELECTRIC VARIATIONS AND FOR FULLY UTILIZING AVAILABLE BREAKDOWN VOLTAGES
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03/03/2015
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10/12/2012
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04/17/2014
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VERTICAL SOURCE/DRAIN JUNCTIONS FOR A FINFET INCLUDING A PLURALITY OF FINS
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06/23/2015
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10/12/2012
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04/17/2014
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ADVANCED FARADAY SHIELD FOR A SEMICONDUCTOR DEVICE
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03/01/2016
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10/12/2012
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04/17/2014
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HYBRID ORIENTATION FIN FIELD EFFECT TRANSISTOR AND PLANAR FIELD EFFECT TRANSISTOR
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11/18/2014
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10/15/2012
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04/17/2014
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EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR WITH BACK GATE CONTACT
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10/01/2013
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10/15/2012
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02/14/2013
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SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES INCLUDING GRADIENT NITRIDED BURIED OXIDE (BOX)
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11/03/2015
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10/15/2012
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04/17/2014
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Method and System for Wafer Quality Predictive Modeling based on Multi-Source Information with Heterogeneous Relatedness
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10/28/2014
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10/16/2012
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04/17/2014
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01/06/2015
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10/16/2012
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04/17/2014
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Method Of Fabricating MEMS Transistors On Far Back End Of Line
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05/14/2013
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10/16/2012
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02/28/2013
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12/09/2014
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10/16/2012
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04/17/2014
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11/04/2014
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10/17/2012
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04/17/2014
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07/23/2013
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10/17/2012
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05/09/2013
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09/16/2014
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10/17/2012
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04/17/2014
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FIELD EFFECT TRANSISTOR DEVICE HAVING A HYBRID METAL GATE STACK
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08/26/2014
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10/17/2012
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04/17/2014
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REACTIVE MATERIAL FOR INTEGRATED CIRCUIT TAMPER DETECTION AND RESPONSE
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10/14/2014
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13654040
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Filing Dt:
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10/17/2012
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Publication #:
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Pub Dt:
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04/17/2014
| | | | |
Title:
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MULTI-DOPED SILICON ANTIFUSE DEVICE FOR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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13654717
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Filing Dt:
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10/18/2012
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
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FACILITATING GATE HEIGHT UNIFORMITY AND INTER-LAYER DIELECTRIC PROTECTION
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Patent #:
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Issue Dt:
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10/28/2014
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Application #:
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13654849
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Filing Dt:
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10/18/2012
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Publication #:
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Pub Dt:
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04/24/2014
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Title:
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METHODS OF REDUCING MATERIAL LOSS IN ISOLATION STRUCTURES BY INTRODUCING INERT ATOMS INTO OXIDE HARD MASK LAYER USED IN GROWING CHANNEL SEMICONDUCTOR MATERIAL
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Patent #:
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Issue Dt:
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07/08/2014
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Application #:
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13654987
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Filing Dt:
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10/18/2012
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
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STRUCTURE AND METHOD FOR FORMING A LOW GATE RESISTANCE HIGH-K METAL GATE TRANSISTOR DEVICE
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Patent #:
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Issue Dt:
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04/14/2015
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Application #:
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13655003
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Filing Dt:
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10/18/2012
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
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SRAM GLOBAL PRECHARGE, DISCHARGE, AND SENSE
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Patent #:
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Issue Dt:
|
09/03/2013
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Application #:
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13655426
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Filing Dt:
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10/18/2012
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Title:
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FORMING AN ARRAY OF METAL BALLS OR SHAPES ON A SUBSTRATE
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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13655520
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Filing Dt:
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10/19/2012
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Publication #:
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Pub Dt:
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04/11/2013
| | | | |
Title:
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USER-COORDINATED RESOURCE RECOVERY
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Patent #:
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Issue Dt:
|
10/28/2014
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Application #:
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13655599
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Filing Dt:
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10/19/2012
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Publication #:
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Pub Dt:
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02/21/2013
| | | | |
Title:
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REDUCTION OF PORE FILL MATERIAL DEWETTING
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Patent #:
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Issue Dt:
|
05/06/2014
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Application #:
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13655844
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Filing Dt:
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10/19/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A WET ETCH PROCESS FOR REMOVING SILICON NITRIDE
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Patent #:
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Issue Dt:
|
09/02/2014
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Application #:
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13655980
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Filing Dt:
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10/19/2012
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Publication #:
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Pub Dt:
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02/21/2013
| | | | |
Title:
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VISUALIZATION INTERFACE OF CONTINUOUS WAVEFORM MULTI-SPEAKER IDENTIFICATION
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Patent #:
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Issue Dt:
|
09/30/2014
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Application #:
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13656396
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Filing Dt:
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10/19/2012
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
|
METHOD AND SYSTEM FOR PERFORMING INVARIANT-GUIDED ABSTRACTION OF A LOGIC DESIGN
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Patent #:
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Issue Dt:
|
06/23/2015
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Application #:
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13656794
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Filing Dt:
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10/22/2012
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
|
METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH LOW-K SPACERS AND THE RESULTING DEVICE
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Patent #:
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Issue Dt:
|
11/25/2014
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Application #:
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13656819
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Filing Dt:
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10/22/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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FIELD EFFECT TRANSISTOR HAVING PHASE TRANSITION MATERIAL INCORPORATED INTO ONE OR MORE COMPONENTS FOR REDUCED LEAKAGE CURRENT
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Patent #:
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|
Issue Dt:
|
09/30/2014
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Application #:
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13656829
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Filing Dt:
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10/22/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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MEMORY SYSTEM INCORPORATING A CIRCUIT TO GENERATE A DELAY SIGNAL AND AN ASSOCIATED METHOD OF OPERATING A MEMORY SYSTEM
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Patent #:
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|
Issue Dt:
|
03/29/2016
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Application #:
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13657058
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Filing Dt:
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10/22/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
|
MEMORY SYSTEM CONNECTOR
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Patent #:
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Issue Dt:
|
01/07/2014
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Application #:
|
13657182
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Filing Dt:
|
10/22/2012
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Title:
|
SUBTRACTIVE METAL MULTI-LAYER BARRIER LAYER FOR INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
04/29/2014
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Application #:
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13658148
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Filing Dt:
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10/23/2012
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Publication #:
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|
Pub Dt:
|
02/21/2013
| | | | |
Title:
|
CHANNEL MARKING FOR CHIP MARK OVERFLOW AND CALIBRATION ERRORS
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Patent #:
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|
Issue Dt:
|
08/05/2014
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Application #:
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13658226
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Filing Dt:
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10/23/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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IMPLEMENTING SDRAM HAVING NO RAS TO CAS DELAY IN WRITE OPERATION
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Patent #:
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Issue Dt:
|
08/09/2016
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Application #:
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13658856
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Filing Dt:
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10/24/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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WAFER BONDING FOR 3D DEVICE PACKAGING FABRICATION
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Patent #:
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Issue Dt:
|
01/07/2014
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Application #:
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13658861
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Filing Dt:
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10/24/2012
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Publication #:
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|
Pub Dt:
|
02/21/2013
| | | | |
Title:
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SERIAL IRRADIATION OF A SUBSTRATE BY MULTIPLE RADIATION SOURCES
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|
Patent #:
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|
Issue Dt:
|
03/25/2014
|
Application #:
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13659236
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Filing Dt:
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10/24/2012
|
Publication #:
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|
Pub Dt:
|
04/11/2013
| | | | |
Title:
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Polarization Monitoring Reticle Design for High Numerical Aperture Lithography Systems
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|
Patent #:
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|
Issue Dt:
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01/19/2016
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Application #:
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13659292
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Filing Dt:
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10/24/2012
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
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BULK FINFET WELL CONTACTS WITH FIN PATTERN UNIFORMITY
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Patent #:
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Issue Dt:
|
11/03/2015
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Application #:
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13659318
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Filing Dt:
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10/24/2012
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Publication #:
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|
Pub Dt:
|
04/24/2014
| | | | |
Title:
|
SUB-LITHOGRAPHIC SEMICONDUCTOR STRUCTURES WITH NON-CONSTANT PITCH
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Patent #:
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Issue Dt:
|
03/04/2014
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Application #:
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13659453
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Filing Dt:
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10/24/2012
|
Title:
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METHODS FOR DIRECTED SELF-ASSEMBLY PROCESS/PROXIMITY CORRECTION
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Patent #:
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Issue Dt:
|
01/27/2015
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Application #:
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13660497
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Filing Dt:
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10/25/2012
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Publication #:
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Pub Dt:
|
04/03/2014
| | | | |
Title:
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TRANSISTOR FORMATION USING COLD WELDING
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Patent #:
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|
Issue Dt:
|
06/03/2014
|
Application #:
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13660604
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Filing Dt:
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10/25/2012
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Publication #:
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|
Pub Dt:
|
03/27/2014
| | | | |
Title:
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TRANSPARENT CONDUCTIVE ELECTRODE STACK CONTAINING CARBON-CONTAINING MATERIAL
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Patent #:
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Issue Dt:
|
06/17/2014
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Application #:
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13661062
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Filing Dt:
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10/26/2012
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Publication #:
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|
Pub Dt:
|
05/01/2014
| | | | |
Title:
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PROGRAMMABLE DUTY CYCLE SETTER EMPLOYING TIME TO VOLTAGE DOMAIN REFERENCED PULSE CREATION
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Patent #:
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Issue Dt:
|
10/07/2014
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Application #:
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13661188
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Filing Dt:
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10/26/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
|
PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING A GRADED EMBEDDED STRAIN-INDUCING SEMICONDUCTOR REGION WITH ADAPTED ANGLES WITH RESPECT TO THE SUBSTRATE SURFACE
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Patent #:
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Issue Dt:
|
12/30/2014
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Application #:
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13661359
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Filing Dt:
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10/26/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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ISOLATION SCHEME FOR BIPOLAR TRANSISTORS IN BICMOS TECHNOLOGY
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Patent #:
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Issue Dt:
|
04/21/2015
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Application #:
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13661683
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Filing Dt:
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10/26/2012
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Publication #:
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Pub Dt:
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05/01/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING ESD PROTECTION DEVICE
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Patent #:
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Issue Dt:
|
03/18/2014
|
Application #:
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13663589
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
05/09/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH REDUCED THRESHOLD VARIABILITY HAVING A THRESHOLD ADJUSTING SEMICONDUCTOR ALLOY IN THE DEVICE ACTIVE REGION
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Patent #:
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Issue Dt:
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01/06/2015
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Application #:
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13663768
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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FEED-FORWARD EQUALIZATION IN A RECEIVER
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13663811
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
05/02/2013
| | | | |
Title:
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PROTECTING A THERMAL SENSITIVE COMPONENT IN A THERMAL PROCESS
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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13663816
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
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05/01/2014
| | | | |
Title:
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AUTOMATIC WAFER DATA SAMPLE PLANNING AND REVIEW
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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13663836
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
02/28/2013
| | | | |
Title:
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METHODS OF FORMING STRUCTURES WITH A FOCUSED ION BEAM FOR USE IN ATOMIC FORCE PROBING AND STRUCTURES FOR USE IN ATOMIC FORCE PROBING
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Patent #:
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Issue Dt:
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02/16/2016
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Application #:
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13663854
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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METHODS OF FORMING ENHANCED MOBILITY CHANNEL REGIONS ON 3D SEMICONDUCTOR DEVICES, AND DEVICES COMPRISING SAME
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Patent #:
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Issue Dt:
|
06/09/2015
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Application #:
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13664062
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
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05/01/2014
| | | | |
Title:
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FIN ETCH AND FIN REPLACEMENT FOR FINFET INTEGRATION
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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13664214
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Filing Dt:
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10/30/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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DOUBLE TRENCH WELL FORMATION IN SRAM CELLS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13664744
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Filing Dt:
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10/31/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING REPLACEMENT METAL GATE PROCESS INCORPORATING A CONDUCTIVE DUMMY GATE LAYER
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Patent #:
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Issue Dt:
|
09/30/2014
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Application #:
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13664784
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Filing Dt:
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10/31/2012
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Publication #:
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|
Pub Dt:
|
05/01/2014
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE INCORPORATING A CONTACT SIDEWALL SPACER WITH A SELF-ALIGNED AIRGAP AND A METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
|
06/16/2015
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Application #:
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13664812
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Filing Dt:
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10/31/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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COMPENSATING FOR WARPAGE OF A FLIP CHIP PACKAGE BY VARYING HEIGHTS OF A REDISTRIBUTION LAYER ON AN INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
|
04/07/2015
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Application #:
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13664850
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Filing Dt:
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10/31/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
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LOCAL INTERCONNECTS FOR FIELD EFFECT TRANSISTOR DEVICES
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Patent #:
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Issue Dt:
|
01/06/2015
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Application #:
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13664869
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Filing Dt:
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10/31/2012
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Publication #:
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Pub Dt:
|
05/01/2014
| | | | |
Title:
|
SELF-ALIGNED CONTACT STRUCTURE FOR REPLACEMENT METAL GATE
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