Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 055668/0001 | |
| Pages: | 396 |
| | Recorded: | 01/20/2021 | | |
| Attorney Dkt #: | 069902-0049 |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 053654 FRAME: 0254. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST IN PATENTS. |
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Total properties:
6
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08758367
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Filing Dt:
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11/29/1996
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Title:
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SYNCHRONOUS SEMICONDUCTOR MEMORY HAVING A BURST TRANSFER MODE WITH A PLURALITY OF SUBARRAYS ACCESSIBLE IN PARALLEL VIA AN INPUT BUFFER
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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09027215
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Filing Dt:
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02/20/1998
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Title:
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METHOD FOR HIGH-SPEED PROGRAMMING OF A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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09050354
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Filing Dt:
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03/31/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH REDUNDANCY CIRCUIT
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09251352
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Filing Dt:
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02/17/1999
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH IMPROVED FLEXIBLE REDUNDANCY SCHEME
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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10140937
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Filing Dt:
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05/09/2002
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Publication #:
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Pub Dt:
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12/19/2002
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Title:
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CLOCK SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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10229001
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Filing Dt:
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08/28/2002
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH IMPROVED FLEXIBLE REDUNDANCY SCHEME
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Assignee
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| 4 PARK PLAZA |
| SUITE 550 |
| IRVINE, CALIFORNIA 92614 |
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Correspondence name and address
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S. KAREFF C/O SCHULTE ROTH & ZABEL LLP
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919 THIRD AVENUE
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25TH FLOOR
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NEW YORK, NY 10022
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