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Reel/Frame:055673/0244   Pages: 4
Recorded: 03/22/2021
Attorney Dkt #:00158.0753.00US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
02/06/2024
Application #:
17208511
Filing Dt:
03/22/2021
Publication #:
Pub Dt:
10/14/2021
Title:
SEMICONDUCTOR FABRICATION METHOD AND STRUCTURE USING MULTIPLE SACRIFICIAL LAYERS TO FORM SIDEWALL SPACERS
Assignors
1
Exec Dt:
03/18/2021
2
Exec Dt:
03/18/2021
3
Exec Dt:
03/18/2021
Assignees
1
18 ZHANGJIANG ROAD, PUDONG NEW AREA
SHANGHAI, CHINA 201203
2
NO.18, WEN CHANG RD., ECONOMIC-TECHNOLOGICAL DEVELOPMENT AREA, DAXING DISTRICT
BEIJING, CHINA 100716
Correspondence name and address
ANOVA LAW GROUP C/O SMIC
21495 RIDGETOP CIRCLE
SUITE 300
STERLING, VA 20166

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