Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 055715/0782 | |
| Pages: | 7 |
| | Recorded: | 03/25/2021 | | |
| Attorney Dkt #: | 193368/1173-701 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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17127750
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Filing Dt:
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12/18/2020
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Publication #:
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Pub Dt:
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06/23/2022
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Title:
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FAN-OUT WAFER-LEVEL PACKAGING (FOWLP) INTEGRATED CIRCUITS (ICs) EMPLOYING AN ELECTRO-MAGNETIC INTERFERENCE (EMI) SHIELD STRUCTURE IN UNUSED FAN-OUT AREA FOR EMI SHIELDING, AND RELATED FABRICATION METHODS
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Assignee
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| 5775 MOREHOUSE DRIVE |
| SAN DIEGO, CALIFORNIA 92121 |
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Correspondence name and address
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W&T/QUALCOMM
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106 PINEDALE SPRINGS WAY
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CARY, NC 27511
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