Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 056416/0234 | |
| Pages: | 4 |
| | Recorded: | 06/02/2021 | | |
| Attorney Dkt #: | SAT-40644 |
| Conveyance: | LICENSE (SEE DOCUMENT FOR DETAILS). |
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Total properties:
7
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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11656531
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Filing Dt:
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01/23/2007
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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METHOD FOR CONTROLLING HETEROGENEOUS MULTIPROCESSOR AND MULTIGRAIN PARALLELIZING COMPILER
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11660104
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Filing Dt:
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02/13/2007
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Publication #:
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Pub Dt:
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11/01/2007
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Title:
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MULTIPROCESSOR SYSTEM AND MULTIGRAIN PARALLELIZING COMPILER
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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11716563
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Filing Dt:
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03/12/2007
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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GLOBAL COMPILER FOR CONTROLLING HETEROGENEOUS MULTIPROCESSOR
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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12525404
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Filing Dt:
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03/03/2010
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Publication #:
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Pub Dt:
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07/08/2010
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Title:
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MEMORY MANAGEMENT METHOD, INFORMATION PROCESSING DEVICE, PROGRAM CREATION METHOD, AND PROGRAM
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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12654956
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Filing Dt:
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01/11/2010
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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Multiprocessor system and multigrain parallelizing compiler
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Patent #:
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Issue Dt:
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03/27/2018
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Application #:
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13515759
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Filing Dt:
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06/13/2012
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Publication #:
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Pub Dt:
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10/04/2012
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Title:
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METHOD OF PROVIDING A NON-CACHEABLE AREA IN MEMORY
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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14355339
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Filing Dt:
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06/10/2014
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Publication #:
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Pub Dt:
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10/09/2014
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Title:
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Processor, Accelerator, And Direct Memory Access Controller Within A Processor Core That Each Reads/Writes A Local Synchronization Flag Area For Parallel Execution
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Assignee
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| ROOM NO. 302, BUILDING NO. 40, WASEDA UNIVERSITY |
| 27 WASEDAMACHI, SHINJUKU-KU |
| TOKYO, JAPAN 162-0042 |
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Correspondence name and address
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RANKIN, HILL & CLARK LLP
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38210 GLENN AVENUE
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WILLOUGHBY, OH 44094
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