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Total properties:
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05/22/2007
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10822166
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Filing Dt:
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04/09/2004
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Title:
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08/14/2007
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10868208
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Filing Dt:
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06/16/2004
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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MEMORY REPAIR CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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11/18/2008
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Application #:
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10991365
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/26/2005
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Title:
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Patent #:
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Issue Dt:
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02/19/2008
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11045241
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Filing Dt:
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01/27/2005
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Title:
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Issue Dt:
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09/09/2008
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11060407
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Filing Dt:
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02/18/2005
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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CLOCKING METHODOLOGY FOR AT-SPEED TESTING OF SCAN CIRCUITS WITH SYNCHRONOUS CLOCKS
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Patent #:
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Issue Dt:
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12/02/2008
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Application #:
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11067466
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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PERFORMING OPC ON STRUCTURES WITH VIRTUAL EDGES
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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11129238
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Filing Dt:
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05/12/2005
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Title:
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SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR EQUIVALENCE CHECKING BETWEEN DESIGNS WITH SEQUENTIAL DIFFERENCES
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Patent #:
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12/04/2012
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11223976
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Filing Dt:
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09/13/2005
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Publication #:
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Pub Dt:
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03/29/2007
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Title:
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DISTRIBUTED ELECTRONIC DESIGN AUTOMATION ARCHITECTURE
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10/07/2008
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11236208
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09/27/2005
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Publication #:
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03/29/2007
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Title:
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11255603
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Filing Dt:
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10/20/2005
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Publication #:
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Pub Dt:
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07/19/2007
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Title:
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QUEUING METHODS FOR DISTRIBUTING PROGRAMS FOR PRODUCING TEST DATA
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Patent #:
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06/10/2008
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11255777
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10/20/2005
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04/26/2007
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Title:
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METHODS FOR DISTRIBUTING PROGRAMS FOR GENERATING TEST DATA
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07/27/2010
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11256211
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10/20/2005
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Pub Dt:
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04/26/2007
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Title:
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METHODS FOR DISTRIBUTION OF TEST GENERATION PROGRAMS
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03/30/2010
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11264930
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Filing Dt:
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11/01/2005
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Title:
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Patent #:
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09/18/2007
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11301236
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12/12/2005
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Publication #:
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Pub Dt:
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02/22/2007
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Title:
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INTEGRATED CIRCUITS WITH REDUCED LEAKAGE CURRENT
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Patent #:
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02/19/2008
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11335928
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01/20/2006
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Title:
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SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR WORD-LEVEL NUMERICAL COMPUTATIONS AND STORAGE
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03/17/2009
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11357431
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02/17/2006
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Publication #:
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Pub Dt:
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08/23/2007
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Title:
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MULTI-DIMENSIONAL ANALYSIS FOR PREDICTING RET MODEL ACCURACY
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01/04/2011
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11369565
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03/06/2006
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09/20/2007
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Title:
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Patent #:
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04/29/2008
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11370738
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03/07/2006
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Publication #:
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02/22/2007
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Title:
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DRAM DENSITY ENHANCEMENTS
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Patent #:
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02/03/2009
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11438052
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05/18/2006
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Publication #:
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Pub Dt:
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11/22/2007
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Title:
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CLOCK MODEL FOR FORMAL VERIFICATION OF A DIGITAL CIRCUIT DESCRIPTION
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11/10/2009
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11439497
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05/24/2006
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Publication #:
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Pub Dt:
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11/15/2007
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Title:
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METHOD FOR AT-SPEED TESTING OF MEMORY INTERFACE USING SCAN
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10/21/2008
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11536524
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Filing Dt:
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09/28/2006
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Publication #:
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Pub Dt:
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04/10/2008
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Title:
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SINGLE-POLY NON-VOLATILE MEMORY CELL
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Issue Dt:
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10/20/2009
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11538751
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10/04/2006
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Title:
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05/26/2009
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11601272
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11/16/2006
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06/21/2011
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11610414
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12/13/2006
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06/19/2008
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Title:
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SELECTIVE SHIELDING FOR MULTIPLE EXPOSURE MASKS
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09/21/2010
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11621077
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01/08/2007
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07/10/2008
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10/30/2012
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11652244
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01/10/2007
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01/24/2008
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Title:
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09/21/2010
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11673511
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02/09/2007
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08/14/2008
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Title:
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DUAL METRIC OPC
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06/15/2010
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11673515
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02/09/2007
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08/14/2008
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Title:
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PRE-BIAS OPTICAL PROXIMITY CORRECTION
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11/17/2009
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11741164
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04/27/2007
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10/30/2008
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Title:
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03/24/2009
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11747390
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05/11/2007
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03/27/2008
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ONE-TIME-PROGRAMMABLE MEMORY
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04/29/2014
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11758510
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06/05/2007
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12/11/2008
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03/09/2010
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07/04/2007
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01/08/2009
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CIRCUIT DESIGN OPTIMIZATION OF INTEGRATED CIRCUIT BASED CLOCK GATED MEMORY ELEMENTS
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06/15/2010
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11779385
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07/18/2007
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01/22/2009
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01/12/2010
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11779395
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07/18/2007
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01/22/2009
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12/07/2010
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11828372
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07/26/2007
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01/29/2009
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07/27/2010
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11829179
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07/27/2007
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01/29/2009
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11/09/2010
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11830910
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07/31/2007
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02/05/2009
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07/20/2010
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11832425
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08/01/2007
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INTEGRATED CIRCUIT DESIGN SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT THAT TAKES INTO ACCOUNT OBSERVABILITY BASED CLOCK GATING CONDITIONS
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06/21/2011
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08/01/2007
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INTEGRATED CIRCUIT DESIGN SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT THAT TAKES INTO ACCOUNT THE STABILITY OF VARIOUS DESIGN SIGNALS
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12/28/2010
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11836222
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08/09/2007
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02/12/2009
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12/06/2011
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08/21/2007
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02/26/2009
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03/30/2010
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08/25/2007
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02/26/2009
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05/25/2010
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08/27/2007
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03/05/2009
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08/24/2010
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08/27/2007
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10/30/2008
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01/04/2011
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08/28/2007
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10/05/2010
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08/31/2007
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03/05/2009
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07/13/2010
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09/11/2007
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03/13/2008
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10/05/2010
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09/11/2007
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03/12/2009
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08/31/2010
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09/29/2007
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04/02/2009
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09/28/2010
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04/02/2009
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03/22/2011
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10/11/2007
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04/16/2009
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12/28/2010
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10/11/2007
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04/16/2009
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11/02/2010
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10/11/2007
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04/16/2009
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01/10/2012
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10/19/2007
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04/23/2009
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RELIABILITY EVALUATION AND SYSTEM FAIL WARNING METHODS USING ON CHIP PARAMETRIC MONITORS
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10/19/2010
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11912144
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10/20/2007
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09/18/2008
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METHOD AND SYSTEM FOR DEVELOPING POST-LAYOUT ELECTRONIC DATA AUTOMATION (EDA) APPLICATIONS
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03/13/2012
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10/22/2007
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09/25/2008
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10/26/2010
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10/22/2007
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11/26/2009
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02/22/2011
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10/30/2007
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04/30/2009
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04/12/2011
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04/30/2009
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12/21/2010
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11/02/2007
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05/07/2009
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12/14/2010
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05/07/2009
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11/15/2011
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11/08/2007
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05/14/2009
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09/06/2011
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11/13/2007
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05/14/2009
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04/27/2010
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11/14/2007
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05/14/2009
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04/27/2010
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11/16/2007
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05/21/2009
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11/02/2010
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11941183
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11/16/2007
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05/21/2009
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07/20/2010
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11/16/2007
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05/21/2009
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01/11/2011
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11/19/2007
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05/21/2009
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02/01/2011
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11/27/2007
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05/28/2009
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02/01/2011
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11/27/2007
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05/28/2009
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10/19/2010
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11/29/2007
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06/04/2009
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02/22/2011
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12/18/2007
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06/18/2009
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05/17/2011
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12/20/2007
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06/25/2009
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09/30/2014
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06/25/2009
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09/28/2010
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04/16/2009
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07/06/2010
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09/18/2008
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11/15/2011
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08/27/2009
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08/27/2009
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04/30/2009
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02/15/2011
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11/27/2008
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12/04/2008
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