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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	056603/0591			Pages:	4
		Recorded:	06/16/2021
Attorney Dkt #:	MOSAID TO CONVERSANT
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 30

Patent #:	6614243	Issue Dt:	09/02/2003	Application #:	09947295	Filing Dt:	09/05/2001
Publication #:	US20020084791	Pub Dt:	07/04/2002
Title:	MEASUREMENT PROBE FOR DETECTING ELECTRICAL SIGNALS IN AN INTEGRATED SEMICONDUCTOR CIRCUIT

Patent #:	6773934	Issue Dt:	08/10/2004	Application #:	10105590	Filing Dt:	03/25/2002
Publication #:	US20020137238	Pub Dt:	09/26/2002
Title:	METHOD FOR RELEASABLE CONTACT-CONNECTION OF A PLURALITY OF INTEGRATED SEMICONDUCTOR MODULES ON A WAFER

Patent #:	6586978	Issue Dt:	07/01/2003	Application #:	10177945	Filing Dt:	06/20/2002
Publication #:	US20030011412	Pub Dt:	01/16/2003
Title:	DELAY LOCKED LOOP

Patent #:	6850448	Issue Dt:	02/01/2005	Application #:	10386148	Filing Dt:	03/11/2003
Publication #:	US20030214858	Pub Dt:	11/20/2003
Title:	TEMPERATURE-DEPENDENT REFRESH CYCLE FOR DRAM

Patent #:	7459949	Issue Dt:	12/02/2008	Application #:	11668862	Filing Dt:	01/30/2007
Publication #:	US20080180144	Pub Dt:	07/31/2008
Title:	PHASE DETECTOR CIRCUIT AND METHOD THEREFOR

Patent #:	7639540	Issue Dt:	12/29/2009	Application #:	11955754	Filing Dt:	12/13/2007
Publication #:	US20080198657	Pub Dt:	08/21/2008
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	8914612	Issue Dt:	12/16/2014	Application #:	11978529	Filing Dt:	10/29/2007
Publication #:	US20090113159	Pub Dt:	04/30/2009
Title:	Data processing with time-based memory access

Patent #:	7885140	Issue Dt:	02/08/2011	Application #:	12032249	Filing Dt:	02/15/2008
Publication #:	US20090039927	Pub Dt:	02/12/2009
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	7656223	Issue Dt:	02/02/2010	Application #:	12193077	Filing Dt:	08/18/2008
Publication #:	US20080303569	Pub Dt:	12/11/2008
Title:	DELAY LOCKED LOOP CIRCUIT

Patent #:	8194456	Issue Dt:	06/05/2012	Application #:	12617459	Filing Dt:	11/12/2009
Publication #:	US20100110794	Pub Dt:	05/06/2010
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	7893725	Issue Dt:	02/22/2011	Application #:	12638309	Filing Dt:	12/15/2009
Publication #:	US20100156483	Pub Dt:	06/24/2010
Title:	DELAY LOCKED LOOP CIRCUIT

Patent #:	8207769	Issue Dt:	06/26/2012	Application #:	12986684	Filing Dt:	01/07/2011
Publication #:	US20110109365	Pub Dt:	05/12/2011
Title:	DELAY LOCKED LOOP CIRCUIT

Patent #:	8432767	Issue Dt:	04/30/2013	Application #:	13006005	Filing Dt:	01/13/2011
Publication #:	US20110110165	Pub Dt:	05/12/2011
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	8300471	Issue Dt:	10/30/2012	Application #:	13096874	Filing Dt:	04/28/2011
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	8619473	Issue Dt:	12/31/2013	Application #:	13649403	Filing Dt:	10/11/2012
Publication #:	US20130033941	Pub Dt:	02/07/2013
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	8671252	Issue Dt:	03/11/2014	Application #:	13776757	Filing Dt:	02/26/2013
Publication #:	US20130170298	Pub Dt:	07/04/2013
Title:	SCALABLE MEMORY SYSTEM

Patent #:	8644108	Issue Dt:	02/04/2014	Application #:	13871487	Filing Dt:	04/26/2013
Publication #:	US20130235659	Pub Dt:	09/12/2013
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9245640	Issue Dt:	01/26/2016	Application #:	14107735	Filing Dt:	12/16/2013
Publication #:	US20140104954	Pub Dt:	04/17/2014
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	8854915	Issue Dt:	10/07/2014	Application #:	14158215	Filing Dt:	01/17/2014
Publication #:	US20140133243	Pub Dt:	05/15/2014
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9042199	Issue Dt:	05/26/2015	Application #:	14491440	Filing Dt:	09/19/2014
Publication #:	US20150009761	Pub Dt:	01/08/2015
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9384847	Issue Dt:	07/05/2016	Application #:	14720317	Filing Dt:	05/22/2015
Publication #:	US20150255167	Pub Dt:	09/10/2015
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9576675	Issue Dt:	02/21/2017	Application #:	14969351	Filing Dt:	12/15/2015
Publication #:	US20160099072	Pub Dt:	04/07/2016
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	9552889	Issue Dt:	01/24/2017	Application #:	15183162	Filing Dt:	06/15/2016
Publication #:	US20160293265	Pub Dt:	10/06/2016
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9740407	Issue Dt:	08/22/2017	Application #:	15378650	Filing Dt:	12/14/2016
Publication #:	US20170160935	Pub Dt:	06/08/2017
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	9928918	Issue Dt:	03/27/2018	Application #:	15401858	Filing Dt:	01/09/2017
Publication #:	US20170117052	Pub Dt:	04/27/2017
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	10199113	Issue Dt:	02/05/2019	Application #:	15597603	Filing Dt:	05/17/2017
Publication #:	US20170309342	Pub Dt:	10/26/2017
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	9971518	Issue Dt:	05/15/2018	Application #:	15655336	Filing Dt:	07/20/2017
Publication #:	US20170322730	Pub Dt:	11/09/2017
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	10140028	Issue Dt:	11/27/2018	Application #:	15957120	Filing Dt:	04/19/2018
Publication #:	US20180314424	Pub Dt:	11/01/2018
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	10489057	Issue Dt:	11/26/2019	Application #:	16184607	Filing Dt:	11/08/2018
Publication #:	US20190163365	Pub Dt:	05/30/2019
Title:	CLOCK MODE DETERMINATION IN A MEMORY SYSTEM

Patent #:	10706943	Issue Dt:	07/07/2020	Application #:	16221824	Filing Dt:	12/17/2018
Publication #:	US20190189225	Pub Dt:	06/20/2019
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Assignor

CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

Exec Dt:

04/01/2021

Assignee

MOSAID TECHNOLOGIES INCORPORATED

515 LEGGET DRIVE

SUITE 704

OTTAWA, CANADA K2K 3G4

Correspondence name and address
	CONVERSANT IP MANAGEMENT CORP.
	5830 GRANITE PARKWAY #100-247
	SUITE 247
	PLANO, TX 75024

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