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07/25/2013
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07/14/2015
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08/14/2014
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01/14/2014
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06/18/2019
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12/09/2014
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08/21/2014
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01/30/2014
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12/12/2013
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02/27/2014
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04/21/2016
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06/11/2019
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03/19/2019
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Application #:
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15454909
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Filing Dt:
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03/09/2017
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Title:
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Circuit Defect Diagnosis Based On Sink Cell Fault Models
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Patent #:
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Issue Dt:
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06/18/2019
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Application #:
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15454963
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Filing Dt:
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03/09/2017
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Publication #:
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Pub Dt:
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10/05/2017
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Title:
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Automatic Axial Thrust Analysis Of Turbomachinery Designs
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Patent #:
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Issue Dt:
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02/18/2020
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Application #:
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15458727
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Filing Dt:
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03/14/2017
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Publication #:
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Pub Dt:
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09/14/2017
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Title:
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COMMUNICATION CIRCUITRY IN AN ELECTRONIC CONTROL UNIT
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Patent #:
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Issue Dt:
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09/04/2018
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15472364
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Filing Dt:
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03/29/2017
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Publication #:
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Pub Dt:
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10/05/2017
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Title:
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Correcting EUV Crosstalk Effects For Lithography Simulation
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Patent #:
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Issue Dt:
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06/11/2019
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Application #:
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15592763
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Filing Dt:
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05/11/2017
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Publication #:
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Pub Dt:
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11/16/2017
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Title:
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Wide-Range Clock Signal Generation For Speed Grading Of Logic Cores
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Patent #:
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Issue Dt:
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10/12/2021
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Application #:
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15594382
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Filing Dt:
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05/12/2017
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Publication #:
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Pub Dt:
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12/07/2017
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Title:
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VIRTUAL ETHERNET MUTABLE PORT GROUP TRANSACTOR
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Patent #:
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Issue Dt:
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12/10/2019
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Application #:
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15669283
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08/04/2017
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Publication #:
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Pub Dt:
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11/23/2017
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Title:
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TARGET CAPTURE AND REPLAY IN EMULATION
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Patent #:
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Issue Dt:
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09/10/2019
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Application #:
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15724262
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Filing Dt:
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10/03/2017
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Title:
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CONTENT ADDRESSABLE MEMORY MODELING IN EMULATION AND PROTOTYPING
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Patent #:
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Issue Dt:
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12/03/2019
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Application #:
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15724264
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Filing Dt:
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10/03/2017
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Title:
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Dynamic Model Generation For Lithographic Simulation
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Patent #:
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Issue Dt:
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03/10/2020
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15789719
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10/20/2017
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Pub Dt:
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04/26/2018
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Title:
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REMOVAL OF ARTIFICIAL RESONANCES USING BOUNDARY ELEMENT METHOD
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Patent #:
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Issue Dt:
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04/21/2020
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15792078
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10/24/2017
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Pub Dt:
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04/26/2018
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Title:
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Flow Control In Networking System-On-Chip Verification
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Patent #:
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Issue Dt:
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01/19/2021
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Application #:
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15792158
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Filing Dt:
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10/24/2017
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Publication #:
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Pub Dt:
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11/01/2018
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Title:
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Determination Of Structure Function Feature Correlation To Thermal Model Element Layers
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Patent #:
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Issue Dt:
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03/19/2019
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Application #:
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15796596
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Filing Dt:
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10/27/2017
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Publication #:
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Pub Dt:
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05/03/2018
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Title:
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WORST CASE EYE FOR MULTI-LEVEL PULSE AMPLITUDE MODULATED LINKS
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Patent #:
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Issue Dt:
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12/03/2019
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15873833
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01/17/2018
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10/25/2018
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Title:
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Context-Aware Pattern Matching For Layout Processing
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Patent #:
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Issue Dt:
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06/09/2020
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15873879
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Filing Dt:
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01/17/2018
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Publication #:
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Pub Dt:
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10/18/2018
| | | | |
Title:
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GENERIC PROTOCOL ANALYZER FOR CIRCUIT DESIGN VERIFICATION
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Patent #:
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Issue Dt:
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12/17/2019
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Application #:
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15884369
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01/30/2018
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Publication #:
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Pub Dt:
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09/06/2018
| | | | |
Title:
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Test Application Time Reduction Using Capture-Per-Cycle Test Points
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Patent #:
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Issue Dt:
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10/06/2020
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15884372
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01/30/2018
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Publication #:
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Pub Dt:
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09/06/2018
| | | | |
Title:
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CELL-AWARE DIAGNOSTIC PATTERN GENERATION FOR LOGIC DIAGNOSIS
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Patent #:
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Issue Dt:
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09/29/2020
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Application #:
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15925642
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Filing Dt:
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03/19/2018
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Title:
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Efficient And Flexible Network For Streaming Data In Circuits
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Patent #:
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Issue Dt:
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05/26/2020
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15943423
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Filing Dt:
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04/02/2018
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Pub Dt:
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10/04/2018
| | | | |
Title:
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Concurrent Testbench and Software Driven Verification
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Patent #:
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Issue Dt:
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05/19/2020
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15972812
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05/07/2018
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Title:
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Inter-Cell Bridge Defect Diagnosis
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Patent #:
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Issue Dt:
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12/31/2019
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15985679
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Filing Dt:
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05/21/2018
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Pub Dt:
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11/22/2018
| | | | |
Title:
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Reconfigurable Scan Network Defect Diagnosis
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