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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 104 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
8596879
Issue Dt:
12/03/2013
Application #:
13277767
Filing Dt:
10/20/2011
Publication #:
US20130044979
Pub Dt:
02/21/2013
Title:
METHOD TO REORDER (SHUFFLE) OPTICAL CABLE WAVEGUIDE LAYERS
2
Patent #:
8420459
Issue Dt:
04/16/2013
Application #:
13277956
Filing Dt:
10/20/2011
Publication #:
US20130102130
Pub Dt:
04/25/2013
Title:
BULK FIN-FIELD EFFECT TRANSISTORS WITH WELL DEFINED ISOLATION
3
Patent #:
8334177
Issue Dt:
12/18/2012
Application #:
13278010
Filing Dt:
10/20/2011
Publication #:
US20120040517
Pub Dt:
02/16/2012
Title:
METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL
4
Patent #:
8557649
Issue Dt:
10/15/2013
Application #:
13278301
Filing Dt:
10/21/2011
Publication #:
US20130102125
Pub Dt:
04/25/2013
Title:
METHOD FOR CONTROLLING STRUCTURE HEIGHT
5
Patent #:
8468483
Issue Dt:
06/18/2013
Application #:
13279373
Filing Dt:
10/24/2011
Publication #:
US20130104092
Pub Dt:
04/25/2013
Title:
METHOD, SYSTEM AND PROGRAM STORAGE DEVICE FOR PERFORMING A PARAMETERIZED STATISTICAL STATIC TIMING ANALYSIS (SSTA) OF AN INTEGRATED CIRCUIT TAKING INTO ACCOUNT SETUP AND HOLD MARGIN INTERDEPENDENCE
6
Patent #:
NONE
Issue Dt:
Application #:
13279608
Filing Dt:
10/24/2011
Publication #:
US20130099856
Pub Dt:
04/25/2013
Title:
Methods and Circuits for Achieving Rational Fractional Drive Currents in Circuits Employing FinFET Devices
7
Patent #:
9147658
Issue Dt:
09/29/2015
Application #:
13279687
Filing Dt:
10/24/2011
Publication #:
US20130100590
Pub Dt:
04/25/2013
Title:
STACKED POWER SUPPLIES FOR INTEGRATED CIRCUIT DEVICES AND METHODS OF MAKING SAME
8
Patent #:
8543964
Issue Dt:
09/24/2013
Application #:
13280146
Filing Dt:
10/24/2011
Publication #:
US20120110541
Pub Dt:
05/03/2012
Title:
CONSTRAINT OPTIMIZATION OF SUB-NET LEVEL ROUTING IN ASIC DESIGN
9
Patent #:
NONE
Issue Dt:
Application #:
13280489
Filing Dt:
10/25/2011
Publication #:
US20130103456
Pub Dt:
04/25/2013
Title:
METHOD, SYSTEM AND PROGRAM STORAGE DEVICE FOR PRODUCTION PLANNING
10
Patent #:
8779838
Issue Dt:
07/15/2014
Application #:
13280666
Filing Dt:
10/25/2011
Publication #:
US20130099853
Pub Dt:
04/25/2013
Title:
METHODOLOGY AND APPARATUS FOR TUNING DRIVING CURRENT OF SEMICONDUCTOR TRANSISTORS
11
Patent #:
8748285
Issue Dt:
06/10/2014
Application #:
13280681
Filing Dt:
11/28/2011
Publication #:
US20130134518
Pub Dt:
05/30/2013
Title:
NOBLE GAS IMPLANTATION REGION IN TOP SILICON LAYER OF SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
12
Patent #:
NONE
Issue Dt:
Application #:
13280848
Filing Dt:
10/25/2011
Publication #:
US20120037996
Pub Dt:
02/16/2012
Title:
SRAM BIT CELL WITH SELF-ALIGNED BIDIRECTIONAL LOCAL INTERCONNECTS
13
Patent #:
8580672
Issue Dt:
11/12/2013
Application #:
13280881
Filing Dt:
10/25/2011
Publication #:
US20130099372
Pub Dt:
04/25/2013
Title:
METHODS OF FORMING BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER
14
Patent #:
8673770
Issue Dt:
03/18/2014
Application #:
13281105
Filing Dt:
10/25/2011
Publication #:
US20130102147
Pub Dt:
04/25/2013
Title:
METHODS OF FORMING CONDUCTIVE STRUCTURES IN DIELECTRIC LAYERS ON AN INTEGRATED CIRCUIT DEVICE
15
Patent #:
8575013
Issue Dt:
11/05/2013
Application #:
13281236
Filing Dt:
10/25/2011
Publication #:
US20130099295
Pub Dt:
04/25/2013
Title:
REPLACEMENT GATE FABRICATION METHODS
16
Patent #:
9190316
Issue Dt:
11/17/2015
Application #:
13281732
Filing Dt:
10/26/2011
Publication #:
US20130105996
Pub Dt:
05/02/2013
Title:
LOW ENERGY ETCH PROCESS FOR NITROGEN-CONTAINING DIELECTRIC LAYER
17
Patent #:
8916054
Issue Dt:
12/23/2014
Application #:
13281749
Filing Dt:
10/26/2011
Publication #:
US20130108833
Pub Dt:
05/02/2013
Title:
HIGH FIDELITY PATTERNING EMPLOYING A FLUOROHYDROCARBON-CONTAINING POLYMER
18
Patent #:
8809998
Issue Dt:
08/19/2014
Application #:
13282123
Filing Dt:
10/26/2011
Publication #:
US20130105941
Pub Dt:
05/02/2013
Title:
SEMICONDUCTOR DEVICE INCLUDING IN WAFER INDUCTORS, RELATED METHOD AND DESIGN STRUCTURE
19
Patent #:
8853045
Issue Dt:
10/07/2014
Application #:
13282224
Filing Dt:
10/26/2011
Publication #:
US20120038026
Pub Dt:
02/16/2012
Title:
LOW CAPACITANCE PRECISION RESISTOR
20
Patent #:
9048136
Issue Dt:
06/02/2015
Application #:
13282261
Filing Dt:
10/26/2011
Publication #:
US20130107608
Pub Dt:
05/02/2013
Title:
SRAM CELL WITH INDIVIDUAL ELECTRICAL DEVICE THRESHOLD CONTROL
21
Patent #:
9029956
Issue Dt:
05/12/2015
Application #:
13282299
Filing Dt:
10/26/2011
Publication #:
US20130107610
Pub Dt:
05/02/2013
Title:
SRAM CELL WITH INDIVIDUAL ELECTRICAL DEVICE THRESHOLD CONTROL
22
Patent #:
8395217
Issue Dt:
03/12/2013
Application #:
13283031
Filing Dt:
10/27/2011
Title:
ISOLATION IN CMOSFET DEVICES UTILIZING BURIED AIR BAGS
23
Patent #:
8445666
Issue Dt:
05/21/2013
Application #:
13283103
Filing Dt:
10/27/2011
Publication #:
US20120040460
Pub Dt:
02/16/2012
Title:
Ribonucleic Acid Interference Molecules
24
Patent #:
9057764
Issue Dt:
06/16/2015
Application #:
13283305
Filing Dt:
10/27/2011
Publication #:
US20130110487
Pub Dt:
05/02/2013
Title:
DETECTION OF UNCHECKED SIGNALS IN CIRCUIT DESIGN VERIFICATION
25
Patent #:
8575698
Issue Dt:
11/05/2013
Application #:
13283308
Filing Dt:
10/27/2011
Publication #:
US20130105818
Pub Dt:
05/02/2013
Title:
MOSFET WITH THIN SEMICONDUCTOR CHANNEL AND EMBEDDED STRESSOR WITH ENHANCED JUNCTION ISOLATION
26
Patent #:
8284017
Issue Dt:
10/09/2012
Application #:
13283328
Filing Dt:
10/27/2011
Publication #:
US20120042298
Pub Dt:
02/16/2012
Title:
STRUCTURE HAVING SUBSTANTIALLY PARALLEL RESISTOR MATERIAL LENGTHS
27
Patent #:
8466722
Issue Dt:
06/18/2013
Application #:
13284265
Filing Dt:
10/28/2011
Publication #:
US20130106474
Pub Dt:
05/02/2013
Title:
STARTUP AND PROTECTION CIRCUITRY FOR THIN OXIDE OUTPUT STAGE
28
Patent #:
8742503
Issue Dt:
06/03/2014
Application #:
13285162
Filing Dt:
10/31/2011
Publication #:
US20130105898
Pub Dt:
05/02/2013
Title:
Recessed Single Crystalline Source and Drain For Semiconductor-On-Insulator Devices
29
Patent #:
8298895
Issue Dt:
10/30/2012
Application #:
13285282
Filing Dt:
10/31/2011
Title:
SELECTIVE THRESHOLD VOLTAGE IMPLANTS FOR LONG CHANNEL DEVICES
30
Patent #:
NONE
Issue Dt:
Application #:
13285380
Filing Dt:
10/31/2011
Publication #:
US20130108779
Pub Dt:
05/02/2013
Title:
Methods of Filling Voids in Copper Structures
31
Patent #:
8778737
Issue Dt:
07/15/2014
Application #:
13285443
Filing Dt:
10/31/2011
Publication #:
US20130105981
Pub Dt:
05/02/2013
Title:
FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING
32
Patent #:
8420519
Issue Dt:
04/16/2013
Application #:
13286292
Filing Dt:
11/01/2011
Publication #:
US20130109166
Pub Dt:
05/02/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH CONTROLLED P-CHANNEL THRESHOLD VOLTAGE
33
Patent #:
8569121
Issue Dt:
10/29/2013
Application #:
13286394
Filing Dt:
11/01/2011
Publication #:
US20130105765
Pub Dt:
05/02/2013
Title:
GRAPHENE AND NANOTUBE/NANOWIRE TRANSISTOR WITH A SELF-ALIGNED GATE STRUCTURE ON TRANSPARENT SUBSTRATES AND METHOD OF MAKING SAME
34
Patent #:
8781800
Issue Dt:
07/15/2014
Application #:
13286490
Filing Dt:
11/01/2011
Publication #:
US20130110793
Pub Dt:
05/02/2013
Title:
DATA DE-DUPLICATION IN COMPUTER STORAGE SYSTEMS
35
Patent #:
8598641
Issue Dt:
12/03/2013
Application #:
13287170
Filing Dt:
11/02/2011
Publication #:
US20120043597
Pub Dt:
02/23/2012
Title:
SEA-OF-FINS STRUCTURE ON A SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATION
36
Patent #:
8735303
Issue Dt:
05/27/2014
Application #:
13287403
Filing Dt:
11/02/2011
Publication #:
US20130105900
Pub Dt:
05/02/2013
Title:
METHODS OF FORMING PFET DEVICES WITH DIFFERENT STRUCTURES AND PERFORMANCE CHARACTERISTICS
37
Patent #:
8796080
Issue Dt:
08/05/2014
Application #:
13287466
Filing Dt:
11/02/2011
Publication #:
US20130105917
Pub Dt:
05/02/2013
Title:
METHODS OF EPITAXIALLY FORMING MATERIALS ON TRANSISTOR DEVICES
38
Patent #:
8796058
Issue Dt:
08/05/2014
Application #:
13287575
Filing Dt:
11/02/2011
Publication #:
US20130105920
Pub Dt:
05/02/2013
Title:
SEMICONDUCTOR STRUCTURE
39
Patent #:
NONE
Issue Dt:
Application #:
13287942
Filing Dt:
11/02/2011
Publication #:
US20130106552
Pub Dt:
05/02/2013
Title:
INDUCTOR WITH MULTIPLE POLYMERIC LAYERS
40
Patent #:
8818785
Issue Dt:
08/26/2014
Application #:
13288541
Filing Dt:
11/03/2011
Publication #:
US20130117001
Pub Dt:
05/09/2013
Title:
Method and Apparatus for Simulating Gate Capacitance of a Tucked Transistor Device
41
Patent #:
NONE
Issue Dt:
Application #:
13288568
Filing Dt:
11/03/2011
Publication #:
US20130117002
Pub Dt:
05/09/2013
Title:
Method and Apparatus for Simulating Junction Capacitance of a Tucked Transistor Device
42
Patent #:
8431436
Issue Dt:
04/30/2013
Application #:
13288645
Filing Dt:
11/03/2011
Publication #:
US20130113106
Pub Dt:
05/09/2013
Title:
THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT WITH ENHANCED COPPER-TO-COPPER BONDING
43
Patent #:
8440490
Issue Dt:
05/14/2013
Application #:
13288686
Filing Dt:
11/03/2011
Publication #:
US20120122261
Pub Dt:
05/17/2012
Title:
CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
44
Patent #:
NONE
Issue Dt:
Application #:
13289122
Filing Dt:
11/04/2011
Publication #:
US20130115773
Pub Dt:
05/09/2013
Title:
Prevention of ILD Loss in Replacement Gate Technologies by Surface Treatmen
45
Patent #:
8575718
Issue Dt:
11/05/2013
Application #:
13289529
Filing Dt:
11/04/2011
Publication #:
US20120049321
Pub Dt:
03/01/2012
Title:
PROGRAMMABLE ELECTRICAL FUSE
46
Patent #:
8815734
Issue Dt:
08/26/2014
Application #:
13290577
Filing Dt:
11/07/2011
Publication #:
US20130113101
Pub Dt:
05/09/2013
Title:
Use of Gas Cluster Ion Beam To Reduce Metal Void Formation In Interconnect Structures
47
Patent #:
8288826
Issue Dt:
10/16/2012
Application #:
13290634
Filing Dt:
11/07/2011
Publication #:
US20120049317
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES INCLUDING GRADIENT NITRIDED BURIED OXIDE (BOX)
48
Patent #:
8772927
Issue Dt:
07/08/2014
Application #:
13290824
Filing Dt:
11/07/2011
Publication #:
US20120049341
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR PACKAGE STRUCTURES HAVING LIQUID COOLER INTEGRATED WITH FIRST LEVEL CHIP PACKAGE MODULES
49
Patent #:
8453078
Issue Dt:
05/28/2013
Application #:
13292585
Filing Dt:
11/09/2011
Publication #:
US20120060135
Pub Dt:
03/08/2012
Title:
INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
50
Patent #:
9006827
Issue Dt:
04/14/2015
Application #:
13292629
Filing Dt:
11/09/2011
Publication #:
US20130113043
Pub Dt:
05/09/2013
Title:
RADIATION HARDENED MEMORY CELL AND DESIGN STRUCTURES
51
Patent #:
9054671
Issue Dt:
06/09/2015
Application #:
13292729
Filing Dt:
11/09/2011
Publication #:
US20130113577
Pub Dt:
05/09/2013
Title:
TUNABLE FILTER STRUCTURES AND DESIGN STRUCTURES
52
Patent #:
8895384
Issue Dt:
11/25/2014
Application #:
13293210
Filing Dt:
11/10/2011
Publication #:
US20130119473
Pub Dt:
05/16/2013
Title:
GATE STRUCTURES AND METHODS OF MANUFACTURE
53
Patent #:
8566774
Issue Dt:
10/22/2013
Application #:
13293351
Filing Dt:
11/10/2011
Publication #:
US20120151193
Pub Dt:
06/14/2012
Title:
OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS
54
Patent #:
8932796
Issue Dt:
01/13/2015
Application #:
13293672
Filing Dt:
11/10/2011
Publication #:
US20130122421
Pub Dt:
05/16/2013
Title:
HYBRID PHOTORESIST COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
55
Patent #:
8543966
Issue Dt:
09/24/2013
Application #:
13294210
Filing Dt:
11/11/2011
Publication #:
US20130125073
Pub Dt:
05/16/2013
Title:
TEST PATH SELECTION AND TEST PROGRAM GENERATION FOR PERFORMANCE TESTING INTEGRATED CIRCUIT CHIPS
56
Patent #:
8490040
Issue Dt:
07/16/2013
Application #:
13294220
Filing Dt:
11/11/2011
Publication #:
US20130125076
Pub Dt:
05/16/2013
Title:
DISPOSITION OF INTEGRATED CIRCUITS USING PERFORMANCE SORT RING OSCILLATOR AND PERFORMANCE PATH TESTING
57
Patent #:
9105751
Issue Dt:
08/11/2015
Application #:
13294603
Filing Dt:
11/11/2011
Publication #:
US20130122627
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
58
Patent #:
8546240
Issue Dt:
10/01/2013
Application #:
13294610
Filing Dt:
11/11/2011
Publication #:
US20130119490
Pub Dt:
05/16/2013
Title:
METHODS OF MANUFACTURING INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM
59
Patent #:
8629036
Issue Dt:
01/14/2014
Application #:
13294615
Filing Dt:
11/11/2011
Publication #:
US20130119491
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH AMORPHOUS SILICON BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
60
Patent #:
8916446
Issue Dt:
12/23/2014
Application #:
13294671
Filing Dt:
11/11/2011
Publication #:
US20130119508
Pub Dt:
05/16/2013
Title:
BIPOLAR JUNCTION TRANSISTOR WITH MULTIPLE EMITTER FINGERS
61
Patent #:
8921194
Issue Dt:
12/30/2014
Application #:
13294697
Filing Dt:
11/11/2011
Publication #:
US20130119516
Pub Dt:
05/16/2013
Title:
PNP BIPOLAR JUNCTION TRANSISTOR FABRICATION USING SELECTIVE EPITAXY
62
Patent #:
8927357
Issue Dt:
01/06/2015
Application #:
13294731
Filing Dt:
11/11/2011
Publication #:
US20130119442
Pub Dt:
05/16/2013
Title:
JUNCTION FIELD-EFFECT TRANSISTOR WITH RAISED SOURCE AND DRAIN REGIONS FORMED BY SELECTIVE EPITAXY
63
Patent #:
8871600
Issue Dt:
10/28/2014
Application #:
13294760
Filing Dt:
11/11/2011
Publication #:
US20130119505
Pub Dt:
05/16/2013
Title:
SCHOTTKY BARRIER DIODES WITH A GUARD RING FORMED BY SELECTIVE EPITAXY
64
Patent #:
9064074
Issue Dt:
06/23/2015
Application #:
13295489
Filing Dt:
11/14/2011
Publication #:
US20130124182
Pub Dt:
05/16/2013
Title:
RETRIEVING ODD NET TOPOLOGY IN HIERARCHICAL CIRCUIT DESIGNS
65
Patent #:
8580133
Issue Dt:
11/12/2013
Application #:
13295497
Filing Dt:
11/14/2011
Publication #:
US20130122716
Pub Dt:
05/16/2013
Title:
Methods of Controlling the Etching of Silicon Nitride Relative to Silicon Dioxide
66
Patent #:
8618036
Issue Dt:
12/31/2013
Application #:
13295677
Filing Dt:
11/14/2011
Publication #:
US20130123159
Pub Dt:
05/16/2013
Title:
AQUEOUS CERIUM-CONTAINING SOLUTION HAVING AN EXTENDED BATH LIFETIME FOR REMOVING MASK MATERIAL
67
Patent #:
NONE
Issue Dt:
Application #:
13296409
Filing Dt:
11/15/2011
Publication #:
US20130119766
Pub Dt:
05/16/2013
Title:
METHOD FOR CONTROLLING UNINTERRUPTIBLE AND PARALLEL POWER MODULES
68
Patent #:
8546230
Issue Dt:
10/01/2013
Application #:
13296496
Filing Dt:
11/15/2011
Publication #:
US20130119434
Pub Dt:
05/16/2013
Title:
BIPOLAR TRANSISTOR WITH A COLLECTOR HAVING A PROTECTED OUTER EDGE PORTION FOR REDUCED BASED-COLLECTOR JUNCTION CAPACITANCE AND A METHOD OF FORMING THE TRANSISTOR
69
Patent #:
8603883
Issue Dt:
12/10/2013
Application #:
13297464
Filing Dt:
11/16/2011
Publication #:
US20130119436
Pub Dt:
05/16/2013
Title:
INTERFACE CONTROL IN A BIPOLAR JUNCTION TRANSISTOR
70
Patent #:
8432035
Issue Dt:
04/30/2013
Application #:
13297860
Filing Dt:
11/16/2011
Publication #:
US20120061839
Pub Dt:
03/15/2012
Title:
METAL CAP LAYER WITH ENHANCED ETCH RESISTIVITY FOR COPPER-BASED METAL REGIONS IN SEMICONDUCTOR DEVICES
71
Patent #:
8508043
Issue Dt:
08/13/2013
Application #:
13298183
Filing Dt:
11/16/2011
Publication #:
US20130119534
Pub Dt:
05/16/2013
Title:
METAL PAD STRUCTURE FOR THICKNESS ENHANCEMENT OF POLYMER USED IN ELECTRICAL INTERCONNECTION OF SEMICONDUCTOR DIE TO SEMICONDUCTOR CHIP PACKAGE SUBSTRATE WITH SOLDER BUMP
72
Patent #:
8705307
Issue Dt:
04/22/2014
Application #:
13298587
Filing Dt:
11/17/2011
Publication #:
US20130128682
Pub Dt:
05/23/2013
Title:
MEMORY SYSTEM WITH DYNAMIC REFRESHING
73
Patent #:
9093164
Issue Dt:
07/28/2015
Application #:
13298661
Filing Dt:
11/17/2011
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Title:
N-DOPANT FOR CARBON NANOTUBES AND GRAPHENE
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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