skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/23/2013
Application #:
13345881
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
07/11/2013
Title:
ISOLATED ZENER DIODE
2
Patent #:
Issue Dt:
07/29/2014
Application #:
13345889
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
06/21/2012
Title:
METHOD FOR HIGH DENSITY DATA STORAGE AND IMAGING
3
Patent #:
Issue Dt:
11/08/2016
Application #:
13345922
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
07/11/2013
Title:
Methods of Making Transistor Devices with Elevated Source/Drain Regions to Accommodate Consumption During Metal Silicide Formation Process
4
Patent #:
Issue Dt:
05/14/2013
Application #:
13346008
Filing Dt:
01/09/2012
Title:
METHOD TO FORM LOW SERIES RESISTANCE TRANSISTOR DEVICES ON SILICON ON INSULATOR LAYER
5
Patent #:
NONE
Issue Dt:
Application #:
13346299
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
07/11/2013
Title:
NFET Device with Tensile Stressed Channel Region and Methods of Forming Same
6
Patent #:
Issue Dt:
03/19/2013
Application #:
13346776
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
05/03/2012
Title:
METHODS OF FABRICATING PHOTOMASKS FOR IMPROVING DAMASCENE WIRE UNIFORMITY WITHOUT REDUCING PERFORMANCE
7
Patent #:
Issue Dt:
01/15/2013
Application #:
13347014
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
05/03/2012
Title:
THRESHOLD VOLTAGE ADJUSTMENT THROUGH GATE DIELECTRIC STACK MODIFICATION
8
Patent #:
Issue Dt:
05/06/2014
Application #:
13347060
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
07/11/2013
Title:
APPARATUS AND METHOD FOR REMOVING A CMP PAD FROM A PLATEN
9
Patent #:
NONE
Issue Dt:
Application #:
13347435
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
07/11/2013
Title:
TRANSISTOR WITH STRESS ENHANCED CHANNEL AND METHODS FOR FABRICATION
10
Patent #:
Issue Dt:
05/06/2014
Application #:
13347571
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
07/11/2013
Title:
INDUCTOR WITH LAMINATED YOKE
11
Patent #:
NONE
Issue Dt:
Application #:
13347687
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
07/11/2013
Title:
DIELECTRIC MATERIAL WITH HIGH MECHANICAL STRENGTH
12
Patent #:
Issue Dt:
10/28/2014
Application #:
13347851
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
05/10/2012
Title:
A TRANSISTOR STRUCTURE HAVING AN ELECTRICAL CONTACT STRUCTURE WITH MULTIPLE METAL INTERCONNECT LEVELS STAGGERING ONE ANOTHER
13
Patent #:
Issue Dt:
01/14/2014
Application #:
13348018
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
ELECTRICAL ISOLATION STRUCTURES FOR ULTRA-THIN SEMICONDUCTOR-ON-INSULATOR DEVICES
14
Patent #:
Issue Dt:
02/03/2015
Application #:
13348142
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
SRAM INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION
15
Patent #:
NONE
Issue Dt:
Application #:
13348184
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
Methods of Forming Faceted Stress-Inducing Stressors Proximate the Gate Structure of a Transistor
16
Patent #:
Issue Dt:
10/15/2013
Application #:
13348188
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
RECESSED SOURCE AND DRAIN REGIONS FOR FINFETS
17
Patent #:
Issue Dt:
10/14/2014
Application #:
13348256
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
Methods of Forming Conductive Structures Using a Dual Metal Hard Mask Technique
18
Patent #:
Issue Dt:
04/16/2013
Application #:
13348355
Filing Dt:
01/11/2012
Title:
CONTROLLING THRESHOLD VOLTAGE IN CARBON BASED FIELD EFFECT TRANSISTORS
19
Patent #:
NONE
Issue Dt:
Application #:
13348441
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING IN-LINE DIAGNOSTICS PERFORMED ON LOW-K DIELECTRIC LAYERS
20
Patent #:
Issue Dt:
10/15/2013
Application #:
13348771
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
07/18/2013
Title:
METHOD FOR FORMING N-SHAPED BOTTOM STRESS LINER
21
Patent #:
Issue Dt:
05/14/2013
Application #:
13349158
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
05/03/2012
Title:
EMBEDDED SERIES DEEP TRENCH CAPACITORS AND METHODS OF MANUFACTURE
22
Patent #:
Issue Dt:
05/31/2016
Application #:
13349203
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
05/03/2012
Title:
DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS
23
Patent #:
Issue Dt:
07/23/2013
Application #:
13349325
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
07/18/2013
Title:
TIMING ANALYSIS OF AN ARRAY CIRCUIT CROSS SECTION
24
Patent #:
Issue Dt:
04/09/2013
Application #:
13349412
Filing Dt:
01/12/2012
Title:
METHODS FOR PATTERN MATCHING IN A DOUBLE PATTERNING TECHNOLOGY-COMPLIANT PHYSICAL DESIGN FLOW
25
Patent #:
Issue Dt:
01/27/2015
Application #:
13349942
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
07/18/2013
Title:
STRAIN ENGINEERING IN THREE-DIMENSIONAL TRANSISTORS BASED ON STRAINED ISOLATION MATERIAL
26
Patent #:
Issue Dt:
09/17/2013
Application #:
13350174
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
05/10/2012
Title:
PROCESS FOR SELECTIVELY PATTERNING A MAGNETIC FILM STRUCTURE
27
Patent #:
Issue Dt:
12/25/2012
Application #:
13350817
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/10/2012
Title:
METHOD TO REDUCE A VIA AREA IN A PHASE CHANGE MEMORY CELL
28
Patent #:
Issue Dt:
11/04/2014
Application #:
13350889
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/10/2012
Title:
LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH SUBSEQUENT SELF ALIGNED SHALLOW TRENCH ISOLATION
29
Patent #:
Issue Dt:
03/11/2014
Application #:
13350891
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
07/18/2013
Title:
METHODS OF REDUCING GATE LEAKAGE
30
Patent #:
Issue Dt:
08/25/2015
Application #:
13350908
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
07/18/2013
Title:
METHODS OF FORMING A DIELECTRIC CAP LAYER ON A METAL GATE STRUCTURE
31
Patent #:
Issue Dt:
01/21/2014
Application #:
13350967
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/10/2012
Title:
IN VIA FORMED PHASE CHANGE MEMORY CELL WITH RECESSED PILLAR HEATER
32
Patent #:
Issue Dt:
07/15/2014
Application #:
13350981
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/10/2012
Title:
ULTRA-COMPACT PLL WITH WIDE TUNING RANGE AND LOW NOISE
33
Patent #:
Issue Dt:
07/23/2013
Application #:
13351012
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/17/2012
Title:
TRENCH-GENERATED TRANSISTOR STRUCTURES, DEVICE STRUCTURES, AND DESIGN STRUCTURES
34
Patent #:
Issue Dt:
06/03/2014
Application #:
13351294
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
07/18/2013
Title:
LOCAL INTERCONNECTS COMPATIBLE WITH REPLACEMENT GATE STRUCTURES
35
Patent #:
Issue Dt:
02/26/2013
Application #:
13351370
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
METHOD FOR FABRICATING AIR GAP INTERCONNECT STRUCTURES
36
Patent #:
Issue Dt:
06/04/2013
Application #:
13351398
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
GRAPHENE BASED SWITCHING DEVICE HAVING A TUNABLE BANDGAP
37
Patent #:
Issue Dt:
05/28/2013
Application #:
13351402
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
GRAPHENE BASED SWITCHING DEVICE HAVING A TUNABLE BANDGAP
38
Patent #:
Issue Dt:
08/12/2014
Application #:
13352131
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
07/18/2013
Title:
PREVENTION OF DATA LOSS DUE TO ADJACENT TRACK INTERFERENCE
39
Patent #:
Issue Dt:
11/04/2014
Application #:
13352713
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
ANALYZING A PATTERNING PROCESS USING A MODEL OF YIELD
40
Patent #:
Issue Dt:
06/10/2014
Application #:
13352737
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/19/2012
Title:
GRAPHENE DEVICES AND SEMICONDUCTOR FIELD EFFECT TRANSISTORS IN 3D HYBRID INTEGRATED CIRCUITS
41
Patent #:
NONE
Issue Dt:
Application #:
13352775
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
Methods of Forming a Gate Cap Layer Above a Replacement Gate Structure and a Semiconductor Device That Includes Such a Gate Structure and Cap Layer
42
Patent #:
Issue Dt:
08/05/2014
Application #:
13352851
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
DIFFUSION BARRIER FOR OPPOSITELY DOPED PORTIONS OF GATE CONDUCTOR
43
Patent #:
Issue Dt:
05/27/2014
Application #:
13353035
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
NEAR-NEIGHBOR TRIMMING OF DUMMY FILL SHAPES WITH BUILT-IN OPTICAL PROXIMITY CORRECTIONS FOR SEMICONDUCTOR APPLICATIONS
44
Patent #:
Issue Dt:
10/07/2014
Application #:
13353118
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
SILICON PHOTONIC CHIP OPTICAL COUPLING STRUCTURES
45
Patent #:
Issue Dt:
12/02/2014
Application #:
13353162
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
SILICON PHOTONICS WAFER USING STANDARD SILICON-ON-INSULATOR PROCESSES THROUGH SUBSTRATE REMOVAL OR TRANSFER
46
Patent #:
Issue Dt:
07/08/2014
Application #:
13353708
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
07/25/2013
Title:
FORMATION OF THE DIELECTRIC CAP LAYER FOR A REPLACEMENT GATE STRUCTURE
47
Patent #:
Issue Dt:
09/23/2014
Application #:
13353879
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
07/25/2013
Title:
DYNAMIC GRADUATED MEMORY DEVICE PROTECTION IN REDUNDANT ARRAY OF INDEPENDENT MEMORY (RAIM) SYSTEMS
48
Patent #:
Issue Dt:
07/15/2014
Application #:
13353925
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
07/25/2013
Title:
HIERARCHICAL CHANNEL MARKING IN A MEMORY SYSTEM
49
Patent #:
Issue Dt:
09/29/2015
Application #:
13354024
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
07/25/2013
Title:
FINFET SEMICONDUCTOR DEVICES WITH IMPROVED SOURCE/DRAIN RESISTANCE AND METHODS OF MAKING SAME
50
Patent #:
Issue Dt:
11/17/2015
Application #:
13354070
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
07/25/2013
Title:
SEMICONDUCTOR DEVICES WITH COPPER INTERCONNECTS AND METHODS FOR FABRICATING SAME
51
Patent #:
Issue Dt:
05/19/2015
Application #:
13354363
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
SEMICONDUCTOR DEVICE WITH A LOW-K SPACER AND METHOD OF FORMING THE SAME
52
Patent #:
NONE
Issue Dt:
Application #:
13354613
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
08/02/2012
Title:
High-K Metal Gate Electrode Structures Formed by a Replacement Gate Approach Based on Superior Planarity of Placeholder Materials
53
Patent #:
Issue Dt:
06/16/2015
Application #:
13354705
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
BACKSIDE INTEGRATION OF RF FILTERS FOR RF FRONT END MODULES AND DESIGN STRUCTURE
54
Patent #:
NONE
Issue Dt:
Application #:
13354717
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
ENERGY EFFICIENT AIR FLOW CONTROL
55
Patent #:
Issue Dt:
01/06/2015
Application #:
13354739
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHOD OF FORMING SELF-ALIGNED CONTACTS FOR A SEMICONDUCTOR DEVICE
56
Patent #:
NONE
Issue Dt:
Application #:
13354844
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
Methods of Forming Replacement Gate Structures for Semiconductor Devices
57
Patent #:
Issue Dt:
10/23/2012
Application #:
13355221
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF MANUFACTURING A TRANSISTOR DEVICE HAVING ASYMMETRIC EMBEDDED STRAIN ELEMENTS
58
Patent #:
Issue Dt:
09/09/2014
Application #:
13355691
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/25/2013
Title:
EPITAXIAL REPLACEMENT OF A RAISED SOURCE/DRAIN
59
Patent #:
Issue Dt:
06/25/2013
Application #:
13355833
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
05/24/2012
Title:
ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES
60
Patent #:
Issue Dt:
12/30/2014
Application #:
13356013
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
05/17/2012
Title:
ELECTROMIGRATION RESISTANT VIA-TO-LINE INTERCONNECT
61
Patent #:
Issue Dt:
06/16/2015
Application #:
13356090
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHOD TO FORM SILICIDE CONTACT IN TRENCHES
62
Patent #:
NONE
Issue Dt:
Application #:
13356326
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHODS FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED DAMAGE TO SHALLOW TRENCH ISOLATION (STI) REGIONS
63
Patent #:
Issue Dt:
01/08/2013
Application #:
13356681
Filing Dt:
01/24/2012
Title:
ANALYTIC EXPERIMENTAL ESTIMATOR FOR IMPACT OF VOLTAGE-OVERSHOOT OF VOLTAGE WAVEFORM ON DIELECTRIC FAILURE/BREAKDOWN
64
Patent #:
Issue Dt:
01/07/2014
Application #:
13356778
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
NEGATIVE COEFFICIENT THERMAL EXPANSION ENGINEERED PARTICLES FOR COMPOSITE FABRICATION
65
Patent #:
NONE
Issue Dt:
Application #:
13357285
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHODS OF FABRICATING INTEGRATED CIRCUITS WITH THE ELIMINATION OF VOIDS IN INTERLAYER DIELECTICS
66
Patent #:
Issue Dt:
01/01/2013
Application #:
13357656
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
05/31/2012
Title:
N-TYPE CARRIER ENHANCEMENT IN SEMICONDUCTORS
67
Patent #:
Issue Dt:
02/11/2014
Application #:
13357728
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
05/17/2012
Title:
ARRAY OF ALPHA PARTICLE SENSORS
68
Patent #:
Issue Dt:
07/01/2014
Application #:
13358101
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
08/02/2012
Title:
SOPHISTICATED GATE ELECTRODE STRUCTURES FORMED BY CAP LAYER REMOVAL WITH REDUCED LOSS OF EMBEDDED STRAIN-INDUCING SEMICONDUCTOR MATERIAL
69
Patent #:
Issue Dt:
08/04/2015
Application #:
13358172
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHOD OF MANUFACTURING SWITCHING FILTERS AND DESIGN STRUCTURES
70
Patent #:
Issue Dt:
06/16/2015
Application #:
13358180
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
07/25/2013
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR WITH REDUCED SUB-COLLECTOR LENGTH, METHOD OF MANUFACTURE AND DESIGN STRUCTURE
71
Patent #:
Issue Dt:
04/02/2013
Application #:
13358963
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
05/17/2012
Title:
3D OPTOELECTRONIC PACKAGING
72
Patent #:
Issue Dt:
07/09/2013
Application #:
13359100
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
05/17/2012
Title:
3D OPTOELECTRONIC PACKAGING
73
Patent #:
Issue Dt:
05/06/2014
Application #:
13359107
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
08/01/2013
Title:
CELL ARRAY AND DENSITY FEATURES WITH DECOUPLING CAPACITORS
74
Patent #:
Issue Dt:
03/11/2014
Application #:
13359197
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
08/01/2013
Title:
Methods of Forming SRAM Devices Using Sidewall Image Transfer Techniques
75
Patent #:
NONE
Issue Dt:
Application #:
13359242
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SRAM INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION
76
Patent #:
Issue Dt:
11/19/2013
Application #:
13359454
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SRAM WITH HYBRID FINFET AND PLANAR TRANSISTORS
77
Patent #:
Issue Dt:
07/16/2013
Application #:
13359634
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/31/2012
Title:
METHODS OF FABRICATING PASSIVE ELEMENT WITHOUT PLANARIZING AND RELATED SEMICONDUCTOR DEVICE
78
Patent #:
Issue Dt:
10/07/2014
Application #:
13359729
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
08/02/2012
Title:
ELECTRON BEAM SCULPTING OF TUNNELING JUNCTION FOR NANOPORE DNA SEQUENCING
79
Patent #:
Issue Dt:
10/22/2013
Application #:
13359818
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/17/2012
Title:
METHODS FOR READING A FEATURE PATTERN FROM A PACKAGED DIE
80
Patent #:
NONE
Issue Dt:
Application #:
13359858
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
08/01/2013
Title:
Mosfet Structures Having Compressively Strained Silicon Channel
81
Patent #:
Issue Dt:
01/27/2015
Application #:
13359970
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER HAVING A UNIFORM THICKNESS
82
Patent #:
Issue Dt:
10/30/2012
Application #:
13360055
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/17/2012
Title:
PRODUCT CHIPS AND DIE WITH A FEATURE PATTERN THAT CONTAINS INFORMATION RELATING TO THE PRODUCT CHIP
83
Patent #:
Issue Dt:
01/28/2014
Application #:
13360083
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
08/01/2013
Title:
CIRCUIT VERIFICATION USING COMPUTATIONAL ALGEBRAIC GEOMETRY
84
Patent #:
Issue Dt:
02/05/2013
Application #:
13360203
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/17/2012
Title:
ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
85
Patent #:
Issue Dt:
02/05/2013
Application #:
13360248
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/24/2012
Title:
ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
86
Patent #:
Issue Dt:
02/05/2013
Application #:
13360270
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/24/2012
Title:
ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
87
Patent #:
Issue Dt:
02/05/2013
Application #:
13360277
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/24/2012
Title:
ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
88
Patent #:
Issue Dt:
02/18/2014
Application #:
13360811
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
04/25/2013
Title:
BDD-BASED FUNCTIONAL COVERAGE ANALYSIS
89
Patent #:
Issue Dt:
11/26/2013
Application #:
13360877
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
08/23/2012
Title:
TRANSMISSION ELECTRON MICROSCOPY SAMPLE ETCHING FIXTURE
90
Patent #:
Issue Dt:
12/24/2013
Application #:
13361004
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SEMICONDUCTOR SUBSTRATES USING BANDGAP MATERIAL BETWEEN III-V CHANNEL MATERIAL AND INSULATOR LAYER
91
Patent #:
Issue Dt:
03/05/2013
Application #:
13361051
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
05/17/2012
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
92
Patent #:
Issue Dt:
08/20/2013
Application #:
13361595
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
08/01/2013
Title:
METHODS FOR QUANTITATIVELY EVALUATING THE QUALITY OF DOUBLE PATTERNING TECHNOLOGY-COMPLIANT LAYOUTS
93
Patent #:
NONE
Issue Dt:
Application #:
13361644
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
08/01/2013
Title:
INTEGRATED CIRCUITS INCLUDING COPPER LOCAL INTERCONNECTS AND METHODS FOR THE MANUFACTURE THEREOF
94
Patent #:
Issue Dt:
01/08/2013
Application #:
13362019
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
05/31/2012
Title:
FIELD EFFECT TRANSISTOR WITH CHANNEL REGION EDGE AND CENTER PORTIONS HAVING DIFFERENT BAND STRUCTURES FOR SUPPRESSED CORNER LEAKAGE
95
Patent #:
Issue Dt:
05/21/2013
Application #:
13362228
Filing Dt:
01/31/2012
Title:
UNIFORM SOLDER REFLOW FIXTURE
96
Patent #:
Issue Dt:
09/23/2014
Application #:
13362366
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SUPERCONDUCTING QUANTUM CIRCUIT HAVING A RESONANT CAVITY THERMALIZED WITH METAL COMPONENTS
97
Patent #:
Issue Dt:
07/09/2013
Application #:
13362398
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
08/01/2013
Title:
METHODS OF EPITAXIAL FINFET
98
Patent #:
Issue Dt:
03/22/2016
Application #:
13362754
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
08/01/2013
Title:
PROBABLISTIC SUBSURFACE MODELING FOR IMPROVED DRILL CONTROL AND REAL-TIME CORRECTION
99
Patent #:
Issue Dt:
07/08/2014
Application #:
13362763
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
05/24/2012
Title:
PERFORMANCE ENHANCEMENT IN PMOS AND NMOS TRANSISTORS ON THE BASIS OF SILICON/CARBON MATERIAL
100
Patent #:
Issue Dt:
11/05/2013
Application #:
13362862
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
05/24/2012
Title:
LOW TEMPERATURE MELT-PROCESSING OF ORGANIC-INORGANIC HYBRID
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

Search Results as of: 05/09/2024 02:57 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT