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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
01/28/2014
Application #:
13561760
Filing Dt:
07/30/2012
Publication #:
Pub Dt:
01/30/2014
Title:
CAPTURING MUTUAL COUPLING EFFECTS BETWEEN AN INTEGRATED CIRCUIT CHIP AND CHIP PACKAGE
2
Patent #:
Issue Dt:
03/24/2015
Application #:
13561932
Filing Dt:
07/30/2012
Publication #:
Pub Dt:
01/30/2014
Title:
CROSS-COUPLING BASED DESIGN USING DIFFUSION CONTACT STRUCTURES
3
Patent #:
Issue Dt:
06/17/2014
Application #:
13562341
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
SELF ALIGNED BORDERLESS CONTACT
4
Patent #:
Issue Dt:
12/23/2014
Application #:
13562426
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
INTERCONNECT FORMATION USING A SIDEWALL MASK LAYER
5
Patent #:
Issue Dt:
06/16/2015
Application #:
13562506
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
11/27/2014
Title:
Rate Adaptive Transmission of Wireless Broadcast Packets
6
Patent #:
Issue Dt:
05/27/2014
Application #:
13562659
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
INTEGRATED CIRCUIT HAVING A REPLACEMENT GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME
7
Patent #:
Issue Dt:
06/23/2015
Application #:
13562779
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
Structure And Method To Realize Conformal Doping In Deep Trench Applications
8
Patent #:
Issue Dt:
06/04/2013
Application #:
13562827
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
11/22/2012
Title:
SELF-ALIGNED CONTACTS IN CARBON DEVICES
9
Patent #:
Issue Dt:
04/29/2014
Application #:
13562927
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
METHOD AND STRUCTURE OF FORMING BACKSIDE THROUGH SILICON VIA CONNECTIONS
10
Patent #:
Issue Dt:
09/16/2014
Application #:
13562953
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
METHOD OF FABRICATING A PROFILE CONTROL IN INTERCONNECT STRUCTURES
11
Patent #:
Issue Dt:
03/10/2015
Application #:
13563202
Filing Dt:
07/31/2012
Publication #:
Pub Dt:
02/06/2014
Title:
DUAL WORK FUNCTION FINFET STRUCTURES AND METHODS FOR FABRICATING THE SAME
12
Patent #:
Issue Dt:
06/10/2014
Application #:
13564221
Filing Dt:
08/01/2012
Publication #:
Pub Dt:
02/06/2014
Title:
EXTREME ULTRAVIOLET (EUV) MULTILAYER DEFECT COMPENSATION AND EUV MASKS
13
Patent #:
Issue Dt:
03/24/2015
Application #:
13564244
Filing Dt:
08/01/2012
Publication #:
Pub Dt:
02/06/2014
Title:
THIN FILM SOLAR CELLS
14
Patent #:
Issue Dt:
01/27/2015
Application #:
13564414
Filing Dt:
08/01/2012
Publication #:
Pub Dt:
11/22/2012
Title:
FABRICATING A CONTACT RHODIUM STRUCTURE BY ELECTROPLATING AND ELECTROPLATING COMPOSITION
15
Patent #:
Issue Dt:
05/20/2014
Application #:
13564751
Filing Dt:
08/02/2012
Publication #:
Pub Dt:
02/06/2014
Title:
METHOD FOR ACHIEVING AN EFFICIENT STATISTICAL OPTIMIZATION OF INTEGRATED CIRCUITS
16
Patent #:
Issue Dt:
08/05/2014
Application #:
13565080
Filing Dt:
08/02/2012
Publication #:
Pub Dt:
02/06/2014
Title:
SELF-POLARIZED MASK AND SELF-POLARIZED MASK APPLICATION
17
Patent #:
Issue Dt:
06/16/2015
Application #:
13565838
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
02/06/2014
Title:
METHOD OF FORMING FIN-FIELD EFFECT TRANSISTOR (finFET) STRUCTURE
18
Patent #:
Issue Dt:
03/04/2014
Application #:
13565970
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
02/07/2013
Title:
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY EARLY CAP LAYER ADAPTATION
19
Patent #:
Issue Dt:
03/25/2014
Application #:
13566053
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
11/22/2012
Title:
NONVOLATILE NANO-ELECTROMECHANICAL SYSTEM DEVICE
20
Patent #:
Issue Dt:
03/17/2015
Application #:
13566324
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
01/30/2014
Title:
CHARGE SENSORS USING INVERTED LATERAL BIPOLAR JUNCTION TRANSISTORS
21
Patent #:
Issue Dt:
12/23/2014
Application #:
13566404
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
02/06/2014
Title:
SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURE
22
Patent #:
Issue Dt:
11/19/2013
Application #:
13566568
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
11/29/2012
Title:
METHOD OF FORMING ISOLATION STRUCTURES FOR SOI DEVICES WITH ULTRATHIN SOI AND ULTRATHIN BOX
23
Patent #:
Issue Dt:
10/22/2013
Application #:
13566594
Filing Dt:
08/03/2012
Publication #:
Pub Dt:
11/29/2012
Title:
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
24
Patent #:
Issue Dt:
05/27/2014
Application #:
13567233
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
02/06/2014
Title:
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DOUBLE PATTERNING PROCESSES
25
Patent #:
Issue Dt:
02/25/2014
Application #:
13567353
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
11/29/2012
Title:
ADVANCED MEMORY DEVICE HAVING IMPROVED PERFORMANCE, REDUCED POWER AND INCREASED RELIABILITY
26
Patent #:
Issue Dt:
05/28/2013
Application #:
13567357
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
11/29/2012
Title:
ADVANCED MEMORY DEVICE HAVING IMPROVED PERFORMANCE, REDUCED POWER AND INCREASED RELIABILITY
27
Patent #:
Issue Dt:
03/25/2014
Application #:
13567407
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
02/06/2014
Title:
THIN FILM SOLAR CELLS
28
Patent #:
Issue Dt:
06/24/2014
Application #:
13567567
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
01/16/2014
Title:
UNDERFILL MATERIAL DISPENSING FOR STACKED SEMICONDUCTOR CHIPS
29
Patent #:
Issue Dt:
09/20/2016
Application #:
13567853
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
02/06/2014
Title:
INTEGRATED CIRCUITS WITH METAL-INSULATOR-METAL (MIM) CAPACITORS AND METHODS FOR FABRICATING SAME
30
Patent #:
Issue Dt:
10/07/2014
Application #:
13568121
Filing Dt:
08/06/2012
Publication #:
Pub Dt:
01/09/2014
Title:
FLEXIBLE III-V SOLAR CELL STRUCTURE
31
Patent #:
Issue Dt:
06/09/2015
Application #:
13568248
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
02/13/2014
Title:
ELECTRO-RHEOLOGICAL MICRO-CHANNEL ANISOTROPIC COOLED INTEGRATED CIRCUITS AND METHODS THEREOF
32
Patent #:
Issue Dt:
12/24/2013
Application #:
13568324
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
11/29/2012
Title:
UTILIZATION OF ORGANIC BUFFER LAYER TO FABRICATE HIGH PERFORMANCE CARBON NANOELECTRONIC DEVICES
33
Patent #:
Issue Dt:
06/14/2016
Application #:
13568449
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
02/13/2014
Title:
WAFERSTART PROCESSES AND SYSTEMS FOR INTEGRATED CIRCUIT FABRICATION
34
Patent #:
Issue Dt:
10/08/2013
Application #:
13568601
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
11/29/2012
Title:
SOI TRENCH DRAM STRUCTURE WITH BACKSIDE STRAP
35
Patent #:
NONE
Issue Dt:
Application #:
13568655
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
11/29/2012
Title:
THIN BODY SILICON-ON-INSULATOR TRANSISTOR WITH BORDERLESS SELF-ALIGNED CONTACTS
36
Patent #:
Issue Dt:
02/25/2014
Application #:
13568720
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
INTEGRATED CIRCUIT STACK
37
Patent #:
Issue Dt:
04/14/2015
Application #:
13568737
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
02/13/2014
Title:
MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES
38
Patent #:
Issue Dt:
03/10/2015
Application #:
13568802
Filing Dt:
08/07/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CAPACITORS POSITIONED AT THE DEVICE LEVEL IN AN INTEGRATED CIRCUIT PRODUCT AND METHODS OF MAKING SUCH CAPACITORS
39
Patent #:
Issue Dt:
09/30/2014
Application #:
13569486
Filing Dt:
08/08/2012
Publication #:
Pub Dt:
02/13/2014
Title:
METHOD FOR OPTIMIZING REFRESH RATE FOR DRAM
40
Patent #:
Issue Dt:
07/01/2014
Application #:
13569674
Filing Dt:
08/08/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CONTROLLED COLLAPSE CHIP CONNECTION (C4) STRUCTURE AND METHODS OF FORMING
41
Patent #:
Issue Dt:
07/02/2013
Application #:
13569745
Filing Dt:
08/08/2012
Publication #:
Pub Dt:
02/28/2013
Title:
ON-CHIP RADIATION DOSIMETER
42
Patent #:
Issue Dt:
10/21/2014
Application #:
13569826
Filing Dt:
08/08/2012
Publication #:
Pub Dt:
11/29/2012
Title:
CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD
43
Patent #:
NONE
Issue Dt:
Application #:
13569872
Filing Dt:
08/08/2012
Publication #:
Pub Dt:
11/29/2012
Title:
SILICON CARRIER STRUCTURE AND METHOD OF FORMING SAME
44
Patent #:
Issue Dt:
06/16/2015
Application #:
13570285
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/13/2014
Title:
INTEGRATED CIRCUIT PRODUCT YIELD OPTIMIZATION USING THE RESULTS OF PERFORMANCE PATH TESTING
45
Patent #:
Issue Dt:
10/22/2013
Application #:
13570360
Filing Dt:
08/09/2012
Title:
INVERSION MODE VARACTOR
46
Patent #:
Issue Dt:
02/03/2015
Application #:
13570379
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
01/30/2014
Title:
METHOD OF EDRAM DT STRAP FORMATION IN FINFET DEVICE STRUCTURE
47
Patent #:
Issue Dt:
07/22/2014
Application #:
13570388
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
Gate-Last Fabrication of Quarter-Gap MGHK FET
48
Patent #:
Issue Dt:
03/24/2015
Application #:
13570390
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
HIGH DENSITY MEMORY DEVICE
49
Patent #:
NONE
Issue Dt:
Application #:
13570393
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/06/2014
Title:
Structure And Method To Realize Conformal Doping In Deep Trench Applications
50
Patent #:
NONE
Issue Dt:
Application #:
13570410
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/13/2014
Title:
METHODS OF FORMING STRESS-INDUCING LAYERS ON SEMICONDUCTOR DEVICES
51
Patent #:
Issue Dt:
06/16/2015
Application #:
13570426
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/13/2014
Title:
INHIBITING PROPAGATION OF IMPERFECTIONS IN SEMICONDUCTOR DEVICES
52
Patent #:
Issue Dt:
11/18/2014
Application #:
13570833
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
RAISED SOURCE/DRAIN STRUCTURE FOR ENHANCED STRAIN COUPLING FROM STRESS LINER
53
Patent #:
Issue Dt:
08/19/2014
Application #:
13570841
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
01/30/2014
Title:
VISUALIZING JOBS IN A DISTRIBUTED ENVIRONMENT WITH LIMITED RESOURCES
54
Patent #:
Issue Dt:
07/16/2013
Application #:
13570847
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
MANAGING CONCURRENT ACCESSES TO A CACHE
55
Patent #:
Issue Dt:
11/05/2013
Application #:
13570921
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
PATTERNING NANO-SCALE PATTERNS ON A FILM COMPRISING UNZIPPING COPOLYMERS
56
Patent #:
Issue Dt:
10/20/2015
Application #:
13570922
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
PATTERNING NANO-SCALE PATTERNS ON A FILM COMPRISING UNZIPPING COPOLYMERS
57
Patent #:
Issue Dt:
06/24/2014
Application #:
13570972
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/13/2014
Title:
STRUCTURE WITH SUB-LITHOGRAPHIC RANDOM CONDUCTORS AS A PHYSICAL UNCLONABLE FUNCTION
58
Patent #:
Issue Dt:
04/30/2013
Application #:
13570980
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS
59
Patent #:
Issue Dt:
04/09/2013
Application #:
13570989
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS
60
Patent #:
Issue Dt:
03/18/2014
Application #:
13571094
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
GATED DIODE MEMORY CELLS
61
Patent #:
Issue Dt:
02/11/2014
Application #:
13571190
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
02/13/2014
Title:
SRAM INTEGRATED CIRCUITS WITH BURIED SADDLE-SHAPED FINFET AND METHODS FOR THEIR FABRICATION
62
Patent #:
Issue Dt:
09/24/2013
Application #:
13571429
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
11/29/2012
Title:
SCHOTTKY FET FABRICATED WITH GATE LAST PROCESS
63
Patent #:
Issue Dt:
05/06/2014
Application #:
13571470
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
02/13/2014
Title:
METHODS OF IN-SITU VAPOR PHASE DEPOSITION OF SELF-ASSEMBLED MONOLAYERS AS COPPER ADHESION PROMOTERS AND DIFFUSION BARRIERS
64
Patent #:
NONE
Issue Dt:
Application #:
13571604
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
02/13/2014
Title:
METHODS OF MAKING STRESSED MATERIAL LAYERS AND A SYSTEM FOR FORMING SUCH LAYERS
65
Patent #:
Issue Dt:
06/03/2014
Application #:
13571607
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
02/13/2014
Title:
DOUBLE CONTACTS FOR CARBON NANOTUBES THIN FILM DEVICES
66
Patent #:
Issue Dt:
02/03/2015
Application #:
13571657
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
08/28/2014
Title:
TFET WITH NANOWIRE SOURCE
67
Patent #:
Issue Dt:
07/08/2014
Application #:
13571791
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHODS OF FORMING METAL OXIDE NANOSTRUCTURES, AND NANOSTRUCTURES THEREOF
68
Patent #:
Issue Dt:
07/23/2013
Application #:
13571920
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
11/29/2012
Title:
3D INTEGRATED CIRCUIT DEVICE HAVING LOWER-COST ACTIVE CIRCUITRY LAYERS STACKED BEFORE HIGHER-COST ACTIVE CIRCUITRY LAYER
69
Patent #:
Issue Dt:
11/12/2013
Application #:
13571986
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
11/29/2012
Title:
PIXEL SENSOR CELL WITH A DUAL WORK FUNCTION GATE ELECTRODE
70
Patent #:
Issue Dt:
02/24/2015
Application #:
13572004
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
01/22/2015
Title:
COMPUTER READABLE MEDIUM ENCODED WITH A PROGRAM FOR FABRICATING 3D INTEGRATED CIRCUIT DEVICE USING INTERFACE WAFER AS PERMANENT CARRIER
71
Patent #:
Issue Dt:
03/04/2014
Application #:
13572037
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHOD FOR FABRICATING 3D INTEGRATED CIRCUIT DEVICE USING INTERFACE WAFER AS PERMANENT CARRIER
72
Patent #:
Issue Dt:
11/03/2015
Application #:
13572039
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHOD FOR FABRICATING MOSFET ON SILICON-ON-INSULATOR WITH INTERNAL BODY CONTACT
73
Patent #:
Issue Dt:
09/09/2014
Application #:
13572114
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
NANOWIRE FET WITH TRAPEZOID GATE STRUCTURE
74
Patent #:
Issue Dt:
09/03/2013
Application #:
13572289
Filing Dt:
08/10/2012
Title:
RELIABLE PHYSICAL UNCLONABLE FUNCTION FOR DEVICE AUTHENTICATION
75
Patent #:
Issue Dt:
02/24/2015
Application #:
13572343
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
02/13/2014
Title:
INTEGRATED CIRCUITS WITH IMPROVED SPACERS AND METHODS FOR FABRICATING SAME
76
Patent #:
Issue Dt:
09/17/2013
Application #:
13572954
Filing Dt:
08/13/2012
Title:
SYSTEM YIELD OPTIMIZATION USING THE RESULTS OF INTEGRATED CIRCUIT CHIP PERFORMANCE PATH TESTING
77
Patent #:
Issue Dt:
04/15/2014
Application #:
13572988
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
COMPUTING MULTI-MAGNET BASED DEVICES AND METHODS FOR SOLUTION OF OPTIMIZATION PROBLEMS
78
Patent #:
Issue Dt:
07/15/2014
Application #:
13573000
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
12/06/2012
Title:
DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY
79
Patent #:
Issue Dt:
09/03/2013
Application #:
13584055
Filing Dt:
08/13/2012
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACTS AND LOW-K SPACERS AND THE RESULTING DEVICES
80
Patent #:
Issue Dt:
09/16/2014
Application #:
13584120
Filing Dt:
10/28/2012
Publication #:
Pub Dt:
04/03/2014
Title:
MULTI-BIT RESISTANCE MEASUREMENT
81
Patent #:
Issue Dt:
09/16/2014
Application #:
13584156
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
STRUCTURE AND METHOD TO FORM INPUT/OUTPUT DEVICES
82
Patent #:
Issue Dt:
09/23/2014
Application #:
13584176
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
HIGH DENSITY BULK FIN CAPACITOR
83
Patent #:
Issue Dt:
06/03/2014
Application #:
13584199
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
84
Patent #:
Issue Dt:
05/17/2016
Application #:
13584326
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
08/28/2014
Title:
TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
85
Patent #:
Issue Dt:
12/02/2014
Application #:
13584423
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
01/23/2014
Title:
DECODING SCHEME FOR BIPOLAR-BASED DIODE THREE-DIMENSIONAL MEMORY REQUIRING UNIPOLAR PROGRAMMING
86
Patent #:
Issue Dt:
12/17/2013
Application #:
13585152
Filing Dt:
08/14/2012
Title:
IDENTIFICATION OF ILLEGAL DEVICES USING CONTACT MAPPING
87
Patent #:
Issue Dt:
06/03/2014
Application #:
13585395
Filing Dt:
08/14/2012
Publication #:
Pub Dt:
02/20/2014
Title:
FIN STRUCTURE FORMATION INCLUDING PARTIAL SPACER REMOVAL
88
Patent #:
Issue Dt:
06/17/2014
Application #:
13585465
Filing Dt:
08/14/2012
Publication #:
Pub Dt:
02/13/2014
Title:
DOUBLE CONTACTS FOR CARBON NANOTUBES THIN FILM DEVICES
89
Patent #:
Issue Dt:
03/11/2014
Application #:
13585974
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHODS OF THINNING AND/OR DICING SEMICONDUCTING SUBSTRATES HAVING INTEGRATED CIRCUIT PRODUCTS FORMED THEREON
90
Patent #:
Issue Dt:
02/10/2015
Application #:
13586136
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
02/20/2014
Title:
MEMORY CELL ASSEMBLY INCLUDING AN AVOID DISTURB CELL
91
Patent #:
Issue Dt:
11/05/2013
Application #:
13586182
Filing Dt:
08/15/2012
Title:
MULTI-ELEMENT PACKAGING OF CONCENTRATOR PHOTOVOLTAIC CELLS
92
Patent #:
Issue Dt:
01/28/2014
Application #:
13586187
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
01/30/2014
Title:
PHOTONIC MODULATOR WITH A SEMICONDUCTOR CONTACT
93
Patent #:
Issue Dt:
07/08/2014
Application #:
13587088
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
05/29/2014
Title:
TONE INVERSION OF SELF-ASSEMBLED SELF-ALIGNED STRUCTURES
94
Patent #:
Issue Dt:
10/15/2013
Application #:
13587146
Filing Dt:
08/16/2012
Title:
WRITING SCHEME FOR PHASE CHANGE MATERIAL-CONTENT ADDRESSABLE MEMORY
95
Patent #:
Issue Dt:
03/31/2015
Application #:
13587288
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHOD OF MANUFACTURING A BODY-CONTACTED SOI FINFET
96
Patent #:
Issue Dt:
03/18/2014
Application #:
13587508
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
97
Patent #:
Issue Dt:
12/17/2013
Application #:
13587521
Filing Dt:
08/16/2012
Title:
USE OF GRAPHENE TO LIMIT COPPER SURFACE OXIDATION, DIFFUSION AND ELECTROMIGRATION IN INTERCONNECT STRUCTURES
98
Patent #:
Issue Dt:
06/17/2014
Application #:
13587560
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
01/23/2014
Title:
LOW COST ANTI-FUSE STRUCTURE AND METHOD TO MAKE SAME
99
Patent #:
Issue Dt:
04/21/2015
Application #:
13587694
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
01/23/2014
Title:
SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR
100
Patent #:
Issue Dt:
07/01/2014
Application #:
13587970
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
REDUCING EDGE DIE REFLECTIVITY IN EXTREME ULTRAVIOLET LITHOGRAPHY
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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