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09/12/2000
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06/27/2000
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07/18/2000
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02/10/1998
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08/15/2000
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08/31/1999
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09/12/2000
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06/22/1999
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10/24/2000
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08/15/2000
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10/09/2001
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02/22/2000
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11/02/1999
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09/26/2000
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11/18/2003
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12/28/1999
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05/09/2000
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05/04/2004
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03/14/2000
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03/13/2001
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07/11/2000
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10/05/1999
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10/16/2001
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02/25/1998
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07/11/2000
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05/18/1999
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02/26/1998
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09/12/2000
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08/22/2000
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02/27/1998
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08/01/2000
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04/09/2002
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07/18/2000
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02/29/2000
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05/16/2000
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03/04/1998
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03/06/1998
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10/12/1999
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02/29/2000
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03/09/1998
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07/17/2001
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09/05/2000
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08/29/2000
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03/07/2000
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02/15/2000
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10/03/2000
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08/22/2000
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03/11/1998
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08/01/2000
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03/12/1998
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02/08/2000
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03/14/2000
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08/15/2000
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03/11/1998
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09/28/1999
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10/31/2000
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07/27/1998
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11/28/2000
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07/17/1998
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09/12/2000
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06/26/2001
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03/25/1998
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07/04/2000
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03/14/2000
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03/27/1998
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12/28/1999
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03/30/1998
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10/19/1999
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03/30/1998
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05/08/2001
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03/30/1998
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06/20/2000
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12/28/1999
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Filing Dt:
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04/01/1998
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Title:
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POLYTETRAFLUOROETHYLENE THIN FILM CHIP CARRIER
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09055648
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Filing Dt:
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04/06/1998
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Title:
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LIGHTLY DOPED DRAIN FORMATION INTEGRATED WITH SOURCE/DRAIN FORMATION FOR HIGH-PERFORMANCE TRANSISTOR FORMATION
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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09055876
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Filing Dt:
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04/07/1998
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Title:
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METHOD OF ELECTROPLATING A COPPER OR COPPER ALLOY INTERCONNECT
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09056509
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Filing Dt:
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04/07/1998
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Title:
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AN EMULATOR SUPPORT MODE FOR DISABLING AND RECONFIGURING TIMEOUTS OF A WATCHDOG TIMER
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09056521
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Filing Dt:
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04/07/1998
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Title:
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DIRECT PHASE SHIFT MEASUREMENT BETWEEN INTERFERENCE PATTERNS USING AERIAL IMAGE MEASUREMENT TOOL
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Patent #:
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Issue Dt:
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12/09/2003
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Application #:
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09056836
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Filing Dt:
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04/07/1998
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Title:
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TRI-LEVEL SEGMENTED CONTROL TRANSISTOR AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09056837
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Filing Dt:
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04/07/1998
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Title:
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MULTIPLE SPLIT GATE SEMICONDUCTOR DEVICE AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09056838
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Filing Dt:
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04/07/1998
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Title:
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A CONTORL CIRCUIT FOR SWITCHING A PROCESSOR BETWEEN MULTIPLE LOW POWER STATES TO ALLOW CACHE SNOOPS
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09057055
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Filing Dt:
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04/08/1998
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Title:
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METHOD AND APPARATUS FOR PERFORMING OVERSHIFTED ROTATE THROUGH CARRY INSTRUCTIONS BY SHIFTING IN OPPOSITE DIRECTIONS
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09057091
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Filing Dt:
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04/08/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING IN-DOPED INDIUM OXIDE ETCH STOP
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Patent #:
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Issue Dt:
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03/16/1999
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Application #:
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09057251
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Filing Dt:
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04/08/1998
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Title:
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HIGH-PERFORMANCE PMOS TRANSISTOR USING A BARRIER IMPLANT IN THE SOURCE-SIDE OF THE TRANSISTOR CHANNEL
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09057271
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Filing Dt:
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04/08/1998
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Title:
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METHOD AND CIRCUIT FOR DETECTING OVERFLOW IN OPERAND MULTIPLICATION
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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09057418
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Filing Dt:
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04/08/1998
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Title:
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"CIRCUIT AND METHOD FOR DETERMINING OVERFLOW IN SIGNED DIVISION"
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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09058266
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Filing Dt:
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04/10/1998
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Title:
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SEQUENTIAL BUILD-UP ORGANIC CHIP CARRIER AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09058897
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Filing Dt:
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04/13/1998
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Title:
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END-OF-RANGE DAMAGE SUPPRESSION FOR ULTRA-SHALLOW JUNCTION FORMATION
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09060522
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Filing Dt:
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04/14/1998
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Title:
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POST ETCH SILICIDE FORMATION USING DIELECTRIC ETCHBACK AFTER GLOBAL PLANARIZATION
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09061252
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Filing Dt:
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04/17/1998
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Title:
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APPARATUS AND METHOD FOR DETERMINING AN OPTIMUM EQUALIZER SETTING FOR A SIGNAL EQUALIZER IN A COMMUNICATION NETWORK RECEIVER
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09061409
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Filing Dt:
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04/16/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING ELEVATED GATE ELECTRODE AND ELEVATED ACTIVE REGIONS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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09061552
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Filing Dt:
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04/16/1998
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Title:
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"SOURCE/DRAIN AND LIGHTLY DOPED DRAIN FORMATION AT POST INTERLEVEL DIELECTRIC ISOLATION WITH HIGH-K GATE ELECTRODE DESIGN
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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09062095
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Filing Dt:
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04/17/1998
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Title:
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ULTRA THIN SPACERS FORMED LATERALLY ADJACENT A GATE CONDUCTOR RECESSED BELOW THE UPPER SURFACE OF A SUBSTRATE
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Patent #:
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Issue Dt:
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02/15/2000
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Application #:
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09062415
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Filing Dt:
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04/17/1998
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Title:
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GLITCH FREE DELAY LINE MULTIPLEXING TECHNIQUE
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Patent #:
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Issue Dt:
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12/19/2000
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Application #:
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09062470
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Filing Dt:
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04/17/1998
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Title:
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INTERGRATED HEATSINK AND HEATPIPE
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09063081
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Filing Dt:
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04/21/1998
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Title:
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METHOD OF MAKING ENHANCED TRENCH OXIDE WITH LOW TEMPERATURE NITROGEN INTEGRATION
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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09063481
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Filing Dt:
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04/20/1998
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Title:
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INTERLEVEL DIELECTRIC WITH MULTIPLE AIR GAPS BETWEEN CONDUCTIVE LINES OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09063796
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Filing Dt:
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04/21/1998
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Title:
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METHOD AND STRUCTURE FOR ISOLATING SEMICONDUCTOR DEVICES AFTER TRANSISTOR FORMATION
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Patent #:
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Issue Dt:
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10/17/2000
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Application #:
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09063822
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Filing Dt:
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04/22/1998
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Title:
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SOI-BODY SELECTIVE LINK METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09064955
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Filing Dt:
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04/23/1998
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Title:
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PHOTO ACID GENERATOR COMPOUNDS, PHOTO RESISTS, AND METHOD FOR IMPROVING BIAS
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|
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Patent #:
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|
Issue Dt:
|
05/09/2000
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Application #:
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09065238
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Filing Dt:
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04/23/1998
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Title:
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PROCESSOR CONFIGURED TO SELECT A NEXT FETCH ADDRESS BY PARTIALLY DECODING A BYTEOF A CONTROL TRANSFER INSTRUCTION
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|
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Patent #:
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|
Issue Dt:
|
10/17/2000
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Application #:
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09065294
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Filing Dt:
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04/23/1998
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Title:
|
Control Transfer Indication In Predecode Which Identifies Control Transfer Instructions And An Alternate Feature Of An Instruction
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