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Reel/Frame:	056987/0001			Pages:	1045
		Recorded:	05/12/2021
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 18026
Page 140 of 181
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Patent #:	9590982	Issue Dt:	03/07/2017	Application #:	14166078	Filing Dt:	01/28/2014
Publication #:	US20150113620	Pub Dt:	04/23/2015
Title:	PROXIMITY BASED DUAL AUTHENTICATION FOR A WIRELESS NETWORK

Patent #:	NONE	Issue Dt:		Application #:	14166155	Filing Dt:	01/28/2014
Publication #:	US20150214244	Pub Dt:	07/30/2015
Title:	STRUCTURE AND PROCESS TO DECOUPLE DEEP TRENCH CAPACITORS AND WELL ISOLATION

Patent #:	8975675	Issue Dt:	03/10/2015	Application #:	14166219	Filing Dt:	01/28/2014
Publication #:	US20140145250	Pub Dt:	05/29/2014
Title:	LOCALLY ISOLATED PROTECTED BULK FINFET SEMICONDUCTOR DEVICE

Patent #:	9171778	Issue Dt:	10/27/2015	Application #:	14166274	Filing Dt:	01/28/2014
Publication #:	US20140151899	Pub Dt:	06/05/2014
Title:	DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE

Patent #:	9177805	Issue Dt:	11/03/2015	Application #:	14166660	Filing Dt:	01/28/2014
Publication #:	US20150214059	Pub Dt:	07/30/2015
Title:	INTEGRATED CIRCUITS WITH METAL-INSULATOR-SEMICONDUCTOR (MIS) CONTACT STRUCTURES AND METHODS FOR FABRICATING SAME

Patent #:	NONE	Issue Dt:		Application #:	14167001	Filing Dt:	01/29/2014
Publication #:	US20140264632	Pub Dt:	09/18/2014
Title:	SEMICONDUCTOR STRUCTURE INCLUDING A TRANSISTOR HAVING A LAYER OF A STRESS-CREATING MATERIAL AND METHOD FOR THE FORMATION THEREOF

Patent #:	NONE	Issue Dt:		Application #:	14167298	Filing Dt:	01/29/2014
Publication #:	US20140145264	Pub Dt:	05/29/2014
Title:	METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR

Patent #:	9240497	Issue Dt:	01/19/2016	Application #:	14167499	Filing Dt:	01/29/2014
Publication #:	US20140145246	Pub Dt:	05/29/2014
Title:	JUNCTION FIELD EFFECT TRANSISTOR WITH AN EPITAXIALLY GROWN GATE STRUCTURE

Patent #:	9293462	Issue Dt:	03/22/2016	Application #:	14167778	Filing Dt:	01/29/2014
Publication #:	US20150214228	Pub Dt:	07/30/2015
Title:	IINTEGRATED CIRCUITS WITH DUAL SILICIDE CONTACTS AND METHODS FOR FABRICATING SAME

Patent #:	NONE	Issue Dt:		Application #:	14168112	Filing Dt:	01/30/2014
Publication #:	US20150214331	Pub Dt:	07/30/2015
Title:	REPLACEMENT METAL GATE INCLUDING DIELECTRIC GATE MATERIAL

Patent #:	9223911	Issue Dt:	12/29/2015	Application #:	14168133	Filing Dt:	01/30/2014
Publication #:	US20150213161	Pub Dt:	07/30/2015
Title:	OPTICAL MODEL EMPLOYING PHASE TRANSMISSION VALUES FOR SUB-RESOLUTION ASSIST FEATURES

Patent #:	9070788	Issue Dt:	06/30/2015	Application #:	14168208	Filing Dt:	01/30/2014
Publication #:	US20140145254	Pub Dt:	05/29/2014
Title:	INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR

Patent #:	9195132	Issue Dt:	11/24/2015	Application #:	14168396	Filing Dt:	01/30/2014
Publication #:	US20150212402	Pub Dt:	07/30/2015
Title:	MASK STRUCTURES AND METHODS OF MANUFACTURING

Patent #:	8969174	Issue Dt:	03/03/2015	Application #:	14168471	Filing Dt:	01/30/2014
Publication #:	US20140147988	Pub Dt:	05/29/2014
Title:	FIXED CURVATURE FORCE LOADING OF MECHANICALLY SPALLED FILMS

Patent #:	9087897	Issue Dt:	07/21/2015	Application #:	14169318	Filing Dt:	01/31/2014
Publication #:	US20150221767	Pub Dt:	08/06/2015
Title:	SEMICONDUCTOR STRUCTURES WITH PAIR(S) OF VERTICAL FIELD EFFECT TRANSISTORS, EACH PAIR HAVING A SHARED SOURCE/DRAIN REGION AND METHODS OF FORMING THE STRUCTURES

Patent #:	NONE	Issue Dt:		Application #:	14169632	Filing Dt:	01/31/2014
Publication #:	US20150081520	Pub Dt:	03/19/2015
Title:	ANALYTICS-DRIVEN PRODUCT RECOMMENDATION FOR FINANCIAL SERVICES

Patent #:	9274952	Issue Dt:	03/01/2016	Application #:	14170205	Filing Dt:	01/31/2014
Publication #:	US20150100732	Pub Dt:	04/09/2015
Title:	Moving Checkpoint-Based High-Availability Log and Data Directly From a Producer Cache to a Consumer Cache

Patent #:	8969115	Issue Dt:	03/03/2015	Application #:	14170708	Filing Dt:	02/03/2014
Publication #:	US20140179045	Pub Dt:	06/26/2014
Title:	TRANSPARENT CONDUCTIVE ELECTRODE STACK CONTAINING CARBON-CONTAINING MATERIAL

Patent #:	NONE	Issue Dt:		Application #:	14171107	Filing Dt:	02/03/2014
Publication #:	US20150076908	Pub Dt:	03/19/2015
Title:	EFFICIENT WAKEUP OF POWER GATED DOMAINS THROUGH CHARGE SHARING AND RECYCLING

Patent #:	NONE	Issue Dt:		Application #:	14171836	Filing Dt:	02/04/2014
Publication #:	US20150082065	Pub Dt:	03/19/2015
Title:	ACCELERATING MICROPROCESSOR CORE WAKE UP VIA CHARGE FROM CAPACITANCE TANK WITHOUT INTRODUCING NOISE ON POWER GRID OF RUNNING MICROPROCESSOR CORES

Patent #:	9508578	Issue Dt:	11/29/2016	Application #:	14171874	Filing Dt:	02/04/2014
Publication #:	US20150219479	Pub Dt:	08/06/2015
Title:	METHOD AND APPARATUS FOR DETECTING FOREIGN MATERIAL ON A CHUCK

Patent #:	9292079	Issue Dt:	03/22/2016	Application #:	14171899	Filing Dt:	02/04/2014
Publication #:	US20150082066	Pub Dt:	03/19/2015
Title:	ACCELERATING THE MICROPROCESSOR CORE WAKEUP BY PREDICTIVELY EXECUTING A SUBSET OF THE POWER-UP SEQUENCE

Patent #:	9093467	Issue Dt:	07/28/2015	Application #:	14172058	Filing Dt:	02/04/2014
Publication #:	US20150221749	Pub Dt:	08/06/2015
Title:	METHODS OF FORMING GATE STRUCTURES FOR SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND THE RESULTING DEVICES

Patent #:	9214436	Issue Dt:	12/15/2015	Application #:	14172323	Filing Dt:	02/04/2014
Publication #:	US20150221605	Pub Dt:	08/06/2015
Title:	ETCHING OF UNDER BUMP METTALLIZATION LAYER AND RESULTING DEVICE

Patent #:	NONE	Issue Dt:		Application #:	14172362	Filing Dt:	02/04/2014
Publication #:	US20150221726	Pub Dt:	08/06/2015
Title:	FINFET WITH ISOLATED SOURCE AND DRAIN

Patent #:	9208451	Issue Dt:	12/08/2015	Application #:	14172922	Filing Dt:	02/05/2014
Publication #:	US20140156572	Pub Dt:	06/05/2014
Title:	AUTOMATIC IDENTIFICATION OF INFORMATION USEFUL FOR GENERATION-BASED FUNCTIONAL VERIFICATION

Patent #:	9190313	Issue Dt:	11/17/2015	Application #:	14173296	Filing Dt:	02/05/2014
Publication #:	US20140154865	Pub Dt:	06/05/2014
Title:	SHALLOW TRENCH ISOLATION STRUCTURES

Patent #:	9012313	Issue Dt:	04/21/2015	Application #:	14173995	Filing Dt:	02/06/2014
Publication #:	US20140264342	Pub Dt:	09/18/2014
Title:	SEMICONDUCTOR DEVICE INCLUDING A RESISTOR AND METHOD FOR THE FORMATION THEREOF

Patent #:	NONE	Issue Dt:		Application #:	14174474	Filing Dt:	02/06/2014
Publication #:	US20140264626	Pub Dt:	09/18/2014
Title:	METHOD FOR FORMING GATE ELECTRODE STRUCTURES WITH HIGH-K GATE DIELECTRIC LAYERS THAT INCLUDE A WORK FUNCTION ADJUSTING SPECIES

Patent #:	8865571	Issue Dt:	10/21/2014	Application #:	14174868	Filing Dt:	02/07/2014
Publication #:	US20140154872	Pub Dt:	06/05/2014
Title:	DISLOCATION ENGINEERING USING A SCANNED LASER

Patent #:	8865572	Issue Dt:	10/21/2014	Application #:	14174869	Filing Dt:	02/07/2014
Publication #:	US20140154873	Pub Dt:	06/05/2014
Title:	DISLOCATION ENGINEERING USING A SCANNED LASER

Patent #:	9178012	Issue Dt:	11/03/2015	Application #:	14174887	Filing Dt:	02/07/2014
Publication #:	US20140151850	Pub Dt:	06/05/2014
Title:	PLATED TRENCH CAPACITOR STRUCTURES

Patent #:	NONE	Issue Dt:		Application #:	14174920	Filing Dt:	02/07/2014
Publication #:	US20150228761	Pub Dt:	08/13/2015
Title:	DIAMOND SHAPED EPITAXY

Patent #:	9373721	Issue Dt:	06/21/2016	Application #:	14175113	Filing Dt:	02/07/2014
Publication #:	US20150228792	Pub Dt:	08/13/2015
Title:	METHODS OF FORMING A NON-PLANAR ULTRA-THIN BODY SEMICONDUCTOR DEVICE AND THE RESULTING DEVICES

Patent #:	9404942	Issue Dt:	08/02/2016	Application #:	14175116	Filing Dt:	02/07/2014
Publication #:	US20140191775	Pub Dt:	07/10/2014
Title:	A COAXIAL PROBE STRUCTURE OF ELONGATED ELECTRICAL CONDUCTORS PROJECTING FROM A SUPPORT STRUCTURE

Patent #:	10153371	Issue Dt:	12/11/2018	Application #:	14175215	Filing Dt:	02/07/2014
Publication #:	US20150228781	Pub Dt:	08/13/2015
Title:	SEMICONDUCTOR DEVICE WITH FINS INCLUDING SIDEWALL RECESSES

Patent #:	NONE	Issue Dt:		Application #:	14175217	Filing Dt:	02/07/2014
Publication #:	US20150228776	Pub Dt:	08/13/2015
Title:	METHODS OF FORMING CONTACTS TO SEMICONDUCTOR DEVICES USING A BOTTOM ETCH STOP LAYER AND THE RESULTING DEVICES

Patent #:	9177803	Issue Dt:	11/03/2015	Application #:	14175288	Filing Dt:	02/07/2014
Publication #:	US20140264617	Pub Dt:	09/18/2014
Title:	HK/MG PROCESS FLOWS FOR P-TYPE SEMICONDUCTOR DEVICES

Patent #:	9362277	Issue Dt:	06/07/2016	Application #:	14175827	Filing Dt:	02/07/2014
Publication #:	US20150228648	Pub Dt:	08/13/2015
Title:	FINFET WITH MULTILAYER FINS FOR MULTI-VALUE LOGIC (MVL) APPLICATIONS AND METHOD OF FORMING

Patent #:	NONE	Issue Dt:		Application #:	14175849	Filing Dt:	02/07/2014
Publication #:	US20150228656	Pub Dt:	08/13/2015
Title:	REPLACEMENT GATE COMPATIBLE eDRAM TRANSISTOR WITH RECESSED CHANNEL

Patent #:	NONE	Issue Dt:		Application #:	14176178	Filing Dt:	02/10/2014
Publication #:	US20150228555	Pub Dt:	08/13/2015
Title:	STRUCTURE AND METHOD OF CANCELLING TSV-INDUCED SUBSTRATE STRESS

Patent #:	9318315	Issue Dt:	04/19/2016	Application #:	14176208	Filing Dt:	02/10/2014
Publication #:	US20150014813	Pub Dt:	01/15/2015
Title:	COMPLEX CIRCUIT ELEMENT AND CAPACITOR UTILIZING CMOS COMPATIBLE ANTIFERROELECTRIC HIGH-K MATERIALS

Patent #:	8842412	Issue Dt:	09/23/2014	Application #:	14176460	Filing Dt:	02/10/2014
Publication #:	US20140151851	Pub Dt:	06/05/2014
Title:	TAPERED VIA AND MIM CAPACITOR

Patent #:	RE45781	Issue Dt:	10/27/2015	Application #:	14176526	Filing Dt:	02/10/2014
Title:	TOUGHNESS, ADHESION AND SMOOTH METAL LINES OF POROUS LOW K DIELECTRIC INTERCONNECT STRUCTURES

Patent #:	NONE	Issue Dt:		Application #:	14176528	Filing Dt:	02/10/2014
Publication #:	US20150228635	Pub Dt:	08/13/2015
Title:	INTEGRATED CIRCUIT DEVICE HAVING SUPPORTS FOR USE IN A MULTI-DIMENSIONAL DIE STACK

Patent #:	NONE	Issue Dt:		Application #:	14176545	Filing Dt:	02/10/2014
Publication #:	US20150228511	Pub Dt:	08/13/2015
Title:	METHODS AND SYSTEMS FOR VIBRATORY CHEMICAL MECHANICAL PLANARIZATION

Patent #:	9059252	Issue Dt:	06/16/2015	Application #:	14176552	Filing Dt:	02/10/2014
Title:	SILICON WAVEGUIDE ON BULK SILICON SUBSTRATE AND METHODS OF FORMING

Patent #:	NONE	Issue Dt:		Application #:	14176660	Filing Dt:	02/10/2014
Publication #:	US20150228649	Pub Dt:	08/13/2015
Title:	TRANSISTOR WITH WELL TAP IMPLANT

Patent #:	9159683	Issue Dt:	10/13/2015	Application #:	14176697	Filing Dt:	02/10/2014
Publication #:	US20150228595	Pub Dt:	08/13/2015
Title:	METHODS FOR ETCHING COPPER DURING THE FABRICATION OF INTEGRATED CIRCUITS

Patent #:	NONE	Issue Dt:		Application #:	14176716	Filing Dt:	02/10/2014
Publication #:	US20150228585	Pub Dt:	08/13/2015
Title:	SELF-FORMING BARRIER INTEGRATED WITH SELF-ALIGNED CAP

Patent #:	NONE	Issue Dt:		Application #:	14176746	Filing Dt:	02/10/2014
Publication #:	US20150228708	Pub Dt:	08/13/2015
Title:	TUNABLE POLY RESISTORS FOR HYBRID REPLACEMENT GATE TECHNOLOGY AND METHODS OF MANUFACTURING

Patent #:	9142674	Issue Dt:	09/22/2015	Application #:	14176767	Filing Dt:	02/10/2014
Publication #:	US20140264633	Pub Dt:	09/18/2014
Title:	FINFET DEVICES HAVING A BODY CONTACT AND METHODS OF FORMING THE SAME

Patent #:	9335759	Issue Dt:	05/10/2016	Application #:	14177260	Filing Dt:	02/11/2014
Publication #:	US20150227137	Pub Dt:	08/13/2015
Title:	OPTIMIZATION OF A LASER ANNEAL BEAM PATH FOR MAXIMIZING CHIP YIELD

Patent #:	9093425	Issue Dt:	07/28/2015	Application #:	14177481	Filing Dt:	02/11/2014
Publication #:	US20150228745	Pub Dt:	08/13/2015
Title:	SELF-ALIGNED LINER FORMED ON METAL SEMICONDUCTOR ALLOY CONTACTS

Patent #:	NONE	Issue Dt:		Application #:	14179035	Filing Dt:	02/12/2014
Publication #:	US20140159161	Pub Dt:	06/12/2014
Title:	MEASUREMENT OF CMOS DEVICE CHANNEL STRAIN BY X-RAY DIFFRACTION

Patent #:	9231072	Issue Dt:	01/05/2016	Application #:	14179121	Filing Dt:	02/12/2014
Publication #:	US20150228748	Pub Dt:	08/13/2015
Title:	MULTI-COMPOSITION GATE DIELECTRIC FIELD EFFECT TRANSISTORS

Patent #:	8809828	Issue Dt:	08/19/2014	Application #:	14179707	Filing Dt:	02/13/2014
Publication #:	US20140166967	Pub Dt:	06/19/2014
Title:	SMALL FOOTPRINT PHASE CHANGE MEMORY CELL

Patent #:	9411332	Issue Dt:	08/09/2016	Application #:	14180560	Filing Dt:	02/14/2014
Publication #:	US20150234378	Pub Dt:	08/20/2015
Title:	AUTOMATED MECHANICAL HANDLING SYSTEMS FOR INTEGRATED CIRCUIT FABRICATION, SYSTEM COMPUTERS PROGRAMMED FOR USE THEREIN, AND METHODS OF HANDLING A WAFER CARRIER HAVING AN INLET PORT AND AN OUTLET PORT

Patent #:	9343420	Issue Dt:	05/17/2016	Application #:	14181616	Filing Dt:	02/14/2014
Publication #:	US20150235979	Pub Dt:	08/20/2015
Title:	UNIVERSAL SOLDER JOINTS FOR 3D PACKAGING

Patent #:	9236477	Issue Dt:	01/12/2016	Application #:	14181832	Filing Dt:	02/17/2014
Publication #:	US20150236147	Pub Dt:	08/20/2015
Title:	GRAPHENE TRANSISTOR WITH A SUBLITHOGRAPHIC CHANNEL WIDTH

Patent #:	9472570	Issue Dt:	10/18/2016	Application #:	14182459	Filing Dt:	02/18/2014
Publication #:	US20150236040	Pub Dt:	08/20/2015
Title:	DIODE BIASED BODY CONTACTED TRANSISTOR

Patent #:	NONE	Issue Dt:		Application #:	14182685	Filing Dt:	02/18/2014
Publication #:	US20140316720	Pub Dt:	10/23/2014
Title:	DATA PROCESSING SYSTEM WITH REAL-TIME DATA CENTER AIR FLOW SIMULATOR

Patent #:	9201027	Issue Dt:	12/01/2015	Application #:	14184058	Filing Dt:	02/19/2014
Publication #:	US20150233844	Pub Dt:	08/20/2015
Title:	EVALUATING SEMICONDUCTOR WAFERS FOR PITCH WALKING AND/OR EPITAXIAL MERGE

Patent #:	9269809	Issue Dt:	02/23/2016	Application #:	14184826	Filing Dt:	02/20/2014
Publication #:	US20140264641	Pub Dt:	09/18/2014
Title:	METHODS FOR FORMING PROTECTION LAYERS ON SIDEWALLS OF CONTACT ETCH STOP LAYERS

Patent #:	9236437	Issue Dt:	01/12/2016	Application #:	14184830	Filing Dt:	02/20/2014
Publication #:	US20150236106	Pub Dt:	08/20/2015
Title:	METHOD FOR CREATING SELF-ALIGNED TRANSISTOR CONTACTS

Patent #:	9257329	Issue Dt:	02/09/2016	Application #:	14185398	Filing Dt:	02/20/2014
Publication #:	US20150235896	Pub Dt:	08/20/2015
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING DENSIFYING INTERLEVEL DIELECTRIC LAYERS

Patent #:	9310674	Issue Dt:	04/12/2016	Application #:	14185440	Filing Dt:	02/20/2014
Publication #:	US20150234269	Pub Dt:	08/20/2015
Title:	MASK THAT PROVIDES IMPROVED FOCUS CONTROL USING ORTHOGONAL EDGES

Patent #:	9305800	Issue Dt:	04/05/2016	Application #:	14185491	Filing Dt:	02/20/2014
Publication #:	US20150235839	Pub Dt:	08/20/2015
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY INCLUDING LITHOGRAPHICALLY-PRINTABLE ASSIST FEATURES

Patent #:	9395622	Issue Dt:	07/19/2016	Application #:	14185506	Filing Dt:	02/20/2014
Publication #:	US20150234970	Pub Dt:	08/20/2015
Title:	SYNTHESIZING LOW MASK ERROR ENHANCEMENT FACTOR LITHOGRAPHY SOLUTIONS

Patent #:	9171765	Issue Dt:	10/27/2015	Application #:	14186012	Filing Dt:	02/21/2014
Publication #:	US20150243568	Pub Dt:	08/27/2015
Title:	INLINE RESIDUAL LAYER DETECTION AND CHARACTERIZATION POST VIA POST ETCH USING CD-SEM

Patent #:	9659840	Issue Dt:	05/23/2017	Application #:	14186360	Filing Dt:	02/21/2014
Publication #:	US20150243582	Pub Dt:	08/27/2015
Title:	NEW PROCESS FLOW FOR A COMBINED CA AND TSV OXIDE DEPOSITION

Patent #:	9287131	Issue Dt:	03/15/2016	Application #:	14186396	Filing Dt:	02/21/2014
Publication #:	US20150243515	Pub Dt:	08/27/2015
Title:	METHODS OF PATTERNING LINE-TYPE FEATURES USING A MULTIPLE PATTERNING PROCESS THAT ENABLES THE USE OF TIGHTER CONTACT ENCLOSURE SPACING RULES

Patent #:	9105650	Issue Dt:	08/11/2015	Application #:	14186512	Filing Dt:	02/21/2014
Publication #:	US20140170829	Pub Dt:	06/19/2014
Title:	LATERAL BIPOLAR TRANSISTOR AND CMOS HYBRID TECHNOLOGY

Patent #:	9105614	Issue Dt:	08/11/2015	Application #:	14187392	Filing Dt:	02/24/2014
Publication #:	US20140167176	Pub Dt:	06/19/2014
Title:	LOCAL INTERCONNECTS COMPATIBLE WITH REPLACEMENT GATE STRUCTURES

Patent #:	NONE	Issue Dt:		Application #:	14188022	Filing Dt:	02/24/2014
Publication #:	US20140167110	Pub Dt:	06/19/2014
Title:	PARTIAL POLY AMORPHIZATION FOR CHANNELING PREVENTION

Patent #:	NONE	Issue Dt:		Application #:	14188028	Filing Dt:	02/24/2014
Publication #:	US20140167109	Pub Dt:	06/19/2014
Title:	CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS

Patent #:	9576952	Issue Dt:	02/21/2017	Application #:	14188778	Filing Dt:	02/25/2014
Publication #:	US20150243658	Pub Dt:	08/27/2015
Title:	INTEGRATED CIRCUITS WITH VARYING GATE STRUCTURES AND FABRICATION METHODS

Patent #:	9362180	Issue Dt:	06/07/2016	Application #:	14189085	Filing Dt:	02/25/2014
Publication #:	US20150243563	Pub Dt:	08/27/2015
Title:	INTEGRATED CIRCUIT HAVING MULTIPLE THRESHOLD VOLTAGES

Patent #:	8803284	Issue Dt:	08/12/2014	Application #:	14189108	Filing Dt:	02/25/2014
Publication #:	US20140167219	Pub Dt:	06/19/2014
Title:	Thick On-Chip High-Performance Wiring Structures

Patent #:	9208275	Issue Dt:	12/08/2015	Application #:	14189465	Filing Dt:	02/25/2014
Publication #:	US20150242555	Pub Dt:	08/27/2015
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING PHOTOMASKS FOR DIRECTED SELF-ASSEMBLY

Patent #:	10546856	Issue Dt:	01/28/2020	Application #:	14189509	Filing Dt:	02/25/2014
Publication #:	US20150243660	Pub Dt:	08/27/2015
Title:	CMOS STRUCTURE HAVING LOW RESISTANCE CONTACTS AND FABRICATION METHOD

Patent #:	9059190	Issue Dt:	06/16/2015	Application #:	14189682	Filing Dt:	02/25/2014
Publication #:	US20140191235	Pub Dt:	07/10/2014
Title:	MEASURING CURRENT AND RESISTANCE USING COMBINED DIODES/RESISTOR STRUCTURE TO MONITOR INTEGRATED CIRCUIT MANUFACTURING PROCESS VARIATIONS

Patent #:	9190465	Issue Dt:	11/17/2015	Application #:	14190611	Filing Dt:	02/26/2014
Publication #:	US20140175549	Pub Dt:	06/26/2014
Title:	FINFET DEVICE

Patent #:	8809967	Issue Dt:	08/19/2014	Application #:	14191626	Filing Dt:	02/27/2014
Publication #:	US20140175550	Pub Dt:	06/26/2014
Title:	DEVICE STRUCTURES COMPATIBLE WITH FIN-TYPE FIELD-EFFECT TRANSISTOR TECHNOLOGIES

Patent #:	9221241	Issue Dt:	12/29/2015	Application #:	14191759	Filing Dt:	02/27/2014
Publication #:	US20140174670	Pub Dt:	06/26/2014
Title:	APPARATUS AND METHOD FOR REMOVING A CMP PAD FROM A PLATEN

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Title:	OVERHEAD SUBSTRATE HANDLING AND STORAGE SYSTEM

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100

Patent #:	NONE	Issue Dt:		Application #:	14197366	Filing Dt:	03/05/2014
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Title:	SHOPPING OPTIMIZER

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

440 STONE BREAK ROAD EXTENSION

MALTA, NEW YORK 12020

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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