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Patent #:
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Issue Dt:
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03/03/2020
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Application #:
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15856525
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Filing Dt:
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12/28/2017
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Publication #:
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Pub Dt:
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05/03/2018
| | | | |
Title:
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CONTACT MODULE FOR OPTIMIZING EMITTER AND CONTACT RESISTANCE
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Patent #:
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Issue Dt:
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02/05/2019
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Application #:
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15857202
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Filing Dt:
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12/28/2017
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Publication #:
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Pub Dt:
|
05/03/2018
| | | | |
Title:
|
SPECIAL CONSTRUCT FOR CONTINUOUS NON-UNIFORM ACTIVE REGION FINFET STANDARD CELLS
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Patent #:
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Issue Dt:
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12/04/2018
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Application #:
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15858594
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Filing Dt:
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12/29/2017
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Publication #:
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Pub Dt:
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09/20/2018
| | | | |
Title:
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METHOD AND DEVICE FOR MEASURING PLATING RING ASSEMBLY DIMENSIONS
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Patent #:
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Issue Dt:
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05/28/2019
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Application #:
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15858673
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Filing Dt:
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12/29/2017
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Publication #:
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Pub Dt:
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05/03/2018
| | | | |
Title:
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PRODUCING WAFER LEVEL PACKAGING USING LEADFRAME STRIP AND RELATED DEVICE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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15860121
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Filing Dt:
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01/02/2018
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Publication #:
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Pub Dt:
|
07/04/2019
| | | | |
Title:
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BACK-END-OF-LINE STRUCTURES WITH AIR GAPS
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Patent #:
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Issue Dt:
|
05/05/2020
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Application #:
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15860161
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Filing Dt:
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01/02/2018
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Publication #:
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Pub Dt:
|
07/04/2019
| | | | |
Title:
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REPAIRED MASK STRUCTURES AND RESULTANT UNDERLYING PATTERNED STRUCTURES
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Patent #:
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Issue Dt:
|
03/10/2020
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Application #:
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15860171
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Filing Dt:
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01/02/2018
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Publication #:
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Pub Dt:
|
07/04/2019
| | | | |
Title:
|
INTERRUPTED SMALL BLOCK SHAPE
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|
Patent #:
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Issue Dt:
|
07/09/2019
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Application #:
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15860193
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Filing Dt:
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01/02/2018
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Publication #:
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|
Pub Dt:
|
07/04/2019
| | | | |
Title:
|
METHODS OF PATTERNING DIELECTRIC LAYERS FOR METALLIZATION AND RELATED STRUCTURES
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Patent #:
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Issue Dt:
|
07/02/2019
|
Application #:
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15860318
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Filing Dt:
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01/02/2018
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Publication #:
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Pub Dt:
|
07/04/2019
| | | | |
Title:
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COBALT PLATED VIA INTEGRATION SCHEME
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Patent #:
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Issue Dt:
|
11/19/2019
|
Application #:
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15860775
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Filing Dt:
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01/03/2018
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Publication #:
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|
Pub Dt:
|
07/04/2019
| | | | |
Title:
|
OVERLAY STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
09/10/2019
|
Application #:
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15860840
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Filing Dt:
|
01/03/2018
|
Publication #:
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|
Pub Dt:
|
07/04/2019
| | | | |
Title:
|
MULTIPLE GATE LENGTH DEVICE WITH SELF-ALIGNED TOP JUNCTION
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Patent #:
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Issue Dt:
|
03/19/2019
|
Application #:
|
15861097
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Filing Dt:
|
01/03/2018
|
Title:
|
CROSS-COUPLED CONTACT STRUCTURE ON IC PRODUCTS AND METHODS OF MAKING SUCH CONTACT STRUCTURES
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Patent #:
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Issue Dt:
|
08/13/2019
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Application #:
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15861161
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Filing Dt:
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01/03/2018
|
Publication #:
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|
Pub Dt:
|
07/04/2019
| | | | |
Title:
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CONTACT STRUCTURES AND METHODS OF MAKING THE CONTACT STRUCTURES
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Patent #:
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Issue Dt:
|
07/30/2019
|
Application #:
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15861799
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Filing Dt:
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01/04/2018
|
Publication #:
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Pub Dt:
|
07/04/2019
| | | | |
Title:
|
METHODS OF PATTERNING VARIABLE WIDTH METALLIZATION LINES
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Patent #:
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|
Issue Dt:
|
09/10/2019
|
Application #:
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15862064
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Filing Dt:
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01/04/2018
|
Publication #:
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|
Pub Dt:
|
06/28/2018
| | | | |
Title:
|
TALL SINGLE-FIN FIN-TYPE FIELD EFFECT TRANSISTOR STRUCTURES AND METHODS
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|
Patent #:
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|
Issue Dt:
|
03/05/2019
|
Application #:
|
15863113
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Filing Dt:
|
01/05/2018
|
Title:
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SOLUBLE SELF ALIGNED BARRIER LAYER FOR INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
08/13/2019
|
Application #:
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15865973
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Filing Dt:
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01/09/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
TRANSISTORS WITH H-SHAPED OR U-SHAPED CHANNELS AND METHOD FOR FORMING THE SAME
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|
Patent #:
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|
Issue Dt:
|
09/17/2019
|
Application #:
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15866855
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Filing Dt:
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01/10/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
CIRCUITS BASED ON COMPLEMENTARY FIELD-EFFECT TRANSISTORS
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|
Patent #:
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Issue Dt:
|
10/01/2019
|
Application #:
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15867036
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Filing Dt:
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01/10/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
METHOD OF FORMING INTEGRATED CIRCUIT WITH GATE-ALL-AROUND FIELD EFFECT TRANSISTOR AND THE RESULTING STRUCTURE
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Patent #:
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Issue Dt:
|
06/30/2020
|
Application #:
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15867118
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Filing Dt:
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01/10/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
IC WAFER FOR IDENTIFICATION OF CIRCUIT DIES AFTER DICING
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|
Patent #:
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|
Issue Dt:
|
05/04/2021
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Application #:
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15867854
|
Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
UNIFORMITY CONTROL OF METAL-BASED PHOTORESISTS
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|
Patent #:
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|
Issue Dt:
|
06/04/2019
|
Application #:
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15867894
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Filing Dt:
|
01/11/2018
|
Title:
|
INTERCONNECT STRUCTURE WITH METHOD OF FORMING THE SAME
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|
Patent #:
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|
Issue Dt:
|
11/12/2019
|
Application #:
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15868004
|
Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
METHODS OF FORMING MERGED SOURCE/DRAIN REGIONS ON INTEGRATED CIRCUIT PRODUCTS
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|
Patent #:
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|
Issue Dt:
|
08/20/2019
|
Application #:
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15868058
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Filing Dt:
|
01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
METHODS OF FORMING A GATE-TO-SOURCE/DRAIN CONTACT STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
09/15/2020
|
Application #:
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15868199
|
Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
INTEGRATION OF VERTICAL-TRANSPORT TRANSISTORS AND PLANAR TRANSISTORS
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|
Patent #:
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Issue Dt:
|
11/10/2020
|
Application #:
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15868229
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Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
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FIN REVEAL FORMING STI REGIONS HAVING CONVEX SHAPE BETWEEN FINS
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|
Patent #:
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|
Issue Dt:
|
02/04/2020
|
Application #:
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15868364
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Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
03/14/2019
| | | | |
Title:
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METHOD FOR CALCULATING NON-CORRECTABLE EUV BLANK FLATNESS FOR BLANK DISPOSITIONING
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|
Patent #:
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|
Issue Dt:
|
12/31/2019
|
Application #:
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15868479
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Filing Dt:
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01/11/2018
|
Publication #:
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|
Pub Dt:
|
07/11/2019
| | | | |
Title:
|
MIDDLE OF THE LINE SELF-ALIGNED DIRECT PATTERN CONTACTS
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|
Patent #:
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|
Issue Dt:
|
07/07/2020
|
Application #:
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15869150
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Filing Dt:
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01/12/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
|
SELF-REFERENCING AND SELF-CALIBRATING INTERFERENCE PATTERN OVERLAY MEASUREMENT
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
15869325
|
Filing Dt:
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01/12/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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SINGLE WORK FUNCTION ENABLEMENT FOR SILICON NANOWIRE DEVICE
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|
Patent #:
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Issue Dt:
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02/19/2019
|
Application #:
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15869349
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Filing Dt:
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01/12/2018
|
Publication #:
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|
Pub Dt:
|
02/14/2019
| | | | |
Title:
|
VERTICAL-TRANSPORT FIELD-EFFECT TRANSISTORS WITH AN ETCHED-THROUGH SOURCE/DRAIN CAVITY
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Patent #:
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|
Issue Dt:
|
03/24/2020
|
Application #:
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15869541
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Filing Dt:
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01/12/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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ISOLATION PILLAR FIRST GATE STRUCTURES AND METHODS OF FORMING SAME
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|
Patent #:
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|
Issue Dt:
|
12/17/2019
|
Application #:
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15870108
|
Filing Dt:
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01/12/2018
|
Publication #:
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|
Pub Dt:
|
05/17/2018
| | | | |
Title:
|
THREE-DIMENSIONAL SCATTEROMETRY FOR MEASURING DIELECTRIC THICKNESS
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|
Patent #:
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|
Issue Dt:
|
05/14/2019
|
Application #:
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15870238
|
Filing Dt:
|
01/12/2018
|
Title:
|
HIGH VOLTAGE ELECTROSTATIC DISCHARGE (ESD) BIPOLAR INTEGRATED IN A VERTICAL FIELD-EFFECT TRANSISTOR (VFET) TECHNOLOGY AND METHOD FOR PRODUCING THE SAME
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|
Patent #:
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|
Issue Dt:
|
07/02/2019
|
Application #:
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15872314
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Filing Dt:
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01/16/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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MERGE MANDREL FEATURES
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|
Patent #:
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Issue Dt:
|
07/07/2020
|
Application #:
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15872335
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Filing Dt:
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01/16/2018
|
Publication #:
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Pub Dt:
|
05/17/2018
| | | | |
Title:
|
WAFER CARRIER PURGE APPARATUSES, AUTOMATED MECHANICAL HANDLING SYSTEMS INCLUDING THE SAME, AND METHODS OF HANDLING A WAFER CARRIER DURING INTEGRATED CIRCUIT FABRICATION
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|
Patent #:
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|
Issue Dt:
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10/15/2019
|
Application #:
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15872589
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Filing Dt:
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01/16/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
|
METAL-INSULATOR-METAL CAPACITORS WITH ENLARGED CONTACT AREAS
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|
Patent #:
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|
Issue Dt:
|
11/06/2018
|
Application #:
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15873006
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Filing Dt:
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01/17/2018
|
Publication #:
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|
Pub Dt:
|
11/08/2018
| | | | |
Title:
|
FIN-TYPE FIELD EFFECT TRANSISTORS WITH SINGLE-DIFFUSION BREAKS AND METHOD
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
15873111
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Filing Dt:
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01/17/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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INSPECTION UNITS WITH ULTRAVIOLET RADIATION SOURCES OPERATING AT DIFFERENT WAVELENGTHS
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|
Patent #:
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|
Issue Dt:
|
02/26/2019
|
Application #:
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15873156
|
Filing Dt:
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01/17/2018
|
Title:
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VERTICAL FIELD EFFECT TRANSISTOR FORMATION WITH CRITICAL DIMENSION CONTROL
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Patent #:
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|
Issue Dt:
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02/04/2020
|
Application #:
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15873225
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Filing Dt:
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01/17/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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AUTOMATED REDESIGN OF INTEGRATED CIRCUITS USING RELAXED SPACING RULES
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Patent #:
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Issue Dt:
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03/03/2020
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Application #:
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15873565
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Filing Dt:
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01/17/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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MIDDLE OF LINE STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
12/18/2018
|
Application #:
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15873935
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Filing Dt:
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01/18/2018
|
Publication #:
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|
Pub Dt:
|
08/09/2018
| | | | |
Title:
|
VERTICAL PILLAR-TYPE FIELD EFFECT TRANSISTOR AND METHOD
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Patent #:
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|
Issue Dt:
|
08/11/2020
|
Application #:
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15873946
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Filing Dt:
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01/18/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
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STRUCTURE AND METHOD TO REDUCE SHORTS AND CONTACT RESISTANCE IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
02/18/2020
|
Application #:
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15874039
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Filing Dt:
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01/18/2018
|
Publication #:
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|
Pub Dt:
|
07/18/2019
| | | | |
Title:
|
SYSTEM AND METHOD FOR ANALYZING PRINTED MASKS FOR LITHOGRAPHY BASED ON REPRESENTATIVE CONTOURS
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Patent #:
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|
Issue Dt:
|
09/10/2019
|
Application #:
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15874210
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Filing Dt:
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01/18/2018
|
Publication #:
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|
Pub Dt:
|
06/14/2018
| | | | |
Title:
|
PHOTONICS CHIP
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|
Patent #:
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|
Issue Dt:
|
04/23/2019
|
Application #:
|
15874341
|
Filing Dt:
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01/18/2018
|
Title:
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ASYMMETRIC FORMATION OF EPI SEMICONDUCTOR MATERIAL IN SOURCE/DRAIN REGIONS OF FINFET DEVICES
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|
Patent #:
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|
Issue Dt:
|
10/01/2019
|
Application #:
|
15875055
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Filing Dt:
|
01/19/2018
|
Publication #:
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|
Pub Dt:
|
05/31/2018
| | | | |
Title:
|
MULTIPLE-LAYER SPACERS FOR FIELD-EFFECT TRANSISTORS
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|
Patent #:
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|
Issue Dt:
|
11/05/2019
|
Application #:
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15875132
|
Filing Dt:
|
01/19/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
|
SELF-ALIGNED SINGLE DIFFUSION BREAK ISOLATION WITH REDUCTION OF STRAIN LOSS
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|
Patent #:
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|
Issue Dt:
|
02/05/2019
|
Application #:
|
15875212
|
Filing Dt:
|
01/19/2018
|
Publication #:
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|
Pub Dt:
|
05/31/2018
| | | | |
Title:
|
SELF ALIGNED INTERCONNECT STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
06/18/2019
|
Application #:
|
15875609
|
Filing Dt:
|
01/19/2018
|
Publication #:
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|
Pub Dt:
|
05/24/2018
| | | | |
Title:
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METHOD, APPARATUS, AND SYSTEM HAVING SUPER STEEP RETROGRADE WELL WITH ENGINEERED DOPANT PROFILES
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|
Patent #:
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|
Issue Dt:
|
03/26/2019
|
Application #:
|
15876316
|
Filing Dt:
|
01/22/2018
|
Title:
|
GATE CONTACT STRUCTURE POSITIONED ABOVE AN ACTIVE REGION OF A TRANSISTOR DEVICE
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|
Patent #:
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Issue Dt:
|
02/11/2020
|
Application #:
|
15876407
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
|
CAPPING STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
03/26/2019
|
Application #:
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15876472
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
05/24/2018
| | | | |
Title:
|
SELF-CONTAINED METROLOGY WAFER CARRIER SYSTEMS
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|
Patent #:
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|
Issue Dt:
|
07/21/2020
|
Application #:
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15876530
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
|
FIELD-EFFECT TRANSISTORS WITH AIRGAPS
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|
Patent #:
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|
Issue Dt:
|
09/08/2020
|
Application #:
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15876540
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
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EXTREME ULTRAVIOLET (EUV) MASK ABSORBER AND METHOD FOR FORMING THE SAME
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|
Patent #:
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|
Issue Dt:
|
04/16/2019
|
Application #:
|
15876606
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
06/07/2018
| | | | |
Title:
|
SELF-ALIGNED FINFET FORMATION
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|
Patent #:
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|
Issue Dt:
|
10/15/2019
|
Application #:
|
15876727
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
|
SEALED CAVITY STRUCTURES WITH A PLANAR SURFACE
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|
Patent #:
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|
Issue Dt:
|
02/18/2020
|
Application #:
|
15876734
|
Filing Dt:
|
01/22/2018
|
Publication #:
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|
Pub Dt:
|
07/25/2019
| | | | |
Title:
|
BOND PADS WITH SURROUNDING FILL LINES
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|
Patent #:
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|
Issue Dt:
|
10/15/2019
|
Application #:
|
15877549
|
Filing Dt:
|
01/23/2018
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Publication #:
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Pub Dt:
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06/07/2018
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Title:
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INTEGRATED CIURCUIT PRODUCT HAVING A THROUGH-SUBSTRATE-VIA (TSV) AND A METALLIZATION LAYER THAT ARE FORMED AFTER FORMATION OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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08/18/2020
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Application #:
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15878025
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Filing Dt:
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01/23/2018
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Publication #:
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Pub Dt:
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07/25/2019
| | | | |
Title:
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SILICON NITRIDE GRATING COUPLERS
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Patent #:
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Issue Dt:
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12/17/2019
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Application #:
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15878081
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Filing Dt:
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01/23/2018
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Publication #:
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Pub Dt:
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07/25/2019
| | | | |
Title:
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CONTACT STRUCTURES
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Patent #:
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Issue Dt:
|
07/23/2019
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Application #:
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15878478
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Filing Dt:
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01/24/2018
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Publication #:
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Pub Dt:
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07/25/2019
| | | | |
Title:
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VERTICAL FIN-TYPE DEVICES AND METHODS
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Patent #:
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Issue Dt:
|
09/11/2018
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Application #:
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15878486
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Filing Dt:
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01/24/2018
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Publication #:
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Pub Dt:
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06/14/2018
| | | | |
Title:
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SELF-ALIGNED MIDDLE OF THE LINE (MOL) CONTACTS
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Patent #:
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Issue Dt:
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02/19/2019
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Application #:
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15878502
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Filing Dt:
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01/24/2018
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Title:
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MICROWAVE ANNEALING OF FLOWABLE OXIDES WITH TRAP LAYERS
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Patent #:
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Issue Dt:
|
06/25/2019
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Application #:
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15878519
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Filing Dt:
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01/24/2018
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Title:
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SELECTIVE TITANIUM NITRIDE DEPOSITION USING OXIDES OF LANTHANUM MASKS
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Patent #:
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Issue Dt:
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06/25/2019
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Application #:
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15880059
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Filing Dt:
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01/25/2018
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Publication #:
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Pub Dt:
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05/31/2018
| | | | |
Title:
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GATE TIE-DOWN ENABLEMENT WITH INNER SPACER
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Patent #:
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Issue Dt:
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12/04/2018
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Application #:
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15881356
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Filing Dt:
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01/26/2018
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Publication #:
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Pub Dt:
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05/31/2018
| | | | |
Title:
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NOVEL OTPROM FOR POST-PROCESS PROGRAMMING USING SELECTIVE BREAKDOWN
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Patent #:
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Issue Dt:
|
06/25/2019
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Application #:
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15882031
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Filing Dt:
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01/29/2018
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Title:
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UNIFORMITY TUNING OF VARIABLE-HEIGHT FEATURES FORMED IN TRENCHES
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Patent #:
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Issue Dt:
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08/20/2019
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Application #:
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15882036
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Filing Dt:
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01/29/2018
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Publication #:
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Pub Dt:
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08/01/2019
| | | | |
Title:
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3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD
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Patent #:
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Issue Dt:
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07/28/2020
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Application #:
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15882053
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Filing Dt:
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01/29/2018
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Publication #:
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Pub Dt:
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08/01/2019
| | | | |
Title:
|
SILICON CONTROLLED RECTIFIERS INTEGRATED INTO A HETEROJUNCTION BIPOLAR TRANSISTOR PROCESS
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Patent #:
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Issue Dt:
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10/29/2019
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Application #:
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15882291
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Filing Dt:
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01/29/2018
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Publication #:
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Pub Dt:
|
08/01/2019
| | | | |
Title:
|
CAP STRUCTURE
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Patent #:
|
NONE
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Issue Dt:
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Application #:
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15882465
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Filing Dt:
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01/29/2018
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Publication #:
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Pub Dt:
|
08/01/2019
| | | | |
Title:
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AIR GAP FORMATION IN BACK-END-OF-LINE STRUCTURES
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Patent #:
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Issue Dt:
|
03/05/2019
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Application #:
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15883693
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Filing Dt:
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01/30/2018
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Title:
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INTERCONNECT STRUCTURE WITH ADHESIVE DIELECTRIC LAYER AND METHODS OF FORMING SAME
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Patent #:
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Issue Dt:
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01/07/2020
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Application #:
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15883975
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Filing Dt:
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01/30/2018
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Publication #:
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Pub Dt:
|
06/07/2018
| | | | |
Title:
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SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATILE MEMORY CELLS AND AN EDGE CELL
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Patent #:
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Issue Dt:
|
07/20/2021
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Application #:
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15884045
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Filing Dt:
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01/30/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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SOI FINFET FINS WITH RECESSED FINS AND EPITAXY IN SOURCE DRAIN REGION
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Patent #:
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Issue Dt:
|
11/05/2019
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Application #:
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15886475
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Filing Dt:
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02/01/2018
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Publication #:
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Pub Dt:
|
08/01/2019
| | | | |
Title:
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GALLIUM NITRIDE (GAN) POWER AMPLIFIERS (PA) WITH ANGLED ELECTRODES AND 100 CMOS AND METHOD FOR PRODUCING THE SAME
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Patent #:
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Issue Dt:
|
09/03/2019
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Application #:
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15886927
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Filing Dt:
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02/02/2018
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Publication #:
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Pub Dt:
|
06/07/2018
| | | | |
Title:
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ELECTRICAL AND OPTICAL VIA CONNECTIONS ON A SAME CHIP
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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15887357
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Filing Dt:
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02/02/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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METHODS OF BANDGAP ANALYSIS AND MODELING FOR HIGH K METAL GATE
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Patent #:
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Issue Dt:
|
08/20/2019
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Application #:
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15887417
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Filing Dt:
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02/02/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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BACK GATE TUNING CIRCUITS
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Patent #:
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Issue Dt:
|
11/12/2019
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Application #:
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15888195
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Filing Dt:
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02/05/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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LATERALLY DIFFUSED FIELD EFFECT TRANSISTOR AND A METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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12/17/2019
|
Application #:
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15888366
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Filing Dt:
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02/05/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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SUBSTRATE STRUCTURE WITH SPATIAL ARRANGEMENT CONFIGURED FOR COUPLING OF SURFACE PLASMONS TO INCIDENT LIGHT
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Patent #:
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Issue Dt:
|
01/29/2019
|
Application #:
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15888401
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Filing Dt:
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02/05/2018
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Title:
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COMPLEMENTARY FETs WITH WRAP AROUND CONTACTS AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
|
12/11/2018
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Application #:
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15888408
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Filing Dt:
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02/05/2018
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Title:
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INSULATING GATE SEPARATION STRUCTURE AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
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07/02/2019
|
Application #:
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15889321
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Filing Dt:
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02/06/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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GATE STRUCTURE WITH DUAL WIDTH ELECTRODE LAYER
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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15889367
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Filing Dt:
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02/06/2018
|
Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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DEVICE WITH DIFFUSION BLOCKING LAYER IN SOURCE/DRAIN REGION
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Patent #:
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Issue Dt:
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12/24/2019
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Application #:
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15889369
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Filing Dt:
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02/06/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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MAGNETO-RESISTIVE MEMORY STRUCTURES WITH IMPROVED SENSING, AND ASSOCIATED SENSING METHODS
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Patent #:
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Issue Dt:
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09/03/2019
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Application #:
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15889635
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Filing Dt:
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02/06/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHODS
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Patent #:
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Issue Dt:
|
02/26/2019
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Application #:
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15889654
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Filing Dt:
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02/06/2018
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Publication #:
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Pub Dt:
|
08/23/2018
| | | | |
Title:
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VERTICAL TRANSISTOR DEVICES WITH DIFFERENT EFFECTIVE GATE LENGTHS
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Patent #:
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Issue Dt:
|
02/12/2019
|
Application #:
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15890210
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Filing Dt:
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02/06/2018
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Title:
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METHODS, APPARATUS, AND SYSTEM FOR REDUCING STEP HEIGHT DIFFERENCE IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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04/23/2019
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Application #:
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15890246
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Filing Dt:
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02/06/2018
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Title:
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METHODS. APPARATUS AND SYSTEM FOR REPLACEMENT CONTACT FOR A FINFET DEVICE
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Patent #:
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Issue Dt:
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07/07/2020
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Application #:
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15890270
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Filing Dt:
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02/06/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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PROBE CARD CONTINUITY TESTING AND CLEANING FIXTURE COMPRISING HIGHLY PURIFIED TUNGSTEN
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Patent #:
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Issue Dt:
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08/21/2018
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Application #:
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15890452
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Filing Dt:
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02/07/2018
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Publication #:
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Pub Dt:
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08/23/2018
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING BURIED CAPACITIVE STRUCTURES AND A METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
|
08/27/2019
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Application #:
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15890859
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Filing Dt:
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02/07/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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METHOD FOR FIN FORMATION WITH A SELF-ALIGNED DIRECTED SELF-ASSEMBLY PROCESS AND CUT-LAST SCHEME
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Patent #:
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Issue Dt:
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04/09/2019
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Application #:
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15890880
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Filing Dt:
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02/07/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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HIGH DOPED III-V SOURCE/DRAIN JUNCTIONS FOR FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
|
08/13/2019
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Application #:
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15891619
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Filing Dt:
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02/08/2018
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Publication #:
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Pub Dt:
|
08/08/2019
| | | | |
Title:
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WRITE ASSIST
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Patent #:
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Issue Dt:
|
11/26/2019
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Application #:
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15893193
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Filing Dt:
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02/09/2018
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Publication #:
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Pub Dt:
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06/14/2018
| | | | |
Title:
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METHOD TO FORM INTERCONNECT STRUCTURE WITH TUNGSTEN FILL
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Patent #:
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Issue Dt:
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04/09/2019
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Application #:
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15893860
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Filing Dt:
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02/12/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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VERTICAL TRANSISTORS AND METHODS OF FORMING SAME
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Patent #:
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Issue Dt:
|
12/03/2019
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Application #:
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15894785
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Filing Dt:
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02/12/2018
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Publication #:
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Pub Dt:
|
06/21/2018
| | | | |
Title:
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METHOD, APPARATUS, AND SYSTEM HAVING SUPER STEEP RETROGRADE WELL WITH SILICON AND SILICON GERMANIUM FINS
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Patent #:
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Issue Dt:
|
01/08/2019
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Application #:
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15895053
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Filing Dt:
|
02/13/2018
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Title:
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SOI-BASED FLOATING GATE MEMORY CELL
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|