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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 21 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
6127880
Issue Dt:
10/03/2000
Application #:
09391147
Filing Dt:
09/07/1999
Title:
ACTIVE POWER SUPPLY FILTER
2
Patent #:
6168999
Issue Dt:
01/02/2001
Application #:
09391301
Filing Dt:
09/07/1999
Title:
METHOD FOR FABRICATING HIGH-PERFORMANCE SUBMICRON MOSFET WITH LATERAL ASYMMETRIC CHANNEL AND A LIGHTLY DOPED DRAIN
3
Patent #:
6255219
Issue Dt:
07/03/2001
Application #:
09391303
Filing Dt:
09/07/1999
Title:
METHOD FOR FABRICATING HIGH-PERFORMANCE SUBMICRON MOSFET WITH LATERAL ASYMMETRIC CHANNEL
4
Patent #:
6117597
Issue Dt:
09/12/2000
Application #:
09392230
Filing Dt:
09/08/1999
Title:
EXTREME ULTRAVIOLET LITHOGRAPHY MASK BLANK AND MANUFACTURING METHOD THEREFOR
5
Patent #:
6269436
Issue Dt:
07/31/2001
Application #:
09392300
Filing Dt:
09/08/1999
Title:
SUPERSCALAR MICROPROCESSOR CONFIGURED TO PREDICT RETURN ADDRESSES FROM A RETURN STACK STORAGE
6
Patent #:
6556881
Issue Dt:
04/29/2003
Application #:
09393176
Filing Dt:
09/09/1999
Title:
METHOD AND APPARATUS FOR INTEGRATING NEAR REAL-TIME FAULT DETECTION IN AN APC FRAMEWORK
7
Patent #:
7350108
Issue Dt:
03/25/2008
Application #:
09394302
Filing Dt:
09/10/1999
Title:
TEST SYTEM FOR INTEGRATED CIRCUITS
8
Patent #:
6730416
Issue Dt:
05/04/2004
Application #:
09396324
Filing Dt:
09/15/1999
Title:
IONIC SALT DYES AS AMORPHOUS, THERMALLY STABLE EMITTING AND CHARGE TRANSPORT LAYERS IN ORGANIC LIGHT EMITTING DIODES
9
Patent #:
6403433
Issue Dt:
06/11/2002
Application #:
09397217
Filing Dt:
09/16/1999
Title:
SOURCE/DRAIN DOPING TECHNIQUE FOR ULTRA-THIN-BODY SOI MOS TRANSISTORS
10
Patent #:
6288411
Issue Dt:
09/11/2001
Application #:
09397292
Filing Dt:
09/15/1999
Title:
DEFECT COLLECTING STRUCTURES FOR PHOTOLITHOGRAPHY
11
Patent #:
6284582
Issue Dt:
09/04/2001
Application #:
09398246
Filing Dt:
09/17/1999
Title:
MOS-GATE TUNNELING-INJECTION BIPOLAR TRANSISTOR
12
Patent #:
6404269
Issue Dt:
06/11/2002
Application #:
09398594
Filing Dt:
09/17/1999
Title:
LOW POWER SOI ESD BUFFER DRIVER NETWORKS HAVING DYNAMIC THRESHOLD MOSFETS
13
Patent #:
6888843
Issue Dt:
05/03/2005
Application #:
09398624
Filing Dt:
09/17/1999
Publication #:
US20030095557
Pub Dt:
05/22/2003
Title:
RESPONSE VIRTUAL CHANNEL FOR HANDLING ALL RESPONSES
14
Patent #:
6740566
Issue Dt:
05/25/2004
Application #:
09398641
Filing Dt:
09/17/1999
Publication #:
US20010014512
Pub Dt:
08/16/2001
Title:
ULTRA-THIN RESIST SHALLOW TRENCH PROCESS USING HIGH SELECTIVITY NITRIDE ETCH
15
Patent #:
6350559
Issue Dt:
02/26/2002
Application #:
09398642
Filing Dt:
09/17/1999
Title:
METHOD FOR CREATING THINNER RESIST COATING THAT ALSO HAS FEWER PINHOLES
16
Patent #:
6473849
Issue Dt:
10/29/2002
Application #:
09398955
Filing Dt:
09/17/1999
Title:
IMPLEMENTING LOCKS IN A DISTRIBUTED PROCESSING SYSTEM
17
Patent #:
6593623
Issue Dt:
07/15/2003
Application #:
09400524
Filing Dt:
09/20/1999
Title:
REDUCED CHANNEL LENGTH LIGHTLY DOPED DRAIN TRANSISTOR USING A SUB-AMORPHOUS LARGE TILT ANGLE IMPLANT TO PROVIDE ENHANCED LATERAL DIFFUSION
18
Patent #:
6556882
Issue Dt:
04/29/2003
Application #:
09401089
Filing Dt:
09/22/1999
Title:
METHOD AND APPARATUS FOR GENERATING REAL-TIME DATA FROM STATIC FILES
19
Patent #:
6368879
Issue Dt:
04/09/2002
Application #:
09401090
Filing Dt:
09/22/1999
Title:
PROCESS CONTROL WITH CONTROL SIGNAL DERIVED FROM METROLOGY OF A REPETITIVE CRITICAL DIMENSION FEATURE OF A TEST STRUCTURE ON THE WORK PIECE
20
Patent #:
6247123
Issue Dt:
06/12/2001
Application #:
09401561
Filing Dt:
09/22/1999
Title:
BRANCH PREDICTION MECHANISM EMPLOYING BRANCH SELECTORS TO SELECT A BRANCH PREDICTION
21
Patent #:
6268227
Issue Dt:
07/31/2001
Application #:
09401585
Filing Dt:
09/22/1999
Title:
METHOD FOR CONTROLLING PHOTORESIST REMOVAL PROCESSES
22
Patent #:
6266132
Issue Dt:
07/24/2001
Application #:
09401586
Filing Dt:
09/22/1999
Title:
STEPPER WITH EXPOSURE TIME MONITOR
23
Patent #:
6528846
Issue Dt:
03/04/2003
Application #:
09404039
Filing Dt:
09/23/1999
Title:
ASYMMETRIC HIGH VOLTAGE SILICON ON INSULATOR DEVICE DESIGN FOR INPUT OUTPUT CIRCUITS
24
Patent #:
6319798
Issue Dt:
11/20/2001
Application #:
09405266
Filing Dt:
09/23/1999
Title:
METHOD FOR REDUCING LATERAL DOPANT GRADIENT IN SOURCE/DRAIN EXTENSION OF MOSFET
25
Patent #:
6248637
Issue Dt:
06/19/2001
Application #:
09405831
Filing Dt:
09/24/1999
Title:
PROCESS FOR MANUFACTURING MOS TRANSISTORS HAVING ELEVATED SOURCE AND DRAIN REGIONS
26
Patent #:
6265250
Issue Dt:
07/24/2001
Application #:
09406169
Filing Dt:
09/23/1999
Title:
METHOD FOR FORMING SOI FILM BY LASER ANNEALING
27
Patent #:
6376880
Issue Dt:
04/23/2002
Application #:
09406451
Filing Dt:
09/27/1999
Title:
HIGH-SPEED LATERAL BIPOLAR DEVICE IN SOI PROCESS
28
Patent #:
6895372
Issue Dt:
05/17/2005
Application #:
09406663
Filing Dt:
09/27/1999
Title:
SYSTEM AND METHOD FOR VLSI VISUALIZATION
29
Patent #:
6804242
Issue Dt:
10/12/2004
Application #:
09407504
Filing Dt:
09/28/1999
Title:
METHOD AND APPARATUS FOR THE CHANNELIZATION OF CELL OR PACKET TRAFFIC OVER STANDARD PC BUSES
30
Patent #:
6560504
Issue Dt:
05/06/2003
Application #:
09408241
Filing Dt:
09/29/1999
Title:
USE OF CONTAMINATION-FREE MANUFACTURING DATA IN FAULT DETECTION AND CLASSIFICATION AS WELL AS IN RUN-TO-CONTROL
31
Patent #:
6282113
Issue Dt:
08/28/2001
Application #:
09408349
Filing Dt:
09/29/1999
Title:
FOUR F-SQUARED GAPLESS DUAL LAYER BITLINE DRAM ARRAY ARCHITECTURE
32
Patent #:
6303396
Issue Dt:
10/16/2001
Application #:
09408881
Filing Dt:
09/29/1999
Title:
SUSBTRATE REMOVAL AS A FUNCTION OF RESISTANCE AT THE BACK SIDE OF A SEMICONDUCTOR DEVICE
33
Patent #:
6754848
Issue Dt:
06/22/2004
Application #:
09408916
Filing Dt:
09/30/1999
Title:
METHOD, SYSTEM AND PROGRAM PRODUCTS FOR OPERATIONALLY MIGRATING A CLUSTER THROUGH EMULATION
34
Patent #:
6675128
Issue Dt:
01/06/2004
Application #:
09409151
Filing Dt:
09/30/1999
Title:
METHODS AND APPARATUS FOR PERFORMANCE MANAGEMENT USING SELF-ADJUSTING MODEL-BASED POLICIES
35
Patent #:
6254453
Issue Dt:
07/03/2001
Application #:
09409243
Filing Dt:
09/30/1999
Title:
OPTIMIZATION OF CHEMICAL MECHANICAL PROCESS BY DETECTION OF OXIDE/NITRIDE INTERFACE USING CLD SYSTEM
36
Patent #:
6153935
Issue Dt:
11/28/2000
Application #:
09409244
Filing Dt:
09/30/1999
Title:
DUAL ETCH STOP/DIFFUSION BARRIER FOR DAMASCENE INTERCONNECTS
37
Patent #:
6075721
Issue Dt:
06/13/2000
Application #:
09409352
Filing Dt:
09/30/1999
Title:
RANDOM ACCESS MEMORY HAVING BIT SELECTABLE MASK FOR MEMORY WRITES
38
Patent #:
6657446
Issue Dt:
12/02/2003
Application #:
09409974
Filing Dt:
09/30/1999
Title:
PICOSECOND IMAGING CIRCUIT ANALYSIS PROBE AND SYSTEM
39
Patent #:
6261851
Issue Dt:
07/17/2001
Application #:
09410265
Filing Dt:
09/30/1999
Title:
OPTIMIZATION OF CMP PROCESS BY DETECTION OF OXIDE/NITRIDE INTERFACE USING IR SYSTEM
40
Patent #:
6057206
Issue Dt:
05/02/2000
Application #:
09410526
Filing Dt:
10/01/1999
Title:
MARK PROTECTION SCHEME WITH NO MASKING
41
Patent #:
6553430
Issue Dt:
04/22/2003
Application #:
09410852
Filing Dt:
10/01/1999
Title:
COMPUTER SYSTEM IMPLEMENTING FLUSH OPERATION
42
Patent #:
6225852
Issue Dt:
05/01/2001
Application #:
09411170
Filing Dt:
10/01/1999
Title:
USE OF BIASED HIGH THRESHOLD VOLTAGE TRANSISTOR TO ELIMINATE STANDBY CURRENT IN LOW VOLTAGE INTEGRATED CIRCUITS
43
Patent #:
6265304
Issue Dt:
07/24/2001
Application #:
09412215
Filing Dt:
10/05/1999
Title:
CONTROLLING AN ETCHING PROCESS OF MULTIPLE LAYERS BASED UPON THICKNESS RATIO OF THE DIELECTRIC LAYERS
44
Patent #:
6259521
Issue Dt:
07/10/2001
Application #:
09412216
Filing Dt:
10/05/1999
Title:
METHOD AND APPARATUS FOR CONTROLLING PHOTOLITHOGRAPHY PARAMETERS BASED ON PHOTORESIST IMAGES
45
Patent #:
6560503
Issue Dt:
05/06/2003
Application #:
09412679
Filing Dt:
10/05/1999
Title:
METHOD AND APPARATUS FOR MONITORING CONTROLLER PERFORMANCE USING STATISTICAL PROCESS CONTROL
46
Patent #:
8121180
Issue Dt:
02/21/2012
Application #:
09413821
Filing Dt:
10/07/1999
Title:
AUTOMATIC OUTPUT DRIVE LEVEL CONTROL IN HOME NETWORKING TRANSCEIVER
47
Patent #:
6751737
Issue Dt:
06/15/2004
Application #:
09413965
Filing Dt:
10/07/1999
Title:
MULTIPLE PROTECTED MODE EXECUTION ENVIRONMENTS USING MULTIPLE REGISTER SETS AND META-PROTECTED INSTRUCTIONS
48
Patent #:
6427093
Issue Dt:
07/30/2002
Application #:
09414107
Filing Dt:
10/07/1999
Title:
METHOD AND APPARATUS FOR OPTIMAL WAFER-BY-WAFER PROCESSING
49
Patent #:
6532428
Issue Dt:
03/11/2003
Application #:
09414190
Filing Dt:
10/07/1999
Title:
METHOD AND APPARATUS FOR AUTOMATIC CALIBRATION OF CRITICAL DIMENSION METROLOGY TOOL
50
Patent #:
6453387
Issue Dt:
09/17/2002
Application #:
09415132
Filing Dt:
10/08/1999
Title:
FULLY ASSOCIATIVE TRANSLATION LOOKASIDE BUFFER (TLB) INCLUDING A LEAST RECENTLY USED (LRU) STACK AND IMPLEMENTING AN LRU REPLACEMENT STRATEGY
51
Patent #:
6100179
Issue Dt:
08/08/2000
Application #:
09415218
Filing Dt:
10/12/1999
Title:
ELECTROMIGRATION RESISTANT PATTERNED METAL LAYER GAP FILLED WITH HSQ
52
Patent #:
6218931
Issue Dt:
04/17/2001
Application #:
09415427
Filing Dt:
10/08/1999
Title:
HOME-APPLIANCE NETWORK WITH NODES IDENTIFIED BY DIRECT-SEQUENCE SPREADING CODES
53
Patent #:
6278102
Issue Dt:
08/21/2001
Application #:
09415642
Filing Dt:
10/12/1999
Title:
METHOD OF DETECTING ELECTROMAGNETIC RADIATION WITH BANDGAP ENGINEERED ACTIVE PIXEL CELL DESIGN
54
Patent #:
6349365
Issue Dt:
02/19/2002
Application #:
09415892
Filing Dt:
10/08/1999
Title:
USER-PRIORITIZED CACHE REPLACEMENT
55
Patent #:
6266679
Issue Dt:
07/24/2001
Application #:
09416071
Filing Dt:
10/12/1999
Title:
METHOD AND APPARATUS FOR HIERARCHICAL STORAGE OF DATA FOR EFFICIENT ARCHIVING AND RETRIEVAL OF DATA
56
Patent #:
6636959
Issue Dt:
10/21/2003
Application #:
09416275
Filing Dt:
10/14/1999
Title:
PREDICTOR MISS DECODER UPDATING LINE PREDICTOR STORING INSTRUCTION FETCH ADDRESS AND ALIGNMENT INFORMATION UPON INSTRUCTION DECODE TERMINATION CONDITION
57
Patent #:
6291332
Issue Dt:
09/18/2001
Application #:
09416383
Filing Dt:
10/12/1999
Title:
ELECTROLESS PLATED SEMICONDUCTOR VIAS AND CHANNELS
58
Patent #:
6329277
Issue Dt:
12/11/2001
Application #:
09417839
Filing Dt:
10/14/1999
Title:
METHOD OF FORMING COBALT SILICIDE
59
Patent #:
6228761
Issue Dt:
05/08/2001
Application #:
09417840
Filing Dt:
10/14/1999
Title:
METHOD OF FORMING A LOCAL INTERCONNECT WITH IMPROVED ETCH SELECTIVITY OF SILICON DIOXIDE/SILICIDE
60
Patent #:
6201303
Issue Dt:
03/13/2001
Application #:
09417842
Filing Dt:
10/14/1999
Title:
METHOD OF FORMING A LOCAL INTERCONNECT WITH IMPROVED ETCH SELECTIVITY OF SILICON DIOXIDE/SILICIDE
61
Patent #:
6239685
Issue Dt:
05/29/2001
Application #:
09418011
Filing Dt:
10/14/1999
Title:
BISTABLE MICROMECHANICAL SWITCHES
62
Patent #:
6344129
Issue Dt:
02/05/2002
Application #:
09418197
Filing Dt:
10/13/1999
Title:
METHOD FOR PLATING COPPER CONDUCTORS AND DEVICES FORMED
63
Patent #:
6087235
Issue Dt:
07/11/2000
Application #:
09418276
Filing Dt:
10/14/1999
Title:
METHOD FOR EFFECTIVE FABRICATION OF A FIELD EFFECT TRANSISTOR WITH ELEVATED DRAIN AND SOURCE CONTACT STRUCTURES
64
Patent #:
6268253
Issue Dt:
07/31/2001
Application #:
09418407
Filing Dt:
10/14/1999
Title:
FORMING A REMOVABLE SPACER OF UNIFORM WIDTH ON SIDEWALLS OF A GATE OF A FIELD EFFECT TRANSISTOR DURING A DIFFERENTIAL RAPID THERMAL ANNEAL PROCESS
65
Patent #:
6647490
Issue Dt:
11/11/2003
Application #:
09419832
Filing Dt:
10/14/1999
Publication #:
US20030182543
Pub Dt:
09/25/2003
Title:
TRAINING LINE PREDICTOR FOR BRANCH TARGETS
66
Patent #:
6215155
Issue Dt:
04/10/2001
Application #:
09420605
Filing Dt:
10/18/1999
Title:
SILICON-ON-INSULATOR CONFIGURATION WHICH IS COMPATIBLE WITH BULK CMOS ARCHITECTURE
67
Patent #:
6229187
Issue Dt:
05/08/2001
Application #:
09420972
Filing Dt:
10/20/1999
Title:
FIELD EFFECT TRANSISTOR WITH NON-FLOATING BODY AND METHOD FOR FORMING SAME ON A BULK SILICON WAFER
68
Patent #:
6125055
Issue Dt:
09/26/2000
Application #:
09421105
Filing Dt:
10/19/1999
Title:
SECTOR WRITE PROTECT CAMS FOR A SIMULTANEOUS OPERATION FLASH MEMORY
69
Patent #:
6376286
Issue Dt:
04/23/2002
Application #:
09421305
Filing Dt:
10/20/1999
Publication #:
US20020025636
Pub Dt:
02/28/2002
Title:
FIELD EFFECT TRANSISTOR WITH NON-FLOATING BODY AND METHOD FOR FORMING SAME ON A BULK SILICON WAFER
70
Patent #:
6245636
Issue Dt:
06/12/2001
Application #:
09421639
Filing Dt:
10/20/1999
Title:
METHOD OF FORMATION OF PSEUDO-SOI STRUCTURES WITH DIRECT CONTACT OF TRANSISTOR BODY TO THE SUBSTRATE
71
Patent #:
6476483
Issue Dt:
11/05/2002
Application #:
09421910
Filing Dt:
10/20/1999
Title:
METHOD AND APPARATUS FOR COOLING A SILICON ON INSULATOR DEVICE
72
Patent #:
6252755
Issue Dt:
06/26/2001
Application #:
09422260
Filing Dt:
10/21/1999
Title:
APPARATUS AND METHOD FOR IMPLEMENTING A HOME NETWORK USING CUSTOMER-PREMISES POWER LINES
73
Patent #:
6437348
Issue Dt:
08/20/2002
Application #:
09422310
Filing Dt:
10/21/1999
Title:
SIMULTANEOUS HEATING AND EXPOSURE OF RETICLE WITH PATTERN PLACEMENT CORRECTION
74
Patent #:
6438135
Issue Dt:
08/20/2002
Application #:
09422591
Filing Dt:
10/21/1999
Title:
DYNAMIC WIEGHTED ROUND ROBIN QUEUING
75
Patent #:
6352817
Issue Dt:
03/05/2002
Application #:
09422592
Filing Dt:
10/21/1999
Title:
METHODOLOGY FOR MITIGATING FORMATION OF T-TOPS IN PHOTORESIST
76
Patent #:
6166423
Issue Dt:
12/26/2000
Application #:
09425402
Filing Dt:
10/22/1999
Title:
INTEGRATED CIRCUIT HAVING A VIA AND A CAPACITOR
77
Patent #:
6284622
Issue Dt:
09/04/2001
Application #:
09426208
Filing Dt:
10/25/1999
Title:
METHOD FOR FILLING TRENCHES
78
Patent #:
6258681
Issue Dt:
07/10/2001
Application #:
09426304
Filing Dt:
10/25/1999
Title:
USE OF A RAPID THERMAL ANNEAL PROCESS TO CONTROL DRIVE CURRENT
79
Patent #:
6166411
Issue Dt:
12/26/2000
Application #:
09426339
Filing Dt:
10/25/1999
Title:
HEAT REMOVAL FROM SOI DEVICES BY USING METAL SUBSTRATES
80
Patent #:
6372573
Issue Dt:
04/16/2002
Application #:
09426754
Filing Dt:
10/26/1999
Publication #:
US20010039088
Pub Dt:
11/08/2001
Title:
SELF-ALIGNED TRENCH CAPACITOR CAPPING PROCESS FOR HIGH DENSITY DRAM CELLS
81
Patent #:
6355528
Issue Dt:
03/12/2002
Application #:
09426911
Filing Dt:
10/26/1999
Title:
METHOD TO FORM NARROW STRUCTURES USING DOUBLE-DAMASCENE PROCESS
82
Patent #:
6180487
Issue Dt:
01/30/2001
Application #:
09427134
Filing Dt:
10/25/1999
Title:
SELECTIVE THINNING OF BARRIER OXIDE THROUGH MASKED SIMOX IMPLANT
83
Patent #:
6483147
Issue Dt:
11/19/2002
Application #:
09427135
Filing Dt:
10/25/1999
Title:
THROUGH WAFER BACKSIDE CONTACT TO IMPROVE SOI HEAT DISSIPATION
84
Patent #:
6246103
Issue Dt:
06/12/2001
Application #:
09427136
Filing Dt:
10/25/1999
Title:
BIPOLAR JUNCTION TRANSISTOR WITH TUNNELING CURRENT THROUGH THE GATE OF A FIELD EFFECT TRANSISTOR AS BASE CURRENT
85
Patent #:
6287913
Issue Dt:
09/11/2001
Application #:
09427506
Filing Dt:
10/26/1999
Title:
DOUBLE POLYSILICON PROCESS FOR PROVIDING SINGLE CHIP HIGH PERFORMANCE LOGIC AND COMPACT EMBEDDED MEMORY STRUCTURE
86
Patent #:
6431182
Issue Dt:
08/13/2002
Application #:
09427861
Filing Dt:
10/27/1999
Title:
PLASMA TREATMENT FOR POLYMER REMOVAL AFTER VIA ETCH
87
Patent #:
6192468
Issue Dt:
02/20/2001
Application #:
09428591
Filing Dt:
10/27/1999
Title:
APPARATUS AND METHOD FOR DETECTING MICROBRANCHES EARLY
88
Patent #:
6090528
Issue Dt:
07/18/2000
Application #:
09428601
Filing Dt:
10/27/1999
Title:
SPOT-TO-SPOT STITCHING IN ELECTRON BEAM LITHOGRAPHY UTILIZING SQUARE APERTURE WITH SERRATED EDGE
89
Patent #:
6456891
Issue Dt:
09/24/2002
Application #:
09428614
Filing Dt:
10/27/1999
Title:
SYSTEM AND METHOD FOR TRANSPARENT HANDLING OF EXTENDED REGISTER STATES
90
Patent #:
6505261
Issue Dt:
01/07/2003
Application #:
09428633
Filing Dt:
10/27/1999
Title:
SYSTEM AND METHOD FOR INITIATING AN OPERATING FREQUENCY USING DUAL-USE PINS
91
Patent #:
6281731
Issue Dt:
08/28/2001
Application #:
09428639
Filing Dt:
10/27/1999
Title:
CONTROL OF HYSTERESIS CHARACTERISTIC WITHIN A CMOS DIFFERENTIAL RECEIVER
92
Patent #:
6266218
Issue Dt:
07/24/2001
Application #:
09428734
Filing Dt:
10/28/1999
Title:
MAGNETIC SENSORS HAVING ANTIFERROMAGNETICALLY EXCHANGE-COUPLED LAYERS FOR LONGITUDINAL BIASING
93
Patent #:
6115912
Issue Dt:
09/12/2000
Application #:
09428751
Filing Dt:
10/28/1999
Title:
APPARATUS AND METHOD FOR PRINTED CIRCUIT BOARD REPAIR
94
Patent #:
6294831
Issue Dt:
09/25/2001
Application #:
09429154
Filing Dt:
10/28/1999
Title:
ELECTRONIC PACKAGE WITH BONDED STRUCTURE AND METHOD OF MAKING
95
Patent #:
6475555
Issue Dt:
11/05/2002
Application #:
09429256
Filing Dt:
10/29/1999
Publication #:
US20020009539
Pub Dt:
01/24/2002
Title:
PROCESS FOR SCREENING FEATURES ON AN ELECTRONIC SUBSTRATE WITH A LOW VISCOSITY PASTE
96
Patent #:
6439963
Issue Dt:
08/27/2002
Application #:
09429428
Filing Dt:
10/28/1999
Title:
SYSTEM AND METHOD FOR MITIGATING WAFER SURFACE DISFORMATION DURING CHEMICAL MECHANICAL POLISHING (CMP)
97
Patent #:
6238830
Issue Dt:
05/29/2001
Application #:
09429994
Filing Dt:
10/29/1999
Title:
ACTIVE CONTROL OF TEMPERATURE IN SCANNING PROBE LITHOGRAPHY AND MASKLESS LITHOGRAPHY
98
Patent #:
6507116
Issue Dt:
01/14/2003
Application #:
09430075
Filing Dt:
10/29/1999
Title:
ELECTRONIC PACKAGE AND METHOD OF FORMING
99
Patent #:
6442707
Issue Dt:
08/27/2002
Application #:
09430120
Filing Dt:
10/29/1999
Title:
ALTERNATE FAULT HANDLER
100
Patent #:
6265751
Issue Dt:
07/24/2001
Application #:
09430335
Filing Dt:
10/29/1999
Title:
METHOD AND SYSTEM FOR REDUCING ARC LAYER REMOVAL BY CONDENSING THE ARC LAYER
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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