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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
08/10/2004
Application #:
09577457
Filing Dt:
05/24/2000
Title:
FLOATING INTERPOSER
2
Patent #:
Issue Dt:
09/28/2004
Application #:
09577527
Filing Dt:
05/24/2000
Title:
GRAPHICS SUBSYSTEM INCLUDING A RAMDAC IC WITH DIGITAL VIDEO STORAGE INTERFACE FOR CONNECTION TO A GRAPHICS BUS
3
Patent #:
Issue Dt:
10/28/2003
Application #:
09577677
Filing Dt:
05/22/2000
Title:
IMMEDIATE NEGATIVE ACKNOWLEDGEMENT FOR A COMMUNICATION NETWORK
4
Patent #:
Issue Dt:
09/21/2004
Application #:
09577706
Filing Dt:
05/23/2000
Title:
Passivating inorganic bottom anti-reflective coating (BARC) using rapid thermal anneal (RTA) with oxidizing gas
5
Patent #:
Issue Dt:
05/14/2002
Application #:
09577756
Filing Dt:
05/23/2000
Title:
METHOD AND APPARATUS FOR CONTROLLING DEPOSITION PROCESS USING RESIDUAL GAS ANALYSIS
6
Patent #:
Issue Dt:
01/28/2003
Application #:
09577769
Filing Dt:
05/24/2000
Title:
METHOD FOR CONTROLLING DEPOSITION PARAMETERS BASED ON POLYSILICON GRAIN SIZE FEEDBACK
7
Patent #:
Issue Dt:
08/13/2002
Application #:
09578101
Filing Dt:
05/22/2000
Title:
INTEGRATED WAFER STOCKER AND SORTER WITH INTEGRITY VERIFICATION SYSTEM
8
Patent #:
Issue Dt:
11/18/2003
Application #:
09578272
Filing Dt:
05/25/2000
Title:
BAND-SHIFTED LIQUID CRYSTAL STRUCTURE FOR PROJECTION OF IMAGES WITHOUT SPECTRAL DISTORTION
9
Patent #:
Issue Dt:
08/26/2003
Application #:
09578362
Filing Dt:
05/25/2000
Title:
METHOD TO DEFINE AND TAILOR PROCESS LIMITED LITHOGRAPHIC FEATURES USING A MODIFIED HARD MASK PROCESS
10
Patent #:
Issue Dt:
04/13/2004
Application #:
09578954
Filing Dt:
05/25/2000
Title:
INDEX GENERATION FOR HISTORY BASED BRANCH PREDICTOR
11
Patent #:
Issue Dt:
04/13/2004
Application #:
09579245
Filing Dt:
05/25/2000
Title:
BRANCH PREDICTOR THAT SELECTS BETWEEN PREDICTIONS BASED ON STORED PREDICTION SELECTOR AND BRANCH PREDICTOR INDEX GENERATION
12
Patent #:
Issue Dt:
03/05/2002
Application #:
09579310
Filing Dt:
05/25/2000
Title:
Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same
13
Patent #:
Issue Dt:
11/11/2003
Application #:
09580098
Filing Dt:
05/30/2000
Title:
TEMPERATURE CONTROL OF AN INTEGRATED CIRCUIT
14
Patent #:
Issue Dt:
07/02/2002
Application #:
09580130
Filing Dt:
05/30/2000
Title:
PROCESS AND STRUCTURE FOR 50+ GIGAHERTZ TRANSISTOR
15
Patent #:
Issue Dt:
06/26/2007
Application #:
09583617
Filing Dt:
05/31/2000
Title:
ELECTRICAL PROBING OF SOI CIRCUITS
16
Patent #:
Issue Dt:
06/04/2002
Application #:
09583817
Filing Dt:
05/30/2000
Title:
SELF-ALIGNING VIAS FOR SEMICONDUCTORS
17
Patent #:
Issue Dt:
05/02/2006
Application #:
09584301
Filing Dt:
05/31/2000
Title:
METHOD AND APPARATUS FOR POWERING DOWN THE CPU/MEMORY CONTROLLER COMPLEX WHILE PRESERVING THE SELF REFRESH STATE OF MEMORY IN THE SYSTEM
18
Patent #:
Issue Dt:
05/25/2004
Application #:
09585199
Filing Dt:
06/01/2000
Title:
METHOD FOR RELATING PHOTOLITHOGRAPHY OVERLAY TARGET DAMAGE AND CHEMICAL MECHANICAL PLANARIZATION (CMP) FAULT DETECTION TO CMP TOOL INDENTIFICATION
19
Patent #:
Issue Dt:
04/15/2003
Application #:
09586505
Filing Dt:
06/02/2000
Title:
APPARATUS AND METHOD FOR ANALYZING FUNCTIONAL FAILURES IN INTEGRATED CIRCUITS
20
Patent #:
Issue Dt:
03/20/2001
Application #:
09586516
Filing Dt:
06/02/2000
Title:
METHOD OF FORMING SELF-ALIGNED EXTENSION JUNCTION FOR REDUCED GATE CHANNEL
21
Patent #:
Issue Dt:
06/13/2006
Application #:
09586518
Filing Dt:
06/02/2000
Title:
RESISTIVITY ANALYSIS
22
Patent #:
Issue Dt:
04/08/2003
Application #:
09586572
Filing Dt:
06/02/2000
Title:
DATA PROCESSING DEVICE TEST APPARATUS AND METHOD THEREFOR
23
Patent #:
Issue Dt:
03/08/2005
Application #:
09586575
Filing Dt:
06/02/2000
Title:
FIFO WITH UNDO-PUSH CAPABILITY
24
Patent #:
Issue Dt:
08/02/2005
Application #:
09588295
Filing Dt:
06/07/2000
Title:
PACKET CLASSIFICATION USING HASH KEY SIGNATURES GENERATED FROM INTERRUPTED HASH FUNCTION
25
Patent #:
Issue Dt:
07/29/2008
Application #:
09588351
Filing Dt:
06/07/2000
Title:
METHODS TO IMPROVE THE OPERATION OF SOI DEVICES
26
Patent #:
Issue Dt:
08/13/2002
Application #:
09588459
Filing Dt:
06/06/2000
Title:
TREATMENT SOLUTION FOR REDUCING ADHESIVE RESIN BLEED
27
Patent #:
Issue Dt:
08/06/2002
Application #:
09589105
Filing Dt:
06/08/2000
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH IMPROVED LINE WIDTH ACCURACY
28
Patent #:
Issue Dt:
07/17/2001
Application #:
09589378
Filing Dt:
06/07/2000
Title:
Poly gate CD passivation for metrology control
29
Patent #:
Issue Dt:
03/26/2002
Application #:
09589839
Filing Dt:
06/08/2000
Title:
Methods and apparatus for forming a copper interconnect
30
Patent #:
Issue Dt:
04/06/2004
Application #:
09590685
Filing Dt:
06/09/2000
Title:
SYSTEM AND METHOD FOR NETWORK MANAGEMENT OF LOCAL AREA NETWORKS HAVING NON-BLOCKING NETWORK SWITCHES CONFIGURED FOR SWITCHING DATA PACKETS BETWEEN SUBNETWORKS BASED ON MANAGEMENT POLICIES
31
Patent #:
Issue Dt:
06/03/2003
Application #:
09591085
Filing Dt:
06/09/2000
Title:
SYSTEM AND METHOD FOR ILLUMINATING A SEMICONDUCTOR PROCESSING SYSTEM
32
Patent #:
Issue Dt:
10/14/2003
Application #:
09591163
Filing Dt:
06/09/2000
Title:
SYSTEM AND METHOD FOR ILLUMINATING A SEMICONDUCTOR PROCESSING SYSTEM
33
Patent #:
Issue Dt:
03/05/2002
Application #:
09591967
Filing Dt:
06/12/2000
Title:
METHOD OF ENDPOINTING PLASMA STRIP PROCESS BY MEASURING WAFER TEMPERATURE
34
Patent #:
Issue Dt:
04/13/2004
Application #:
09591993
Filing Dt:
06/12/2000
Title:
SYSTEM FOR SUSPENDING OPERATON OF A SEITCHING REGULATOR CIRCUIT IN A POWER SUPPLY IF THE TEMPERATURE OF THE SWITCHING REGULATOR IS TOO HIGH
35
Patent #:
Issue Dt:
04/06/2004
Application #:
09592124
Filing Dt:
06/12/2000
Title:
METHOD AND SYSTEM FOR FORMING A LONG CHANNEL DEVICE
36
Patent #:
Issue Dt:
09/18/2001
Application #:
09592164
Filing Dt:
06/13/2000
Title:
Method of electroless ag layer formation for cu interconnects
37
Patent #:
Issue Dt:
05/07/2002
Application #:
09592275
Filing Dt:
06/12/2000
Title:
TOP INFRARED HEATING FOR BONDING OPERATIONS
38
Patent #:
Issue Dt:
02/12/2002
Application #:
09593669
Filing Dt:
06/14/2000
Title:
Method of manufacturing a semiconductor device having copper interconnects
39
Patent #:
Issue Dt:
02/12/2002
Application #:
09593704
Filing Dt:
06/15/2000
Title:
Polymers and use thereof
40
Patent #:
Issue Dt:
08/02/2005
Application #:
09593912
Filing Dt:
06/14/2000
Title:
SYSTEM AND METHOD FOR INTERFACING BETWEEN A MEDIA ACCESS CONTROLLER AND A NUMBER OF PHYSICAL LAYER DEVICES USING TIME DIVISION MULTIPLEXING
41
Patent #:
Issue Dt:
02/24/2004
Application #:
09594232
Filing Dt:
06/14/2000
Title:
SYSTEM AND METHOD FOR INTERFACING BETWEEN A MEDIA ACCESS CONTROLLER AND A NUMBER OF PHYSICAL LAYER DEVICES USING DATA ADDRESSING
42
Patent #:
Issue Dt:
05/25/2004
Application #:
09594604
Filing Dt:
06/15/2000
Title:
ARRANGEMENT FOR IDENTIFYING DATA PACKET TYPES FROM MULTIPLE PROTOCOL FORMATS ON A NETWORK SWITCH PORT
43
Patent #:
Issue Dt:
03/23/2004
Application #:
09594606
Filing Dt:
06/15/2000
Title:
APPARATUS AND METHOD FOR STORING MIN TERMS IN NETWORK SWITCH PORT MEMORY FOR ACCESS AND COMPACTNESS
44
Patent #:
Issue Dt:
06/01/2004
Application #:
09594607
Filing Dt:
06/15/2000
Title:
FRAME IDENTIFIER FOR IDENTIFYING LAYER 2 DATA PACKET TYPES FOR UPPER LAYER PACKET CLASSIFICATION IN A NETWORK SWITCH PORT
45
Patent #:
Issue Dt:
01/13/2004
Application #:
09594608
Filing Dt:
06/15/2000
Title:
APPARATUS AND METHOD FOR SPECIFYING SUCCESSIVE BYTE LOCATIONS FOR EVALUATING DATA PACKETS IN A NETWORK SWITCH PORT
46
Patent #:
Issue Dt:
11/02/2004
Application #:
09595039
Filing Dt:
06/15/2000
Title:
PROGRAMMABLE BI-DIRECTIONAL MII TESTING METHODOLOGY AND DEVICE INCLUDING SAME
47
Patent #:
Issue Dt:
01/21/2003
Application #:
09595597
Filing Dt:
06/15/2000
Title:
TRANSLATION LOOKASIDE BUFFER FLUSH FILTER
48
Patent #:
Issue Dt:
09/30/2003
Application #:
09595598
Filing Dt:
06/15/2000
Title:
SYSTEM AND METHOD FOR CONTROLLING BUS ACCESS FOR BUS AGENTS HAVING VARYING PRIORITIES
49
Patent #:
Issue Dt:
01/07/2003
Application #:
09595978
Filing Dt:
06/16/2000
Title:
METHOD AND STRUCTURE FOR FORMING A TRENCH IN A SEMICONDUCTOR SUBSTRATE
50
Patent #:
Issue Dt:
08/28/2001
Application #:
09596178
Filing Dt:
06/16/2000
Title:
Method for developing ultra-thin resist films
51
Patent #:
Issue Dt:
04/29/2003
Application #:
09596260
Filing Dt:
06/16/2000
Title:
METHOD AND APPARATUS FOR INTERFACING A STATISTICAL PROCESS CONTROL SYSTEM WITH A MANUFACTURING PROCESS CONTROL FRAMEWORK
52
Patent #:
Issue Dt:
08/05/2003
Application #:
09596636
Filing Dt:
06/19/2000
Title:
PROVIDING GLOBAL TRANSLATIONS WITH ADDRESS SPACE NUMBERS
53
Patent #:
Issue Dt:
04/15/2003
Application #:
09596750
Filing Dt:
06/15/2000
Title:
CU/LOW-K BEOL WITH NONCONCURRENT HYBRID DIELECTRIC INTERFACE
54
Patent #:
Issue Dt:
02/04/2003
Application #:
09596820
Filing Dt:
06/19/2000
Title:
GATE ETCH PROCESS WITH EXTENDED CD TRIM CAPABILITY
55
Patent #:
Issue Dt:
09/03/2002
Application #:
09596954
Filing Dt:
06/16/2000
Title:
MODIFICATION OF MASK LAYOUT DATA TO IMPROVE MASK FIDELITY
56
Patent #:
Issue Dt:
01/15/2002
Application #:
09596993
Filing Dt:
06/20/2000
Title:
Hard mask for integrated circuit fabrication
57
Patent #:
Issue Dt:
04/09/2002
Application #:
09597098
Filing Dt:
06/20/2000
Title:
Process utilizing a cap layer optimized to reduce gate line over-melt
58
Patent #:
Issue Dt:
08/30/2005
Application #:
09597370
Filing Dt:
06/19/2000
Title:
METHOD OF TESTING A NETWORK DEVICE THROUGH A MEDIUM INDEPENDENT INTERFACE (MII)
59
Patent #:
Issue Dt:
03/26/2002
Application #:
09597623
Filing Dt:
06/20/2000
Title:
Dual amorphization process optimized to reduce gate line over-melt
60
Patent #:
Issue Dt:
09/03/2002
Application #:
09597765
Filing Dt:
06/20/2000
Title:
INTERFACIAL OXIDATION PROCESS FOR HIGH-K GATE DIELECTRIC PROCESS INTEGRATION
61
Patent #:
Issue Dt:
06/26/2001
Application #:
09597902
Filing Dt:
06/19/2000
Title:
Adhesion of silicon carbide films
62
Patent #:
Issue Dt:
07/16/2002
Application #:
09598376
Filing Dt:
06/21/2000
Title:
METHOD OF REDUCING POST-DEVELOPMENT DEFECTS IN AND AROUND OPENINGS FORMED IN PHOTORESIST BY USE OF NON-PATTERNED EXPOSURE
63
Patent #:
Issue Dt:
06/12/2001
Application #:
09598531
Filing Dt:
06/21/2000
Title:
Method of forming ultra thin gate dielectric for high performance semiconductor devices
64
Patent #:
Issue Dt:
04/16/2002
Application #:
09599530
Filing Dt:
06/23/2000
Title:
METHOD TO REDUCE OCCURRENCES OF FILLET CRACKING IN FLIP-CHIP UNDERFILL
65
Patent #:
Issue Dt:
06/25/2002
Application #:
09602045
Filing Dt:
06/23/2000
Title:
SYSTEM FOR CONTROLLING TRANSISTOR SPACER WIDTH
66
Patent #:
Issue Dt:
09/24/2002
Application #:
09602443
Filing Dt:
06/23/2000
Title:
LOW ANGLE SOLVENT DISPENSE NOZZLE DESIGN FOR FRONT-SIDE EDGE BEAD REMOVAL IN PHOTOLITHOGRAPHY RESIST PROCESS
67
Patent #:
Issue Dt:
07/02/2002
Application #:
09602966
Filing Dt:
06/23/2000
Title:
METHOD FOR INCORPORATING SUB RESOLUTION ASSIST FEATURES IN A PHOTOMASK LAYOUT
68
Patent #:
Issue Dt:
12/24/2002
Application #:
09603257
Filing Dt:
06/23/2000
Title:
HYDROGENATED OXIDIZED SILICON CARBON MATERIAL
69
Patent #:
Issue Dt:
09/23/2003
Application #:
09604267
Filing Dt:
06/26/2000
Title:
METHOD AND APPARATUS FOR AUTOMATED SYSTEM LEVEL TESTING
70
Patent #:
Issue Dt:
06/03/2003
Application #:
09604539
Filing Dt:
06/27/2000
Title:
ELECTROMIGRATION-RESISTANT COPPER MICROSTRUCTURE
71
Patent #:
Issue Dt:
07/23/2002
Application #:
09604547
Filing Dt:
06/26/2000
Title:
METHOD OF FABRICATING A SHALLOW TRENCH ISOLATION STRUCTURE WITH REDUCED TOPOGRAPHY
72
Patent #:
Issue Dt:
07/15/2003
Application #:
09604818
Filing Dt:
06/28/2000
Title:
MECHANISM TO CLEAR MAC ADDRESS FROM ETHERNET SWITCH ADDRESS TABLE TO ENABLE NETWORK LINK FAIL-OVER ACROSS TWO NETWORK SEGMENTS
73
Patent #:
Issue Dt:
08/05/2003
Application #:
09605173
Filing Dt:
06/28/2000
Title:
PLANARIZED PLASTIC PACKAGE MODULES FOR INTEGRATED CIRCUITS
74
Patent #:
Issue Dt:
04/02/2002
Application #:
09605592
Filing Dt:
06/28/2000
Title:
PROCESSOR IC PERFORMANCE METRIC
75
Patent #:
Issue Dt:
07/16/2002
Application #:
09605920
Filing Dt:
06/28/2000
Title:
NOVEL CAPACITIVELY COUPLED DTMOS ON SOI
76
Patent #:
Issue Dt:
03/04/2003
Application #:
09606359
Filing Dt:
06/29/2000
Title:
POLYMER AND CERAMIC COMPOSITE ELECTRONIC SUBSTRATES
77
Patent #:
Issue Dt:
12/04/2001
Application #:
09606651
Filing Dt:
06/28/2000
Title:
Method of creating selectively thin silicon/oxide for making fuly and partially depleted SOI on same waffer
78
Patent #:
Issue Dt:
06/18/2002
Application #:
09606752
Filing Dt:
06/29/2000
Title:
IC DEVICE BURN-IN METHOD AND APPARATUS
79
Patent #:
Issue Dt:
06/25/2002
Application #:
09607150
Filing Dt:
06/29/2000
Title:
DETECTING DIE SPEED VARIATIONS
80
Patent #:
Issue Dt:
12/10/2002
Application #:
09607629
Filing Dt:
06/30/2000
Title:
SELECTIVELY THIN SILICON FILM FOR CREATING FULLY AND PARTIALLY DEPLETED SOI ON SAME WAFER
81
Patent #:
Issue Dt:
10/15/2002
Application #:
09608535
Filing Dt:
06/30/2000
Title:
SERVO GUIDED STAGE SYSTEM WITH YAW SENSOR
82
Patent #:
Issue Dt:
10/14/2003
Application #:
09608798
Filing Dt:
06/30/2000
Title:
ION GUN DEPOSITION AND ALIGNMENT FOR LIQUID-CRYSTAL APPLICATIONS
83
Patent #:
Issue Dt:
11/26/2002
Application #:
09609293
Filing Dt:
06/30/2000
Title:
ACCURATE REAL-TIME LANDING ANGLE AND TELECENTRICITY MEASUREMENT IN LITHOGRAPHIC SYSTEMS
84
Patent #:
Issue Dt:
02/05/2002
Application #:
09610865
Filing Dt:
07/06/2000
Title:
Multi-layered pin grid array interposer apparatus and method for testing semiconductor devices having a non-pin grid array footprint
85
Patent #:
Issue Dt:
01/29/2002
Application #:
09610867
Filing Dt:
07/06/2000
Publication #:
Pub Dt:
01/10/2002
Title:
System level test socket
86
Patent #:
Issue Dt:
03/11/2003
Application #:
09611519
Filing Dt:
07/07/2000
Title:
LOW-POWER BAND-GAP REFERENCE AND TEMPERATURE SENSOR CIRCUIT
87
Patent #:
Issue Dt:
05/06/2003
Application #:
09611670
Filing Dt:
07/06/2000
Title:
APPARATUS AND METHOD FOR BUFFER LIBRARY SELECTION FOR USE IN BUFFER INSERTION
88
Patent #:
Issue Dt:
07/16/2002
Application #:
09611701
Filing Dt:
07/08/2000
Title:
METHOD FOR REDUCING THE STEP HEIGHT OF SHALLOW TRENCH ISOLATION STRUCTURES
89
Patent #:
Issue Dt:
11/25/2008
Application #:
09611955
Filing Dt:
07/06/2000
Title:
SEMICONDUCTOR STRUCTURE HAVING RECESS WITH CONDUCTIVE METAL
90
Patent #:
Issue Dt:
01/03/2006
Application #:
09612260
Filing Dt:
07/07/2000
Title:
SELF-ALIGNED GATE MOSFET WITH SEPARATE GATES
91
Patent #:
Issue Dt:
03/26/2002
Application #:
09612589
Filing Dt:
07/10/2000
Title:
Cool frame for protecting packaged electronic devices
92
Patent #:
Issue Dt:
02/19/2002
Application #:
09612771
Filing Dt:
07/10/2000
Title:
FIELD EFFECT TRANSISTOR WITH ELECTRICALLY INDUCED DRAIN AND SOURCE EXTENSIONS
93
Patent #:
Issue Dt:
01/29/2002
Application #:
09612781
Filing Dt:
07/10/2000
Title:
Fabrication of a field effect transistor with three sided gate structure on semiconductor on insulator
94
Patent #:
Issue Dt:
08/03/2004
Application #:
09613008
Filing Dt:
07/10/2000
Title:
REAL TIME CLOCK (RTC) HAVING SEVERAL HIGHLY DESIRABLE TIMEKEEPING DEPENDABILITY AND SECURITY ATTRIBUTES, AND METHODS FOR ACCESSING A REGISTER THEREOF
95
Patent #:
Issue Dt:
03/16/2004
Application #:
09613009
Filing Dt:
07/10/2000
Title:
METHODS FOR PROVIDING ESTIMATES OF THE CURRENT TIME IN A COMPUTER SYSTEM INCLUDING A LOCAL TIME SOURCE HAVING ONE OF SEVERAL POSSIBLE LEVELS OF TRUST WITH REGARD TO TIMEKEEPING
96
Patent #:
Issue Dt:
05/25/2004
Application #:
09613011
Filing Dt:
07/10/2000
Title:
MULTILEVEL NETWORK FOR DISTRIBUTING TRUSTED TIME AND DELEGATING LEVELS OF TRUST REGARDING TIMEKEEPING
97
Patent #:
Issue Dt:
06/04/2002
Application #:
09613087
Filing Dt:
07/10/2000
Title:
FABRICATION OF A NOTCHED GATE STRUCTURE FOR A FIELD EFFECT TRANSISTOR USING A SINGLE PATTERNING AND ETCH PROCESS
98
Patent #:
Issue Dt:
07/27/2004
Application #:
09613392
Filing Dt:
07/11/2000
Title:
SYSTEM AND METHOD FOR DELAYING POWER SUPPLY POWER-UP
99
Patent #:
Issue Dt:
02/03/2004
Application #:
09614230
Filing Dt:
07/12/2000
Title:
ENERGY SENSITIVE ELECTRICALLY CONDUCTIVE ADMIXTURES, USES THEREOF, METHODS OF FABRICATION AND STRUCTURES FABRICATED THEREWITH
100
Patent #:
Issue Dt:
07/02/2002
Application #:
09614232
Filing Dt:
07/12/2000
Title:
SYNTHESIS OF SOLUBLE DERIVATIVES OF SEXITHIOPHENE AND THEIR USE AS THE SEMICONDUCTING CHANNELS IN THIN-FILM FILED-EFFECT TRANSISTORS
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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