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Reel/Frame:	056987/0001			Pages:	1045
		Recorded:	05/12/2021
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 18026
Page 27 of 181
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Patent #:	6413852	Issue Dt:	07/02/2002	Application #:	09652754	Filing Dt:	08/31/2000
Title:	METHOD OF FORMING MULTILEVEL INTERCONNECT STRUCTURE CONTAINING AIR GAPS INCLUDING UTILIZING BOTH SACRIFICIAL AND PLACEHOLDER MATERIAL

Patent #:	6473174	Issue Dt:	10/29/2002	Application #:	09653435	Filing Dt:	09/01/2000
Title:	RESIST REMOVAL MONITORING BY RAMAN SPECTROSCOPY

Patent #:	6380806	Issue Dt:	04/30/2002	Application #:	09653670	Filing Dt:	09/01/2000
Title:	DIFFERENTIAL TELESCOPIC OPERATIONAL AMPLIFIER HAVING SWITCHED CAPACITOR COMMON MODE FEEDBACK CIRCUIT PORTION

Patent #:	6279107	Issue Dt:	08/21/2001	Application #:	09654843	Filing Dt:	09/02/2000
Title:	Branch selectors associated with byte ranges within an instruction cache for rapidly identifying branch predictions

Patent #:	6521328	Issue Dt:	02/18/2003	Application #:	09654963	Filing Dt:	09/05/2000
Title:	COPPER ETCHING COMPOSITIONS AND PRODUCTS DERIVED THEREFROM

Patent #:	6387806	Issue Dt:	05/14/2002	Application #:	09655700	Filing Dt:	09/06/2000
Title:	FILLING AN INTERCONNECT OPENING WITH DIFFERENT TYPES OF ALLOYS TO ENHANCE INTERCONNECT RELIABILITY

Patent #:	6472751	Issue Dt:	10/29/2002	Application #:	09656437	Filing Dt:	09/06/2000
Title:	H2 DIFFUSION BARRIER FORMATION BY NITROGEN INCORPORATION IN OXIDE LAYER

Patent #:	6534848	Issue Dt:	03/04/2006	Application #:	09657194	Filing Dt:	09/07/2000
Title:	ELECTRICAL COUPLING OF A STIFFENER TO A CHIP CARRIER

Patent #:	6512269	Issue Dt:	01/28/2003	Application #:	09657315	Filing Dt:	09/07/2000
Title:	HIGH-VOLTAGE HIGH-SPEED SOI MOSFET

Patent #:	6368963	Issue Dt:	04/09/2002	Application #:	09660396	Filing Dt:	09/12/2000
Title:	PASSIVATION OF SEMICONDUCTOR DEVICE SURFACES USING AN IODINE/ETHANOL SOLUTION

Patent #:	6365481	Issue Dt:	04/02/2002	Application #:	09660724	Filing Dt:	09/13/2000
Title:	Isotropic resistor protect etch to aid in residue removal

Patent #:	6492715	Issue Dt:	12/10/2002	Application #:	09660866	Filing Dt:	09/13/2000
Title:	INTEGRATED SEMICONDUCTOR PACKAGE

Patent #:	6372659	Issue Dt:	04/16/2002	Application #:	09661041	Filing Dt:	09/14/2000
Title:	FABRICATION OF METAL OXIDE STRUCTURE FOR A GATE DIELECTRIC OF A FIELD EFFECT TRANSISTOR

Patent #:	6564171	Issue Dt:	05/13/2003	Application #:	09661694	Filing Dt:	09/14/2000
Title:	METHOD AND APPARATUS FOR PARSING EVENT LOGS TO DETERMINE TOOL OPERABILITY

Patent #:	6459480	Issue Dt:	10/01/2002	Application #:	09662016	Filing Dt:	09/14/2000
Title:	MEASUREMENT METHOD OF ZERNIKE COMA ABERRATION COEFFICIENT

Patent #:	6387804	Issue Dt:	05/14/2002	Application #:	09664714	Filing Dt:	09/19/2000
Title:	PASSIVATION OF SIDEWALL SPACERS USING OZONATED WATER

Patent #:	6344691	Issue Dt:	02/05/2002	Application #:	09664863	Filing Dt:	09/19/2000
Title:	Barrier materials for metal interconnect in a semiconductor device

Patent #:	6329256	Issue Dt:	12/11/2001	Application #:	09666088	Filing Dt:	09/21/2000
Title:	Self-aligned damascene gate formation with low gate resistance

Patent #:	6818992	Issue Dt:	11/16/2004	Application #:	09666325	Filing Dt:	09/21/2000
Title:	SELF-ALIGNED COPPER SILICIDE FORMATION FOR IMPROVED ADHESION/ELECTROMIGRATION

Patent #:	6778549	Issue Dt:	08/17/2004	Application #:	09667382	Filing Dt:	09/22/2000
Title:	COUPLING DEVICE CONNECTING MULTIPLE POTS LINES IN AN HPNA ENVIRONMENT

Patent #:	6368762	Issue Dt:	04/09/2002	Application #:	09667573	Filing Dt:	09/22/2000
Title:	ACTIVE MASK EXPOSURE COMPENSATION OF UNDERLYING NITRIDE THICKNESS VARIATION TO REDUCE CRITICAL DIMENSION (CD) VARIATION

Patent #:	6514833	Issue Dt:	02/04/2003	Application #:	09667600	Filing Dt:	09/22/2000
Title:	METHOD OF INHIBITING LATERAL DIFFUSION BETWEEN ADJACENT WELLS BY INTRODUCING CARBON OR FLUORINE IONS INTO BOTTOM OF STI GROOVE

Patent #:	6344396	Issue Dt:	02/05/2002	Application #:	09667601	Filing Dt:	09/22/2000
Title:	Removable spacer technology using ion implantation for forming asymmetric MOS transistors

Patent #:	6337260	Issue Dt:	01/08/2002	Application #:	09667602	Filing Dt:	09/22/2000
Title:	Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion

Patent #:	6423601	Issue Dt:	07/23/2002	Application #:	09667685	Filing Dt:	09/22/2000
Title:	RETROGRADE WELL STRUCTURE FORMATION BY NITROGEN IMPLANTATION

Patent #:	6492281	Issue Dt:	12/10/2002	Application #:	09668443	Filing Dt:	09/22/2000
Title:	METHOD OF FABRICATING CONDUCTOR STRUCTURES WITH METAL COMB BRIDGING AVOIDANCE

Patent #:	6586746	Issue Dt:	07/01/2003	Application #:	09670728	Filing Dt:	09/27/2000
Title:	MULTIPOLE ELECTROSTATIC E-BEAM DEFLECTOR

Patent #:	6509226	Issue Dt:	01/21/2003	Application #:	09670741	Filing Dt:	09/27/2000
Title:	PROCESS FOR PROTECTING ARRAY TOP OXIDE

Patent #:	6522014	Issue Dt:	02/18/2003	Application #:	09670968	Filing Dt:	09/27/2000
Title:	FABRICATION OF A METALIZED BLIND VIA

Patent #:	6518648	Issue Dt:	02/11/2003	Application #:	09671944	Filing Dt:	09/27/2000
Title:	SUPERCONDUCTOR BARRIER LAYER FOR INTEGRATED CIRCUIT INTERCONNECTS

Patent #:	6509624	Issue Dt:	01/21/2003	Application #:	09675246	Filing Dt:	09/29/2000
Title:	SEMICONDUCTOR FUSES AND ANTIFUSES IN VERTICAL DRAMS

Patent #:	6801541	Issue Dt:	10/05/2004	Application #:	09675292	Filing Dt:	09/29/2000
Title:	METHOD AND APPARATUS FOR DATA TRANSMISSION OVER AN AC-97 PROTOCOL LINK

Patent #:	6794242	Issue Dt:	09/21/2004	Application #:	09675435	Filing Dt:	09/29/2000
Title:	EXTENDIBLE PROCESS FOR IMPROVED TOP OXIDE LAYER FOR DRAM ARRAY AND THE GATE INTERCONNECTS WHILE PROVIDING SELF-ALIGNED GATE CONTACTS

Patent #:	6515272	Issue Dt:	02/04/2003	Application #:	09675534	Filing Dt:	09/29/2000
Title:	METHOD AND APPARATUS FOR IMPROVING SIGNAL TO NOISE RATIO OF AN AERIAL IMAGE MONITOR

Patent #:	6601223	Issue Dt:	07/29/2003	Application #:	09675634	Filing Dt:	09/29/2000
Title:	SYSTEM AND METHOD FOR FAST INTERCONNECT DELAY ESTIMATION THROUGH ITERATIVE REFINEMENT

Patent #:	6524935	Issue Dt:	02/25/2003	Application #:	09675840	Filing Dt:	09/29/2000
Title:	PREPARATION OF STRAINED SI/SIGE ON INSULATOR BY HYDROGEN INDUCED LAYER TRANSFER TECHNIQUE

Patent #:	7087509	Issue Dt:	08/08/2006	Application #:	09676197	Filing Dt:	09/28/2000
Title:	METHOD OF FORMING A GATE ELECTRODE ON A SEMICONDUCTOR DEVICE AND A DEVICE INCORPORATING SAME

Patent #:	6817016	Issue Dt:	11/09/2004	Application #:	09676424	Filing Dt:	09/29/2000
Title:	DOMINANT EDGE IDENTIFICATION FOR EFFICIENT PARTITION AND DISTRIBUTION

Patent #:	6664186	Issue Dt:	12/16/2003	Application #:	09676882	Filing Dt:	09/29/2000
Title:	METHOD OF FILM DEPOSITION, AND FABRICATION OF STRUCTURES

Patent #:	6668078	Issue Dt:	12/23/2003	Application #:	09676883	Filing Dt:	09/29/2000
Title:	SYSTEM AND METHOD FOR SEGMENTATION OF IMAGES OF OBJECTS THAT ARE OCCLUDED BY A SEMI-TRANSPARENT MATERIAL

Patent #:	6277661	Issue Dt:	08/21/2001	Application #:	09677955	Filing Dt:	10/02/2000
Title:	Method for detecting sloped contact holes using a critical-dimension waveform

Patent #:	6538299	Issue Dt:	03/25/2003	Application #:	09678315	Filing Dt:	10/03/2000
Title:	SILICON-ON-INSULATOR (SOI) TRENCH PHOTODIODE

Patent #:	6413390	Issue Dt:	07/02/2002	Application #:	09678503	Filing Dt:	10/02/2000
Title:	PLATING SYSTEM WITH REMOTE SECONDARY ANODE FOR SEMICONDUCTOR MANUFACTURING

Patent #:	6419785	Issue Dt:	07/16/2002	Application #:	09678633	Filing Dt:	10/03/2000
Title:	ENDPOINT DETECTION BY CHEMICAL REACTION

Patent #:	7092779	Issue Dt:	08/15/2006	Application #:	09678637	Filing Dt:	10/03/2000
Title:	AUTOMATED MATERIAL HANDLING SYSTEM FOR A MANUFACTURING FACILITY DIVIDED INTO SEPARATE FABRICATION AREAS

Patent #:	6725439	Issue Dt:	04/20/2004	Application #:	09678742	Filing Dt:	10/04/2000
Title:	METHOD OF AUTOMATED DESIGN AND CHECKING FOR ESD ROBUSTNESS

Patent #:	6501177	Issue Dt:	12/31/2002	Application #:	09678946	Filing Dt:	10/03/2000
Title:	ATOMIC LAYER BARRIER LAYER FOR INTEGRATED CIRCUIT INTERCONNECTS

Patent #:	6343044	Issue Dt:	01/29/2002	Application #:	09679124	Filing Dt:	10/04/2000
Title:	Super low-power generator system for embedded applications

Patent #:	6465334	Issue Dt:	10/15/2002	Application #:	09679369	Filing Dt:	10/05/2000
Title:	Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors

Patent #:	6451693	Issue Dt:	09/17/2002	Application #:	09679370	Filing Dt:	10/05/2000
Title:	DOUBLE SILICIDE FORMATION IN POLYSILICON GATE WITHOUT SILICIDE IN SOURCE/DRAIN EXTENSIONS

Patent #:	6483154	Issue Dt:	11/19/2002	Application #:	09679373	Filing Dt:	10/05/2000
Title:	NITROGEN OXIDE PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING

Patent #:	6383880	Issue Dt:	05/07/2002	Application #:	09679374	Filing Dt:	10/05/2000
Title:	NH3/N2-PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING

Patent #:	6545370	Issue Dt:	04/08/2003	Application #:	09679375	Filing Dt:	10/05/2000
Title:	COMPOSITE SILICON NITRIDE SIDEWALL SPACERS FOR REDUCED NICKEL SILICIDE BRIDGING

Patent #:	6436823	Issue Dt:	08/20/2002	Application #:	09679738	Filing Dt:	10/05/2000
Title:	METHOD FOR FORMING A TIN LAYER ON TOP OF A METAL SILICIDE LAYER IN A SEMICONDUCTOR STRUCTURE AND STRUCTURE FORMED

Patent #:	6816826	Issue Dt:	11/09/2004	Application #:	09679780	Filing Dt:	10/05/2000
Title:	FULLY EXHIBITING ASYNCHRONOUS BEHAVIOR IN A LOGIC NETWORK SIMULATION

Patent #:	6300203	Issue Dt:	10/09/2001	Application #:	09679872	Filing Dt:	10/05/2000
Title:	Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors

Patent #:	6521529	Issue Dt:	02/18/2003	Application #:	09679880	Filing Dt:	10/05/2000
Title:	HDP TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING

Patent #:	6587530	Issue Dt:	07/01/2003	Application #:	09680819	Filing Dt:	10/05/2000
Title:	METHOD AND APPARATUS FOR SIGNAL INTEGRITY VERIFICATION

Patent #:	6545333	Issue Dt:	04/08/2003	Application #:	09681541	Filing Dt:	04/25/2001
Title:	LIGHT CONTROLLED SILICON ON INSULATOR DEVICE

Patent #:	6441462	Issue Dt:	08/27/2002	Application #:	09682016	Filing Dt:	07/10/2001
Title:	SELF-ALIGNED SIGE NPN WITH IMPROVED ESD ROBUSTNESS USING WIDE EMITTER POLYSILICON EXTENSION

Patent #:	6651229	Issue Dt:	11/18/2003	Application #:	09682707	Filing Dt:	10/09/2001
Publication #:	US20030070150	Pub Dt:	04/10/2003
Title:	GENERATION OF REFINED SWITCHING WINDOWS IN STATIC TIMING ANALYSIS

Patent #:	6469350	Issue Dt:	10/22/2002	Application #:	09682868	Filing Dt:	10/26/2001
Title:	ACTIVE WELL SCHEMES FOR SOI TECHNOLOGY

Patent #:	6834360	Issue Dt:	12/21/2004	Application #:	09683091	Filing Dt:	11/16/2001
Publication #:	US20030097615	Pub Dt:	05/22/2003
Title:	ON-CHIP LOGIC ANALYZER

Patent #:	6433609	Issue Dt:	08/13/2002	Application #:	09683105	Filing Dt:	11/19/2001
Title:	DOUBLE-GATE LOW POWER SOI ACTIVE CLAMP NETWORK FOR SINGLE POWER SUPPLY AND MULTIPLE POWER SUPPLY APPLICATIONS

Patent #:	6700163	Issue Dt:	03/02/2004	Application #:	09683278	Filing Dt:	12/07/2001
Publication #:	US20030107091	Pub Dt:	06/12/2003
Title:	SELECTIVE SILICIDE BLOCKING

Patent #:	6800905	Issue Dt:	10/05/2004	Application #:	09683328	Filing Dt:	12/14/2001
Publication #:	US20030113970	Pub Dt:	06/19/2003
Title:	IMPLANTED ASYMMETRIC DOPED POLYSILICON GATE FINFET

Patent #:	6774437	Issue Dt:	08/10/2004	Application #:	09683486	Filing Dt:	01/07/2002
Publication #:	US20030127690	Pub Dt:	07/10/2003
Title:	FIN-BASED DOUBLE POLY DYNAMIC THRESHOLD CMOS FET WITH SPACER GATE AND METHOD OF FABRICATION

Patent #:	6670654	Issue Dt:	12/30/2003	Application #:	09683498	Filing Dt:	01/09/2002
Publication #:	US20030129802	Pub Dt:	07/10/2003
Title:	SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR WITH CARBON INCORPORATION

Patent #:	6583469	Issue Dt:	06/24/2003	Application #:	09683626	Filing Dt:	01/28/2002
Title:	SELF-ALIGNED DOG-BONE STRUCTURE FOR FINFET APPLICATIONS AND METHODS TO FABRICATE THE SAME

Patent #:	6624478	Issue Dt:	09/23/2003	Application #:	09683656	Filing Dt:	01/30/2002
Publication #:	US20030141548	Pub Dt:	07/31/2003
Title:	HIGH MOBILITY TRANSISTORS IN SOI AND METHOD FOR FORMING

Patent #:	7353156	Issue Dt:	04/01/2008	Application #:	09683677	Filing Dt:	02/01/2002
Publication #:	US20030149946	Pub Dt:	08/07/2003
Title:	METHOD OF SWITCHING EXTERNAL MODELS IN AN AUTOMATED SYSTEM-ON-CHIP INTEGRATED CIRCUIT DESIGN VERIFICATION SYSTEM

Patent #:	6518614	Issue Dt:	02/11/2003	Application #:	09683809	Filing Dt:	02/19/2002
Title:	EMBEDDED ONE-TIME PROGRAMMABLE NON-VOLATILE MEMORY USING PROMPT SHIFT DEVICE

Patent #:	6724029	Issue Dt:	04/20/2004	Application #:	09683831	Filing Dt:	02/21/2002
Publication #:	US20030155599	Pub Dt:	08/21/2003
Title:	TWIN-CELL FLASH MEMORY STRUCTURE AND METHOD

Patent #:	6744079	Issue Dt:	06/01/2004	Application #:	09683983	Filing Dt:	03/08/2002
Publication #:	US20030170960	Pub Dt:	09/11/2003
Title:	OPTIMIZED BLOCKING IMPURITY PLACEMENT FOR SIGE HBTS

Patent #:	7384854	Issue Dt:	06/10/2008	Application #:	09683985	Filing Dt:	03/08/2002
Publication #:	US20030168701	Pub Dt:	09/11/2003
Title:	METHOD OF FORMING LOW CAPACITANCE ESD ROBUST DIODES

Patent #:	6586818	Issue Dt:	07/01/2003	Application #:	09683986	Filing Dt:	03/08/2002
Title:	SELF-ALIGNED SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR DEVICE WITH ELECTROSTATIC DISCHARGE CREVICE COVER FOR SALICIDE DISPLACEMENT

Patent #:	6784516	Issue Dt:	08/31/2004	Application #:	09684463	Filing Dt:	10/06/2000
Title:	INSULATIVE CAP FOR LASER FUSING

Patent #:	6624651	Issue Dt:	09/23/2003	Application #:	09684849	Filing Dt:	10/06/2000
Title:	KERF CIRCUIT FOR MODELING OF BEOL CAPACITANCES

Patent #:	6468888	Issue Dt:	10/22/2002	Application #:	09685974	Filing Dt:	10/10/2000
Title:	METHOD FOR FORMING POLYSILICON-GERMANIUM GATE IN CMOS TRANSISTOR AND DEVICE MADE THEREBY

Patent #:	6551870	Issue Dt:	04/22/2003	Application #:	09686352	Filing Dt:	10/10/2000
Title:	METHOD OF FABRICATING ULTRA SHALLOW JUNCTION CMOS TRANSISTORS WITH NITRIDE DISPOSABLE SPACER

Patent #:	6380041	Issue Dt:	04/30/2002	Application #:	09686476	Filing Dt:	10/10/2000
Title:	SEMICONDUCTOR WITH LATERALLY NON-UNIFORM CHANNEL DOPING PROFILE AND MANUFACTURING METHOD THEREFOR

Patent #:	6816498	Issue Dt:	11/09/2004	Application #:	09686593	Filing Dt:	10/10/2000
Title:	METHOD FOR AGING TABLE ENTRIES IN A TABLE SUPPORTING MULTI-KEY SEARCHES

Patent #:	6570568	Issue Dt:	05/27/2003	Application #:	09686720	Filing Dt:	10/10/2000
Title:	SYSTEM AND METHOD FOR THE COORDINATED SIMPLIFICATION OF SURFACE AND WIRE-FRAME DESCRIPTIONS OF A GEOMETRIC MODEL

Patent #:	6700203	Issue Dt:	03/02/2004	Application #:	09686742	Filing Dt:	10/11/2000
Title:	SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION

Patent #:	6472755	Issue Dt:	10/29/2002	Application #:	09688928	Filing Dt:	10/17/2000
Title:	SEMICONDUCTOR DEVICE COMPRISING COPPER INTERCONNECTS WITH REDUCED IN-LINE COPPER DIFFUSION

Patent #:	6506638	Issue Dt:	01/14/2003	Application #:	09689063	Filing Dt:	10/12/2000
Title:	VERTICAL DOUBLE GATE TRANSISTOR STRUCTURE

Patent #:	6350653	Issue Dt:	02/26/2002	Application #:	09689096	Filing Dt:	10/12/2000
Title:	Embedded dram on silicon-on-insulator substrate

Patent #:	6351023	Issue Dt:	02/26/2002	Application #:	09689660	Filing Dt:	10/13/2000
Title:	Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same

Patent #:	6312998	Issue Dt:	11/06/2001	Application #:	09690073	Filing Dt:	10/16/2000
Title:	Field effect transistor with spacers that are removable with preservation of the gate dielectric

Patent #:	6554951	Issue Dt:	04/29/2003	Application #:	09690704	Filing Dt:	10/16/2000
Title:	CHEMICAL-MECHANICAL POLISHING PAD CONDITIONING SYSTEM AND METHOD

Patent #:	6440867	Issue Dt:	08/27/2002	Application #:	09691180	Filing Dt:	10/19/2000
Title:	METAL GATE WITH PVD AMORPHOUS SILICON AND SILICIDE FOR CMOS DEVICES AND METHOD OF MAKING THE SAME WITH A REPLACEMENT GATE PROCESS

Patent #:	6528362	Issue Dt:	03/04/2003	Application #:	09691181	Filing Dt:	10/19/2000
Title:	METAL GATE WITH CVD AMORPHOUS SILICON LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	6436840	Issue Dt:	08/20/2002	Application #:	09691188	Filing Dt:	10/19/2000
Title:	METAL GATE WITH CVD AMORPHOUS SILICON LAYER AND A BARRIER LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	6392280	Issue Dt:	05/21/2002	Application #:	09691224	Filing Dt:	10/19/2000
Title:	METAL GATE WITH PVD AMORPHOUS SILICON LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	6589866	Issue Dt:	07/08/2003	Application #:	09691226	Filing Dt:	10/19/2000
Title:	METAL GATE WITH PVD AMORPHOUS SILICON LAYER HAVING IMPLANTED DOPANTS FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	6642590	Issue Dt:	11/04/2003	Application #:	09691227	Filing Dt:	10/19/2000
Title:	METAL GATE WITH PVD AMORPHOUS SILICON LAYER AND BARRIER LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	6297107	Issue Dt:	10/02/2001	Application #:	09691228	Filing Dt:	10/19/2000
Title:	High dielectric constant materials as gate dielectrics

Patent #:	6440868	Issue Dt:	08/27/2002	Application #:	09691259	Filing Dt:	10/19/2000
Title:	METAL GATE WITH CVD AMORPHOUS SILICON LAYER AND SILICIDE FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS

Patent #:	7163864	Issue Dt:	01/16/2007	Application #:	09691353	Filing Dt:	10/18/2000
Title:	METHOD OF FABRICATING SEMICONDUCTOR SIDE WALL FIN

100

Patent #:	6735664	Issue Dt:	05/11/2004	Application #:	09691377	Filing Dt:	10/18/2000
Title:	INDIRECT ADDRESSING METHOD AND DEVICE INCORPORATING THE SAME

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

440 STONE BREAK ROAD EXTENSION

MALTA, NEW YORK 12020

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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