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06/14/2005
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10185495
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10/26/2004
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10185547
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06/28/2002
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12/05/2002
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06/29/2004
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06/28/2002
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01/09/2003
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04/12/2005
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06/27/2002
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06/27/2006
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06/28/2002
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08/24/2004
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07/01/2002
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01/01/2004
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03/02/2004
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10188173
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07/01/2002
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02/06/2007
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07/03/2002
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11/28/2002
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09/07/2004
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07/02/2002
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09/28/2004
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01/08/2004
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08/10/2004
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10190405
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07/03/2002
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11/14/2002
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05/17/2005
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07/10/2002
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11/28/2002
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04/12/2005
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07/09/2002
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01/15/2004
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02/24/2004
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10192386
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07/09/2002
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12/05/2002
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03/20/2007
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07/15/2002
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02/13/2003
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06/17/2003
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10196407
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07/16/2002
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01/11/2005
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07/16/2002
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01/22/2004
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11/02/2004
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07/16/2002
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01/22/2004
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03/06/2007
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07/15/2002
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01/23/2003
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09/23/2003
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07/17/2002
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09/21/2004
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07/16/2002
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01/22/2004
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09/06/2005
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07/17/2002
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01/22/2004
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07/20/2004
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07/18/2002
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01/22/2004
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SEMICONDUCTOR WAFER INCLUDING A LOW DIELECTRIC CONSTANT THERMOSETTING POLYMER FILM AND METHOD OF MAKING SAME
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09/14/2004
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10200479
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07/19/2002
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01/22/2004
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INTERPOSER CAPACITOR BUILT ON SILICON WAFER AND JOINED TO A CERAMIC SUBSTRATE
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08/31/2004
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10200822
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07/22/2002
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01/22/2004
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05/06/2008
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07/23/2002
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12/19/2002
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01/25/2005
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01/29/2004
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12/28/2004
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07/24/2002
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01/29/2004
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08/31/2004
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07/25/2002
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12/05/2002
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11/16/2004
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07/25/2002
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01/29/2004
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09/28/2004
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07/24/2002
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11/28/2002
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12/09/2003
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07/24/2002
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03/27/2007
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05/25/2004
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07/29/2002
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01/29/2004
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07/27/2004
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07/29/2002
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01/29/2004
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05/25/2004
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07/29/2002
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01/02/2003
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08/10/2004
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07/29/2002
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02/12/2004
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03/09/2004
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07/30/2002
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08/21/2003
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07/27/2004
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07/30/2002
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11/23/2004
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07/30/2002
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08/28/2003
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12/30/2003
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07/31/2002
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01/25/2005
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07/31/2002
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02/05/2004
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02/14/2006
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07/31/2002
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12/16/2003
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07/31/2002
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03/30/2004
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07/31/2002
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12/14/2004
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08/01/2002
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03/27/2003
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12/09/2003
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07/30/2002
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06/15/2004
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10210632
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07/30/2002
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02/05/2004
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01/06/2004
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10210637
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07/31/2002
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08/28/2003
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SEMICONDUCTOR DEVICE HAVING INCREASED METAL SILICIDE PORTIONS AND METHOD OF FORMING THE SEMICONDUCTOR
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08/17/2004
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10210640
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07/31/2002
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IDENTIFYING A CAUSE OF A FAULT BASED ON A PROCESS CONTROLLER OUTPUT
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05/18/2004
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10210753
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07/31/2002
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METHOD AND APPARATUS FOR SCHEDULING BASED ON STATE ESTIMATION UNCERTAINTIES
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08/31/2004
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10212237
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08/06/2002
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LASER THERMAL ANNEALING METHOD FOR HIGH DIELECTRIC CONSTANT GATE OXIDE FILMS
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10/12/2004
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10212938
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08/05/2002
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02/05/2004
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METHOD FOR BLOCKING IMPLANTS FROM THE GATE OF AN ELECTRONIC DEVICE VIA PLANARIZING FILMS
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01/02/2007
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10212950
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08/06/2002
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PREVENTION OF COUNTERFEIT MARKINGS ON SEMICONDUCTOR DEVICES
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02/03/2004
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10212983
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08/05/2002
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DUAL DAMASCENE TRENCH DEPTH MONITORING
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11/11/2003
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10213646
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08/06/2002
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12/19/2002
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09/07/2004
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10213882
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08/07/2002
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02/12/2004
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METHODOLOGY AND APPARATUS USING REAL-TIME OPTICAL SIGNAL FOR WAFER-LEVEL DEVICE DIELECTRICAL RELIABILITY STUDIES
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11/30/2004
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10214510
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08/07/2002
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02/12/2004
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TRIPLE OXIDE FILL FOR TRENCH ISOLATION
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11/08/2005
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08/07/2002
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02/12/2004
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DISCRETE NANO-TEXTURED STRUCTURES IN BIOMOLECULAR ARRAYS, AND METHOD OF USE
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06/15/2004
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10215075
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08/08/2002
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PREVENTION OF PARAMETRIC OR FUNCTIONAL CHANGES TO SILICON SEMICONDUCTOR DEVICE PROPERTIES DURING X-RAY INSPECTION
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10/05/2004
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10215121
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08/08/2002
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02/12/2004
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SEMICONDUCTOR DEVICE HAVING AMORPHOUS BARRIER LAYER FOR COPPER METALLURGY
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11/04/2003
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10215171
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08/08/2002
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A method of manufacturing a silicide MOSFET architecture
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06/24/2003
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Application #:
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10217233
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Filing Dt:
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08/09/2002
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Title:
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INTEGRATED CIRCUIT PACKAGING WITH TAPERED STRIPLINES OF CONSTANT IMPEDANCE
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10217360
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Filing Dt:
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08/09/2002
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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MASK CLAMPING DEVICE
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Patent #:
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Issue Dt:
|
01/24/2006
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Application #:
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10217730
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Filing Dt:
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08/13/2002
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Title:
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ION IMPLANTATION TO MODULATE AMORPHOUS CARBON STRESS
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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10217822
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Filing Dt:
|
08/12/2002
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Title:
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MULTI-STEP TRANSMISSION LINE FOR MULTILAYER PACKAGING
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Patent #:
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Issue Dt:
|
09/09/2003
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Application #:
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10218292
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Filing Dt:
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08/14/2002
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Title:
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INTERCONNECT STRUCTURES CONTAINING STRESS ADJUSTMENT CAP LAYER
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Patent #:
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Issue Dt:
|
08/31/2004
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Application #:
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10218352
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Filing Dt:
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08/14/2002
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Title:
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DIFFERENTIAL AMPLIFIER WITH INPUT GATE OXIDE BREAKDOWN AVOIDANCE
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Patent #:
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Issue Dt:
|
09/23/2003
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Application #:
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10218532
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Filing Dt:
|
08/13/2002
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Title:
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METHOD OF FABRICATING A SEMICONDUCTOR DEVICE BY CALCIUM DOPING A COPPER SURFACE USING A CHEMICAL SOLUTION
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Patent #:
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Issue Dt:
|
12/23/2003
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Application #:
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10222248
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Filing Dt:
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08/16/2002
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Title:
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ETCH DAMAGE REPAIR WITH THERMAL ANNEALING
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10224876
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Filing Dt:
|
08/21/2002
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Title:
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MATERIALS AND METHODS FOR SUBLITHOGRAPHIC PATTERNING OF GATE STRUCTURES IN INTEGRATED CIRCUIT DEVICES
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|
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Patent #:
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Issue Dt:
|
12/14/2004
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Application #:
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10225860
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Filing Dt:
|
08/22/2002
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Publication #:
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Pub Dt:
|
01/02/2003
| | | | |
Title:
|
STRESS-RELIEVING HEATSINK STRUCTURE AND METHOD OF ATTACHMENT TO AN ELECTRONIC PACKAGE
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|
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Patent #:
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Issue Dt:
|
04/18/2006
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Application #:
|
10226802
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Filing Dt:
|
08/21/2002
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Title:
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SELECTIVE ETCH FOR UNIFORM METAL TRACE EXPOSURE AND MILLING USING FOCUSED ION BEAM SYSTEM
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|
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Patent #:
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|
Issue Dt:
|
07/15/2003
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Application #:
|
10227382
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Filing Dt:
|
08/26/2002
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Title:
|
BOAT FOR CLEANING BALL GRID ARRAY PACKAGES
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Patent #:
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Issue Dt:
|
04/27/2004
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Application #:
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10227404
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Filing Dt:
|
08/23/2002
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
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STRUCTURE AND METHOD OF FABRICATING EMBEDDED DRAM HAVING A VERTICAL DEVICE ARRAY AND A BORDERED BITLINE CONTACT
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|
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Patent #:
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|
Issue Dt:
|
02/20/2007
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Application #:
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10227753
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Filing Dt:
|
08/26/2002
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Title:
|
METHOD AND APPARATUS FOR DATA STACKIFICATION FOR RUN-TO-RUN CONTROL
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|
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Patent #:
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Issue Dt:
|
11/23/2004
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Application #:
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10227926
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Filing Dt:
|
08/26/2002
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
EVANESCENT WAVE TUNNELING OPTICAL SWITCH AND NETWORK
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|
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Patent #:
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|
Issue Dt:
|
01/16/2007
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Application #:
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10227995
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Filing Dt:
|
08/26/2002
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
CONCURRENT FIN-FET AND THICK-BODY DEVICE FABRICATION
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|
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Patent #:
|
|
Issue Dt:
|
12/02/2003
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Application #:
|
10228045
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Filing Dt:
|
08/27/2002
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Publication #:
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Pub Dt:
|
01/02/2003
| | | | |
Title:
|
METAL GATE STACK WITH ETCH STOP LAYER HAVING IMPLANTED METAL SPECIES
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|
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Patent #:
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|
Issue Dt:
|
05/18/2004
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Application #:
|
10228142
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Filing Dt:
|
08/26/2002
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
DIRECT READ OF DRAM CELL USING HIGH TRANSFER RATIO
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|
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Patent #:
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|
Issue Dt:
|
03/15/2005
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Application #:
|
10229226
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Filing Dt:
|
08/27/2002
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Title:
|
FAULT DETECTION SYSTEM WITH REAL-TIME DATABASE
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|
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Patent #:
|
|
Issue Dt:
|
07/20/2004
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Application #:
|
10229716
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Filing Dt:
|
08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
EXTRACTING WIRING PARASITICS FOR FILTERED INTERCONNECTIONS IN AN INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
08/12/2003
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Application #:
|
10230171
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Filing Dt:
|
08/29/2002
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Title:
|
CHEMICAL TREATMENT TO STRENGTHEN PHOTORESISTS TO PREVENT PATTERN COLLAPSE
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|
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Patent #:
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|
Issue Dt:
|
08/24/2004
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Application #:
|
10230198
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Filing Dt:
|
08/29/2002
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Title:
|
LASER THERMAL OXIDATION TO FORM ULTRA-THIN GATE OXIDE
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|
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Patent #:
|
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Issue Dt:
|
08/31/2004
|
Application #:
|
10230714
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Filing Dt:
|
08/29/2002
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Title:
|
RETICLE DEFECT PRINTABILITY VERIFICATION BY RESIST LATENT IMAGE COMPARISON
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|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10230715
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Filing Dt:
|
08/29/2002
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Title:
|
METHOD AND APPARATUS FOR DETECTION OF A POWER MANAGEMENT STATE BASED ON A POWER CONTROL SIGNAL CONTROLLING MAIN POWER TO THE COMPUTER SYSTEM AND A POWER CONTROL SIGNAL CONTROLLING POWER TO SYSTEM MEMORY AND WAKING UP THEREFROM
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|
|
Patent #:
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|
Issue Dt:
|
04/21/2009
|
Application #:
|
10230775
|
Filing Dt:
|
08/29/2002
|
Title:
|
METHOD FOR FORMING INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2005
|
Application #:
|
10230794
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Filing Dt:
|
08/29/2002
|
Title:
|
FORMATION OF AMORPHOUS CARBON ARC STACK HAVING GRADED TRANSITION BETWEEN AMORPHOUS CARBON AND ARC MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10230925
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Filing Dt:
|
08/29/2002
|
Title:
|
SYSTEM AND METHOD FOR STORING PERFORMANCE-ENHANCING DATA IN MEMORY SPACE FREED BY DATA COMPRESSION
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|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
10231133
|
Filing Dt:
|
08/30/2002
|
Title:
|
BPSG, SA-CVD LINER/P-HDP GAP FILL
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|
|
Patent #:
|
|
Issue Dt:
|
02/07/2006
|
Application #:
|
10231560
|
Filing Dt:
|
08/30/2002
|
Title:
|
THERMALLY CONDUCTIVE INTEGRATED CIRCUIT MOUNTING STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10231561
|
Filing Dt:
|
08/30/2002
|
Title:
|
METHOD AND APPARATUS FOR REDUCING SCHEDULING CONFLICTS FOR A RESOURCE
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|
|
Patent #:
|
|
Issue Dt:
|
09/30/2008
|
Application #:
|
10231764
|
Filing Dt:
|
08/28/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
WIRELESS INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
10231910
|
Filing Dt:
|
08/30/2002
|
Title:
|
PROCESS CONTROL BASED ON TOOL HEALTH DATA
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|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
10232300
|
Filing Dt:
|
08/30/2002
|
Title:
|
USE OF ETHERNET FRAMES FOR EXCHANGING CONTROL AND STATUS INFORMATION WITHIN AN HPNA CONTROLLER
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|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10234238
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Filing Dt:
|
09/05/2002
|
Title:
|
NITROGEN OXIDE PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING
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|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10234755
|
Filing Dt:
|
09/04/2002
|
Title:
|
FAULT DETECTION AND CLASSIFICATION BASED ON CALCULATING DISTANCES BETWEEN DATA POINTS
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|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10235008
|
Filing Dt:
|
09/03/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
LOW STRAIN CHIP REMOVAL APPARATUS
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|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10235147
|
Filing Dt:
|
09/05/2002
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
METHOD TO CONTROL DEVICE THRESHOLD OF SOI MOSFET'S
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10235169
|
Filing Dt:
|
09/05/2002
|
Title:
|
POLYSILICON BACK-GATED SOI MOSFET FOR DYNAMIC THRESHOLD VOLTAGE CONTROL
|
|