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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/14/2005
Application #:
10185495
Filing Dt:
06/28/2002
Title:
PREDICTING PROCESS EXCURSIONS BASED UPON TOOL STATE VARIABLES
2
Patent #:
Issue Dt:
10/26/2004
Application #:
10185547
Filing Dt:
06/28/2002
Publication #:
Pub Dt:
12/05/2002
Title:
METHOD AND STRUCTURE FOR CONTROLLING THE INTERFACE ROUGHNESS OF COBALT DISILICIDE
3
Patent #:
Issue Dt:
06/29/2004
Application #:
10185580
Filing Dt:
06/28/2002
Publication #:
Pub Dt:
01/09/2003
Title:
CONTROL OF BURIED OXIDE QUALITY IN LOW DOSE SIMOX
4
Patent #:
Issue Dt:
04/12/2005
Application #:
10185818
Filing Dt:
06/27/2002
Title:
METHOD FOR DETECTING CMP ENDPOINT IN ACIDIC SLURRIES
5
Patent #:
Issue Dt:
06/27/2006
Application #:
10186145
Filing Dt:
06/28/2002
Title:
METHOD AND APPARATUS FOR IMPLEMENTING COMPETING CONTROL MODELS
6
Patent #:
Issue Dt:
08/24/2004
Application #:
10187572
Filing Dt:
07/01/2002
Publication #:
Pub Dt:
01/01/2004
Title:
METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC
7
Patent #:
Issue Dt:
03/02/2004
Application #:
10188173
Filing Dt:
07/01/2002
Title:
METHOD TO REDUCE TIME TO DYNAMIC STEADY-STATE CONDITION
8
Patent #:
Issue Dt:
02/06/2007
Application #:
10188686
Filing Dt:
07/03/2002
Publication #:
Pub Dt:
11/28/2002
Title:
ULTRA THIN, SINGLE PHASE, DIFFUSION BARRIER FOR METAL CONDUCTORS
9
Patent #:
Issue Dt:
09/07/2004
Application #:
10189048
Filing Dt:
07/02/2002
Title:
METHOD OF FORMING SILICIDE LAYERS OVER A PLURALITY OF SEMICONDUCTOR DEVICES
10
Patent #:
Issue Dt:
09/28/2004
Application #:
10190372
Filing Dt:
07/02/2002
Publication #:
Pub Dt:
01/08/2004
Title:
WORDLINE LATCHING IN SEMICONDUCTOR MEMORIES
11
Patent #:
Issue Dt:
08/10/2004
Application #:
10190405
Filing Dt:
07/03/2002
Publication #:
Pub Dt:
11/14/2002
Title:
METHOD AND STRUCTURES FOR DUAL DEPTH OXYGEN LAYERS IN SILICON-ON-INSULATOR PROCESSES
12
Patent #:
Issue Dt:
05/17/2005
Application #:
10191061
Filing Dt:
07/10/2002
Publication #:
Pub Dt:
11/28/2002
Title:
THERMOPLASTIC ADHESIVE PREFORM FOR HEAT SINK ATTACHMENT
13
Patent #:
Issue Dt:
04/12/2005
Application #:
10191212
Filing Dt:
07/09/2002
Publication #:
Pub Dt:
01/15/2004
Title:
METHOD TO DETECT SYSTEMATIC DEFECTS IN VLSI MANUFACTURING
14
Patent #:
Issue Dt:
02/24/2004
Application #:
10192386
Filing Dt:
07/09/2002
Publication #:
Pub Dt:
12/05/2002
Title:
EFFECTIVE CHANNEL LENGTH CONTROL USING ION IMPLANT FEED FORWARD
15
Patent #:
Issue Dt:
03/20/2007
Application #:
10195178
Filing Dt:
07/15/2002
Publication #:
Pub Dt:
02/13/2003
Title:
INCREASED DAMPING OF MAGNETIZATION IN MAGNETIC MATERIALS
16
Patent #:
Issue Dt:
06/17/2003
Application #:
10196407
Filing Dt:
07/16/2002
Title:
USING SCATTEROMETRY TO MEASURE RESIST THICKNESS AND CONTROL IMPLANT
17
Patent #:
Issue Dt:
01/11/2005
Application #:
10196611
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
USE OF HYDROGEN IMPLANTATION TO IMPROVE MATERIAL PROPERTIES OF SILICON-GERMANIUM-ON-INSULATOR MATERIAL MADE BY THERMAL DIFFUSION
18
Patent #:
Issue Dt:
11/02/2004
Application #:
10196670
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD FOR CREATING STANDARD VHDL TEST ENVIRONMENTS
19
Patent #:
Issue Dt:
03/06/2007
Application #:
10196702
Filing Dt:
07/15/2002
Publication #:
Pub Dt:
01/23/2003
Title:
SIMULATION MONITORS BASED ON TEMPORAL FORMULAS
20
Patent #:
Issue Dt:
09/23/2003
Application #:
10196797
Filing Dt:
07/17/2002
Title:
SYSTEM AND METHOD FOR FACILITATING SELECTION OF OPTIMIZED OPTICAL PROXIMITY CORRECTION
21
Patent #:
Issue Dt:
09/21/2004
Application #:
10197005
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD AND APPARATUS FOR ACCURATE, MICRO-CONTACT PRINTING
22
Patent #:
Issue Dt:
09/06/2005
Application #:
10197661
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
01/22/2004
Title:
ELECTRONIC DEVICE SUBSTRATE ASSEMBLY WITH MULTILAYER IMPERMEABLE BARRIER AND METHOD OF MAKING
23
Patent #:
Issue Dt:
07/20/2004
Application #:
10199287
Filing Dt:
07/18/2002
Publication #:
Pub Dt:
01/22/2004
Title:
SEMICONDUCTOR WAFER INCLUDING A LOW DIELECTRIC CONSTANT THERMOSETTING POLYMER FILM AND METHOD OF MAKING SAME
24
Patent #:
Issue Dt:
09/14/2004
Application #:
10200479
Filing Dt:
07/19/2002
Publication #:
Pub Dt:
01/22/2004
Title:
INTERPOSER CAPACITOR BUILT ON SILICON WAFER AND JOINED TO A CERAMIC SUBSTRATE
25
Patent #:
Issue Dt:
08/31/2004
Application #:
10200822
Filing Dt:
07/22/2002
Publication #:
Pub Dt:
01/22/2004
Title:
CONTROL OF BURIED OXIDE IN SIMOX
26
Patent #:
Issue Dt:
05/06/2008
Application #:
10202069
Filing Dt:
07/23/2002
Publication #:
Pub Dt:
12/19/2002
Title:
PROBE STRUCTURE HAVING A PLURALITY OF DISCRETE INSULATED PROBE TIPS PROJECTING FROM A SUPPORT SURFACE, APPARATUS FOR USE THEREOF AND METHODS OF FABRICATION THEREOF
27
Patent #:
Issue Dt:
01/25/2005
Application #:
10202134
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
SACRIFICIAL METAL SPACER DAMASCENE PROCESS
28
Patent #:
Issue Dt:
12/28/2004
Application #:
10202329
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
SOI WAFERS WITH 30-100 A BURIED OXIDE (BOX) CREATED BY WAFER BONDING USING 30-100 A THIN OXIDE AS BONDING LAYER
29
Patent #:
Issue Dt:
08/31/2004
Application #:
10205102
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
12/05/2002
Title:
METHOD AND STRUCTURE FOR REPAIRING OR MODIFYING SURFACE CONNECTIONS ON CIRCUIT BOARDS
30
Patent #:
Issue Dt:
11/16/2004
Application #:
10205136
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD OF MAKING A CIRCUITIZED SUBSTRATE AND THE RESULTANT CIRCUITIZED SUBSTRATE
31
Patent #:
Issue Dt:
09/28/2004
Application #:
10205143
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
11/28/2002
Title:
METHOD FOR MAKING MULTIPLE THRESHOLD VOLTAGE FET USING MULTIPLE WORK-FUNCTION GATE MATERIALS
32
Patent #:
Issue Dt:
12/09/2003
Application #:
10205278
Filing Dt:
07/24/2002
Title:
LOW DIELECTRIC CONSTANT POLYMER AND MONOMERS USED IN THEIR FORMATION
33
Patent #:
Issue Dt:
03/27/2007
Application #:
10205780
Filing Dt:
07/26/2002
Title:
SEMICONDUCTOR DIE ANALYSIS AS A FUNCTION OF OPTICAL REFLECTIONS FROM THE DIE
34
Patent #:
Issue Dt:
05/25/2004
Application #:
10207352
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
ENHANCED T-GATE STRUCTURE FOR MODULATION DOPED FIELD EFFECT TRANSISTORS
35
Patent #:
Issue Dt:
07/27/2004
Application #:
10207366
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
MULTIPLE SUBARRAY DRAM HAVING A SINGLE SHARED SENSE AMPLIFIER
36
Patent #:
Issue Dt:
05/25/2004
Application #:
10207509
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/02/2003
Title:
APPARATUS FOR CLEANING FILTERS
37
Patent #:
Issue Dt:
08/10/2004
Application #:
10207525
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
02/12/2004
Title:
DYNAMIC TARGETING FOR A PROCESS CONTROL SYSTEM
38
Patent #:
Issue Dt:
03/09/2004
Application #:
10208308
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD OF FORMING LAYERS OF OXIDE ON A SURFACE OF A SUBSTRATE
39
Patent #:
Issue Dt:
07/27/2004
Application #:
10208370
Filing Dt:
07/30/2002
Title:
MATERIALS AND METHODS FOR SUB-LITHOGRAPHIC PATTERNING OF CONTACT, VIA, AND TRENCH STRUCTURES IN INTEGRATED CIRCUIT DEVICES
40
Patent #:
Issue Dt:
11/23/2004
Application #:
10208564
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
08/28/2003
Title:
METHOD AND SYSTEM FOR CONTROLLING AN ELECTRICAL PROPERTY OF A FIELD EFFECT TRANSISTOR
41
Patent #:
Issue Dt:
12/30/2003
Application #:
10209141
Filing Dt:
07/31/2002
Title:
METHOD AND APPARATUS FOR SENSING A PROGRAMMING STATE OF FUSES
42
Patent #:
Issue Dt:
01/25/2005
Application #:
10209144
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD AND APPARATUS FOR DETECTING DEVICES THAT CAN LATCHUP
43
Patent #:
Issue Dt:
02/14/2006
Application #:
10209484
Filing Dt:
07/31/2002
Title:
METHOD AND APPARATUS FOR IMPEDANCE MATCHING IN SYSTEMS CONFIGURED FOR MULTIPLE PROCESSORS
44
Patent #:
Issue Dt:
12/16/2003
Application #:
10209789
Filing Dt:
07/31/2002
Title:
METHOD AND APPARATUS FOR OPTIMIZING DOWNSTREAM UNIFORMITY
45
Patent #:
Issue Dt:
03/30/2004
Application #:
10209844
Filing Dt:
07/31/2002
Title:
DE BROGLIE MICROSCOPE
46
Patent #:
Issue Dt:
12/14/2004
Application #:
10210173
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METHOD FOR FORMING A POROUS DIELECTRIC MATERIAL LAYER IN A SEMICONDUCTOR DEVICE AND DEVICE FORMED
47
Patent #:
Issue Dt:
12/09/2003
Application #:
10210631
Filing Dt:
07/30/2002
Title:
LOW IMPEDANCE POWER DISTRIBUTION STRUCTURE FOR A SEMICONDUCTOR CHIP PACKAGE
48
Patent #:
Issue Dt:
06/15/2004
Application #:
10210632
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD OF FABRICATING A PATTERNED SOI EMBEDDED DRAM/EDRAM HAVING A VERTICAL DEVICE CELL AND DEVICE FORMED THEREBY
49
Patent #:
Issue Dt:
01/06/2004
Application #:
10210637
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
08/28/2003
Title:
SEMICONDUCTOR DEVICE HAVING INCREASED METAL SILICIDE PORTIONS AND METHOD OF FORMING THE SEMICONDUCTOR
50
Patent #:
Issue Dt:
08/17/2004
Application #:
10210640
Filing Dt:
07/31/2002
Title:
IDENTIFYING A CAUSE OF A FAULT BASED ON A PROCESS CONTROLLER OUTPUT
51
Patent #:
Issue Dt:
05/18/2004
Application #:
10210753
Filing Dt:
07/31/2002
Title:
METHOD AND APPARATUS FOR SCHEDULING BASED ON STATE ESTIMATION UNCERTAINTIES
52
Patent #:
Issue Dt:
08/31/2004
Application #:
10212237
Filing Dt:
08/06/2002
Title:
LASER THERMAL ANNEALING METHOD FOR HIGH DIELECTRIC CONSTANT GATE OXIDE FILMS
53
Patent #:
Issue Dt:
10/12/2004
Application #:
10212938
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD FOR BLOCKING IMPLANTS FROM THE GATE OF AN ELECTRONIC DEVICE VIA PLANARIZING FILMS
54
Patent #:
Issue Dt:
01/02/2007
Application #:
10212950
Filing Dt:
08/06/2002
Title:
PREVENTION OF COUNTERFEIT MARKINGS ON SEMICONDUCTOR DEVICES
55
Patent #:
Issue Dt:
02/03/2004
Application #:
10212983
Filing Dt:
08/05/2002
Title:
DUAL DAMASCENE TRENCH DEPTH MONITORING
56
Patent #:
Issue Dt:
11/11/2003
Application #:
10213646
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS
57
Patent #:
Issue Dt:
09/07/2004
Application #:
10213882
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODOLOGY AND APPARATUS USING REAL-TIME OPTICAL SIGNAL FOR WAFER-LEVEL DEVICE DIELECTRICAL RELIABILITY STUDIES
58
Patent #:
Issue Dt:
11/30/2004
Application #:
10214510
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
TRIPLE OXIDE FILL FOR TRENCH ISOLATION
59
Patent #:
Issue Dt:
11/08/2005
Application #:
10214951
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
DISCRETE NANO-TEXTURED STRUCTURES IN BIOMOLECULAR ARRAYS, AND METHOD OF USE
60
Patent #:
Issue Dt:
06/15/2004
Application #:
10215075
Filing Dt:
08/08/2002
Title:
PREVENTION OF PARAMETRIC OR FUNCTIONAL CHANGES TO SILICON SEMICONDUCTOR DEVICE PROPERTIES DURING X-RAY INSPECTION
61
Patent #:
Issue Dt:
10/05/2004
Application #:
10215121
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
SEMICONDUCTOR DEVICE HAVING AMORPHOUS BARRIER LAYER FOR COPPER METALLURGY
62
Patent #:
Issue Dt:
11/04/2003
Application #:
10215171
Filing Dt:
08/08/2002
Title:
A method of manufacturing a silicide MOSFET architecture
63
Patent #:
Issue Dt:
06/24/2003
Application #:
10217233
Filing Dt:
08/09/2002
Title:
INTEGRATED CIRCUIT PACKAGING WITH TAPERED STRIPLINES OF CONSTANT IMPEDANCE
64
Patent #:
Issue Dt:
10/19/2004
Application #:
10217360
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
02/12/2004
Title:
MASK CLAMPING DEVICE
65
Patent #:
Issue Dt:
01/24/2006
Application #:
10217730
Filing Dt:
08/13/2002
Title:
ION IMPLANTATION TO MODULATE AMORPHOUS CARBON STRESS
66
Patent #:
Issue Dt:
01/20/2004
Application #:
10217822
Filing Dt:
08/12/2002
Title:
MULTI-STEP TRANSMISSION LINE FOR MULTILAYER PACKAGING
67
Patent #:
Issue Dt:
09/09/2003
Application #:
10218292
Filing Dt:
08/14/2002
Title:
INTERCONNECT STRUCTURES CONTAINING STRESS ADJUSTMENT CAP LAYER
68
Patent #:
Issue Dt:
08/31/2004
Application #:
10218352
Filing Dt:
08/14/2002
Title:
DIFFERENTIAL AMPLIFIER WITH INPUT GATE OXIDE BREAKDOWN AVOIDANCE
69
Patent #:
Issue Dt:
09/23/2003
Application #:
10218532
Filing Dt:
08/13/2002
Title:
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE BY CALCIUM DOPING A COPPER SURFACE USING A CHEMICAL SOLUTION
70
Patent #:
Issue Dt:
12/23/2003
Application #:
10222248
Filing Dt:
08/16/2002
Title:
ETCH DAMAGE REPAIR WITH THERMAL ANNEALING
71
Patent #:
Issue Dt:
04/26/2005
Application #:
10224876
Filing Dt:
08/21/2002
Title:
MATERIALS AND METHODS FOR SUBLITHOGRAPHIC PATTERNING OF GATE STRUCTURES IN INTEGRATED CIRCUIT DEVICES
72
Patent #:
Issue Dt:
12/14/2004
Application #:
10225860
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
01/02/2003
Title:
STRESS-RELIEVING HEATSINK STRUCTURE AND METHOD OF ATTACHMENT TO AN ELECTRONIC PACKAGE
73
Patent #:
Issue Dt:
04/18/2006
Application #:
10226802
Filing Dt:
08/21/2002
Title:
SELECTIVE ETCH FOR UNIFORM METAL TRACE EXPOSURE AND MILLING USING FOCUSED ION BEAM SYSTEM
74
Patent #:
Issue Dt:
07/15/2003
Application #:
10227382
Filing Dt:
08/26/2002
Title:
BOAT FOR CLEANING BALL GRID ARRAY PACKAGES
75
Patent #:
Issue Dt:
04/27/2004
Application #:
10227404
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
STRUCTURE AND METHOD OF FABRICATING EMBEDDED DRAM HAVING A VERTICAL DEVICE ARRAY AND A BORDERED BITLINE CONTACT
76
Patent #:
Issue Dt:
02/20/2007
Application #:
10227753
Filing Dt:
08/26/2002
Title:
METHOD AND APPARATUS FOR DATA STACKIFICATION FOR RUN-TO-RUN CONTROL
77
Patent #:
Issue Dt:
11/23/2004
Application #:
10227926
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
EVANESCENT WAVE TUNNELING OPTICAL SWITCH AND NETWORK
78
Patent #:
Issue Dt:
01/16/2007
Application #:
10227995
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
CONCURRENT FIN-FET AND THICK-BODY DEVICE FABRICATION
79
Patent #:
Issue Dt:
12/02/2003
Application #:
10228045
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/02/2003
Title:
METAL GATE STACK WITH ETCH STOP LAYER HAVING IMPLANTED METAL SPECIES
80
Patent #:
Issue Dt:
05/18/2004
Application #:
10228142
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
DIRECT READ OF DRAM CELL USING HIGH TRANSFER RATIO
81
Patent #:
Issue Dt:
03/15/2005
Application #:
10229226
Filing Dt:
08/27/2002
Title:
FAULT DETECTION SYSTEM WITH REAL-TIME DATABASE
82
Patent #:
Issue Dt:
07/20/2004
Application #:
10229716
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
EXTRACTING WIRING PARASITICS FOR FILTERED INTERCONNECTIONS IN AN INTEGRATED CIRCUIT
83
Patent #:
Issue Dt:
08/12/2003
Application #:
10230171
Filing Dt:
08/29/2002
Title:
CHEMICAL TREATMENT TO STRENGTHEN PHOTORESISTS TO PREVENT PATTERN COLLAPSE
84
Patent #:
Issue Dt:
08/24/2004
Application #:
10230198
Filing Dt:
08/29/2002
Title:
LASER THERMAL OXIDATION TO FORM ULTRA-THIN GATE OXIDE
85
Patent #:
Issue Dt:
08/31/2004
Application #:
10230714
Filing Dt:
08/29/2002
Title:
RETICLE DEFECT PRINTABILITY VERIFICATION BY RESIST LATENT IMAGE COMPARISON
86
Patent #:
Issue Dt:
10/10/2006
Application #:
10230715
Filing Dt:
08/29/2002
Title:
METHOD AND APPARATUS FOR DETECTION OF A POWER MANAGEMENT STATE BASED ON A POWER CONTROL SIGNAL CONTROLLING MAIN POWER TO THE COMPUTER SYSTEM AND A POWER CONTROL SIGNAL CONTROLLING POWER TO SYSTEM MEMORY AND WAKING UP THEREFROM
87
Patent #:
Issue Dt:
04/21/2009
Application #:
10230775
Filing Dt:
08/29/2002
Title:
METHOD FOR FORMING INTEGRATED CIRCUIT
88
Patent #:
Issue Dt:
04/05/2005
Application #:
10230794
Filing Dt:
08/29/2002
Title:
FORMATION OF AMORPHOUS CARBON ARC STACK HAVING GRADED TRANSITION BETWEEN AMORPHOUS CARBON AND ARC MATERIAL
89
Patent #:
Issue Dt:
12/27/2005
Application #:
10230925
Filing Dt:
08/29/2002
Title:
SYSTEM AND METHOD FOR STORING PERFORMANCE-ENHANCING DATA IN MEMORY SPACE FREED BY DATA COMPRESSION
90
Patent #:
Issue Dt:
09/02/2003
Application #:
10231133
Filing Dt:
08/30/2002
Title:
BPSG, SA-CVD LINER/P-HDP GAP FILL
91
Patent #:
Issue Dt:
02/07/2006
Application #:
10231560
Filing Dt:
08/30/2002
Title:
THERMALLY CONDUCTIVE INTEGRATED CIRCUIT MOUNTING STRUCTURES
92
Patent #:
Issue Dt:
06/27/2006
Application #:
10231561
Filing Dt:
08/30/2002
Title:
METHOD AND APPARATUS FOR REDUCING SCHEDULING CONFLICTS FOR A RESOURCE
93
Patent #:
Issue Dt:
09/30/2008
Application #:
10231764
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
WIRELESS INTERFACE
94
Patent #:
Issue Dt:
10/12/2004
Application #:
10231910
Filing Dt:
08/30/2002
Title:
PROCESS CONTROL BASED ON TOOL HEALTH DATA
95
Patent #:
Issue Dt:
03/06/2012
Application #:
10232300
Filing Dt:
08/30/2002
Title:
USE OF ETHERNET FRAMES FOR EXCHANGING CONTROL AND STATUS INFORMATION WITHIN AN HPNA CONTROLLER
96
Patent #:
Issue Dt:
03/30/2004
Application #:
10234238
Filing Dt:
09/05/2002
Title:
NITROGEN OXIDE PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING
97
Patent #:
Issue Dt:
05/09/2006
Application #:
10234755
Filing Dt:
09/04/2002
Title:
FAULT DETECTION AND CLASSIFICATION BASED ON CALCULATING DISTANCES BETWEEN DATA POINTS
98
Patent #:
Issue Dt:
06/08/2004
Application #:
10235008
Filing Dt:
09/03/2002
Publication #:
Pub Dt:
03/04/2004
Title:
LOW STRAIN CHIP REMOVAL APPARATUS
99
Patent #:
Issue Dt:
11/02/2004
Application #:
10235147
Filing Dt:
09/05/2002
Publication #:
Pub Dt:
03/11/2004
Title:
METHOD TO CONTROL DEVICE THRESHOLD OF SOI MOSFET'S
100
Patent #:
Issue Dt:
12/16/2003
Application #:
10235169
Filing Dt:
09/05/2002
Title:
POLYSILICON BACK-GATED SOI MOSFET FOR DYNAMIC THRESHOLD VOLTAGE CONTROL
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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