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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 44 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
6788112
Issue Dt:
09/07/2004
Application #:
10436229
Filing Dt:
05/12/2003
Title:
HIGH PERFORMANCE DUAL-STAGE SENSE AMPLIFIER CIRCUIT
2
Patent #:
6868000
Issue Dt:
03/15/2005
Application #:
10436432
Filing Dt:
05/12/2003
Publication #:
US20040228160
Pub Dt:
11/18/2004
Title:
COUPLED BODY CONTACTS FOR SOI DIFFERENTIAL CIRCUITS
3
Patent #:
6955997
Issue Dt:
10/18/2005
Application #:
10438860
Filing Dt:
05/16/2003
Title:
LASER THERMAL ANNEALING METHOD FOR FORMING SEMICONDUCTOR LOW-K DIELECTRIC LAYER
4
Patent #:
6975405
Issue Dt:
12/13/2005
Application #:
10439724
Filing Dt:
05/16/2003
Publication #:
US20040227957
Pub Dt:
11/18/2004
Title:
METHOD AND APPARATUS FOR MEASURING FLATNESS AND/OR RELATIVE ANGLE BETWEEN TOP AND BOTTOM SURFACES OF A CHIP
5
Patent #:
6797614
Issue Dt:
09/28/2004
Application #:
10440847
Filing Dt:
05/19/2003
Title:
NICKEL ALLOY FOR SMOS PROCESS SILICIDATION
6
Patent #:
6919250
Issue Dt:
07/19/2005
Application #:
10442131
Filing Dt:
05/21/2003
Publication #:
US20040235283
Pub Dt:
11/25/2004
Title:
MULTIPLE-GATE MOS DEVICE AND METHOD FOR MAKING THE SAME
7
Patent #:
6849516
Issue Dt:
02/01/2005
Application #:
10442745
Filing Dt:
05/21/2003
Publication #:
US20040104442
Pub Dt:
06/03/2004
Title:
METHOD OF FORMING DRAIN/SOURCE EXTENSION STRUCTURES OF A FIELD EFFECT TRANSISTOR USING A DOPED HIGH-K DIELECTRIC LAYER
8
Patent #:
6936506
Issue Dt:
08/30/2005
Application #:
10442975
Filing Dt:
05/22/2003
Title:
STRAINED-SILICON DEVICE WITH DIFFERENT SILICON THICKNESSES
9
Patent #:
6723663
Issue Dt:
04/20/2004
Application #:
10443642
Filing Dt:
05/22/2003
Title:
TECHNIQUE FOR FORMING AN OXIDE/NITRIDE LAYER STACK BY CONTROLLING THE NITROGEN ION CONCENTRATION IN A NITRIDATION PLASMA
10
Patent #:
6943088
Issue Dt:
09/13/2005
Application #:
10444191
Filing Dt:
05/23/2003
Publication #:
US20040119135
Pub Dt:
06/24/2004
Title:
TRENCH ISOLATION STRUCTURE FOR A SEMICONDUCTOR DEVICE WITH A DIFFERENT DEGREE OF CORNER ROUNDING AND A METHOD OF MANUFACTURING THE SAME
11
Patent #:
6674676
Issue Dt:
01/06/2004
Application #:
10444226
Filing Dt:
05/23/2003
Title:
COLUMN REDUNDANCY SYSTEM AND METHOD FOR A MICRO-CELL EMBEDDED DRAM (E-DRAM) ARCHITECTURE
12
Patent #:
6816431
Issue Dt:
11/09/2004
Application #:
10446297
Filing Dt:
05/28/2003
Publication #:
US20040240266
Pub Dt:
12/02/2004
Title:
MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
13
Patent #:
6882027
Issue Dt:
04/19/2005
Application #:
10447018
Filing Dt:
05/28/2003
Publication #:
US20040238919
Pub Dt:
12/02/2004
Title:
METHODS AND APPARATUS FOR PROVIDING AN ANTIFUSE FUNCTION
14
Patent #:
7138318
Issue Dt:
11/21/2006
Application #:
10447047
Filing Dt:
05/28/2003
Publication #:
US20040241969
Pub Dt:
12/02/2004
Title:
METHOD OF FABRICATING BODY-TIED SOI TRANSISTOR HAVING HALO IMPLANT REGION UNDERLYING HAMMERHEAD PORTION OF GATE
15
Patent #:
6815319
Issue Dt:
11/09/2004
Application #:
10447646
Filing Dt:
05/29/2003
Publication #:
US20030197276
Pub Dt:
10/23/2003
Title:
DAMASCENE RESISTOR AND METHOD FOR MEASURING THE WIDTH OF SAME
16
Patent #:
6791886
Issue Dt:
09/14/2004
Application #:
10448723
Filing Dt:
05/30/2003
Title:
SRAM CELL WITH BOOTSTRAPPED POWER LINE
17
Patent #:
7756691
Issue Dt:
07/13/2010
Application #:
10448724
Filing Dt:
05/30/2003
Publication #:
US20040243369
Pub Dt:
12/02/2004
Title:
ESTABLISHING RELATIONSHIPS BETWEEN COMPONENTS IN SIMULATION SYSTEMS
18
Patent #:
6891226
Issue Dt:
05/10/2005
Application #:
10448729
Filing Dt:
05/30/2003
Publication #:
US20030201500
Pub Dt:
10/30/2003
Title:
DUAL GATE LOGIC DEVICE
19
Patent #:
6816397
Issue Dt:
11/09/2004
Application #:
10448776
Filing Dt:
05/29/2003
Publication #:
US20040240246
Pub Dt:
12/02/2004
Title:
BI-DIRECTIONAL READ WRITE DATA STRUCTURE AND METHOD FOR MEMORY
20
Patent #:
6855436
Issue Dt:
02/15/2005
Application #:
10448947
Filing Dt:
05/30/2003
Publication #:
US20040241459
Pub Dt:
12/02/2004
Title:
FORMATION OF SILICON-GERMANIUM-ON-INSULATOR (SGOI) BY AN INTEGRAL HIGH TEMPERATURE SIMOX-GE INTERDIFFUSION ANNEAL
21
Patent #:
7026249
Issue Dt:
04/11/2006
Application #:
10448954
Filing Dt:
05/30/2003
Publication #:
US20040242006
Pub Dt:
12/02/2004
Title:
SIGE LATTICE ENGINEERING USING A COMBINATION OF OXIDATION, THINNING AND EPITAXIAL REGROWTH
22
Patent #:
7300739
Issue Dt:
11/27/2007
Application #:
10449181
Filing Dt:
05/29/2003
Publication #:
US20070026339
Pub Dt:
02/01/2007
Title:
NEGATIVE RESISTS BASED ON A ACID-CATALYZED ELIMINATION OF POLAR MOLECULES
23
Patent #:
6876595
Issue Dt:
04/05/2005
Application #:
10455601
Filing Dt:
06/05/2003
Publication #:
US20040246812
Pub Dt:
12/09/2004
Title:
DECODE PATH GATED LOW ACTIVE POWER SRAM
24
Patent #:
6812867
Issue Dt:
11/02/2004
Application #:
10455696
Filing Dt:
06/05/2003
Publication #:
US20030227397
Pub Dt:
12/11/2003
Title:
DATA CODING FOR DATA STORAGE SYSTEMS
25
Patent #:
7132680
Issue Dt:
11/07/2006
Application #:
10456749
Filing Dt:
06/09/2003
Publication #:
US20040245550
Pub Dt:
12/09/2004
Title:
ORGANIC FIELD-EFFECT TRANSISTOR AND METHOD OF MAKING SAME BASED ON POLYMERIZABLE SELF-ASSEMBLED MONOLAYERS
26
Patent #:
7880208
Issue Dt:
02/01/2011
Application #:
10458112
Filing Dt:
06/10/2003
Publication #:
US20040253437
Pub Dt:
12/16/2004
Title:
MAGNETIC MATERIALS HAVING SUPERPARAMAGNETIC PARTICLES
27
Patent #:
6898132
Issue Dt:
05/24/2005
Application #:
10458147
Filing Dt:
06/10/2003
Publication #:
US20040252538
Pub Dt:
12/16/2004
Title:
SYSTEM AND METHOD FOR WRITING TO A MAGNETIC SHIFT REGISTER
28
Patent #:
6834005
Issue Dt:
12/21/2004
Application #:
10458554
Filing Dt:
06/10/2003
Publication #:
US20040252539
Pub Dt:
12/16/2004
Title:
SHIFTABLE MAGNETIC SHIFT REGISTER AND METHOD OF USING THE SAME
29
Patent #:
6870258
Issue Dt:
03/22/2005
Application #:
10458802
Filing Dt:
06/16/2003
Title:
FIXTURE SUITABLE FOR USE IN COUPLING A LID TO A SUBSTRATE AND METHOD
30
Patent #:
6767827
Issue Dt:
07/27/2004
Application #:
10459328
Filing Dt:
06/11/2003
Title:
METHOD FOR FORMING DUAL INLAID STRUCTURES FOR IC INTERCONNECTIONS
31
Patent #:
8041915
Issue Dt:
10/18/2011
Application #:
10459344
Filing Dt:
06/11/2003
Title:
FASTER MEMORY ACCESS IN NON-UNIFIED MEMORY ACCESS SYSTEMS
32
Patent #:
6855607
Issue Dt:
02/15/2005
Application #:
10459495
Filing Dt:
06/12/2003
Publication #:
US20040253775
Pub Dt:
12/16/2004
Title:
MULTI-STEP CHEMICAL MECHANICAL POLISHING OF A GATE AREA IN A FINFET
33
Patent #:
6756643
Issue Dt:
06/29/2004
Application #:
10459579
Filing Dt:
06/12/2003
Title:
DUAL SILICON LAYER FOR CHEMICAL MECHANICAL POLISHING PLANARIZATION
34
Patent #:
6790744
Issue Dt:
09/14/2004
Application #:
10459974
Filing Dt:
06/12/2003
Publication #:
US20040000333
Pub Dt:
01/01/2004
Title:
MONOLITHICALLY INTEGRATED SOLID-STATE SIGE THERMOELECTRIC ENERGY CONVERTER FOR HIGH SPEED AND LOW POWER CIRCUITS
35
Patent #:
6696343
Issue Dt:
02/24/2004
Application #:
10459978
Filing Dt:
06/12/2003
Title:
MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
36
Patent #:
6867080
Issue Dt:
03/15/2005
Application #:
10460165
Filing Dt:
06/13/2003
Title:
POLYSILICON TILING TO PREVENT GEOMETRY EFFECTS DURING LASER THERMAL ANNEALING
37
Patent #:
7143370
Issue Dt:
11/28/2006
Application #:
10460500
Filing Dt:
06/11/2003
Title:
PARAMETER LINKING SYSTEM FOR DATA VISUALIZATION IN INTEGRATED CIRCUIT TECHNOLOGY DEVELOPMENT
38
Patent #:
6815233
Issue Dt:
11/09/2004
Application #:
10460615
Filing Dt:
06/11/2003
Title:
METHOD OF SIMULTANEOUS DISPLAY OF DIE AND WAFER CHARACTERIZATION IN INTEGRATED CIRCUIT TECHNOLOGY DEVELOPMENT
39
Patent #:
6815282
Issue Dt:
11/09/2004
Application #:
10460717
Filing Dt:
06/12/2003
Publication #:
US20030218198
Pub Dt:
11/27/2003
Title:
SILICON ON INSULATOR FIELD EFFECT TRANSISTOR HAVING SHARED BODY CONTACT
40
Patent #:
7052621
Issue Dt:
05/30/2006
Application #:
10461090
Filing Dt:
06/13/2003
Publication #:
US20040251234
Pub Dt:
12/16/2004
Title:
BILAYERED METAL HARDMASKS FOR USE IN DUAL DAMASCENE ETCH SCHEMES
41
Patent #:
6841831
Issue Dt:
01/11/2005
Application #:
10461821
Filing Dt:
06/13/2003
Publication #:
US20030211681
Pub Dt:
11/13/2003
Title:
FULLY-DEPLETED SOI MOSFETS WITH LOW SOURCE AND DRAIN RESISTANCE AND MINIMAL OVERLAP CAPACITANCE USING A RECESSED CHANNEL DAMASCENE GATE PROCESS
42
Patent #:
6830998
Issue Dt:
12/14/2004
Application #:
10462667
Filing Dt:
06/17/2003
Title:
GATE DIELECTRIC QUALITY FOR REPLACEMENT METAL GATE TRANSISTORS
43
Patent #:
6927414
Issue Dt:
08/09/2005
Application #:
10462933
Filing Dt:
06/17/2003
Publication #:
US20040256614
Pub Dt:
12/23/2004
Title:
HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
44
Patent #:
7205604
Issue Dt:
04/17/2007
Application #:
10463038
Filing Dt:
06/17/2003
Publication #:
US20040157353
Pub Dt:
08/12/2004
Title:
ULTRA SCALABLE HIGH SPEED HETEROJUNCTION VERTICAL N-CHANNEL MISFETS AND METHODS THEREOF
45
Patent #:
7030044
Issue Dt:
04/18/2006
Application #:
10463910
Filing Dt:
06/16/2003
Publication #:
US20040121621
Pub Dt:
06/24/2004
Title:
METHOD OF FORMING A CAP LAYER HAVING ANTI-REFLECTIVE CHARACTERISTICS ON TOP OF A LOW-K DIELECTRIC
46
Patent #:
6727135
Issue Dt:
04/27/2004
Application #:
10464339
Filing Dt:
06/18/2003
Publication #:
US20030209765
Pub Dt:
11/13/2003
Title:
ALL-IN-ONE DISPOSABLE/PERMANENT SPACER ELEVATED SOURCE/DRAIN, SELF-ALIGNED SILICIDE CMOS
47
Patent #:
6767779
Issue Dt:
07/27/2004
Application #:
10464400
Filing Dt:
06/19/2003
Publication #:
US20030213997
Pub Dt:
11/20/2003
Title:
ASYMMETRICAL MOSFET LAYOUT FOR HIGH CURRENTS AND HIGH SPEED OPERATION
48
Patent #:
7184496
Issue Dt:
02/27/2007
Application #:
10464965
Filing Dt:
06/19/2003
Publication #:
US20040086062
Pub Dt:
05/06/2004
Title:
COMPLEMENTARY CODE DECODING BY REDUCED SIZED CIRCUITS
49
Patent #:
6856025
Issue Dt:
02/15/2005
Application #:
10465506
Filing Dt:
06/19/2003
Publication #:
US20030215984
Pub Dt:
11/20/2003
Title:
CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
50
Patent #:
7045851
Issue Dt:
05/16/2006
Application #:
10465797
Filing Dt:
06/20/2003
Publication #:
US20040256662
Pub Dt:
12/23/2004
Title:
NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME
51
Patent #:
7235464
Issue Dt:
06/26/2007
Application #:
10485419
Filing Dt:
02/02/2005
Publication #:
US20050124092
Pub Dt:
06/09/2005
Title:
PATTERNING METHOD
52
Patent #:
6995391
Issue Dt:
02/07/2006
Application #:
10499538
Filing Dt:
06/21/2004
Publication #:
US20050045873
Pub Dt:
03/03/2005
Title:
ELECTRODE STRUCTURE FOR ELECTRONIC AND OPTO-ELECTRONIC DEVICES
53
Patent #:
7256670
Issue Dt:
08/14/2007
Application #:
10523310
Filing Dt:
01/27/2005
Publication #:
US20060017533
Pub Dt:
01/26/2006
Title:
DIAPHRAGM ACTIVATED MICRO-ELECTROMECHANICAL SWITCH
54
Patent #:
7479014
Issue Dt:
01/20/2009
Application #:
10531494
Filing Dt:
04/15/2005
Publication #:
US20060003648
Pub Dt:
01/05/2006
Title:
LAND GRID ARRAY FABRICATION USING ELASTOMER CORE AND CONDUCTING METAL SHELL OR MESH
55
Patent #:
7388259
Issue Dt:
06/17/2008
Application #:
10536483
Filing Dt:
05/24/2005
Publication #:
US20060057787
Pub Dt:
03/16/2006
Title:
STRAINED FINFET CMOS DEVICE STRUCTURES
56
Patent #:
7329111
Issue Dt:
02/12/2008
Application #:
10537238
Filing Dt:
05/31/2005
Publication #:
US20060093697
Pub Dt:
05/04/2006
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
57
Patent #:
7314700
Issue Dt:
01/01/2008
Application #:
10537259
Filing Dt:
05/31/2005
Publication #:
US20060127800
Pub Dt:
06/15/2006
Title:
HIGH SENSITIVITY RESIST COMPOSITIONS FOR ELECTRON-BASED LITHOGRAPHY
58
Patent #:
7491272
Issue Dt:
02/17/2009
Application #:
10537536
Filing Dt:
11/01/2005
Publication #:
US20060127579
Pub Dt:
06/15/2006
Title:
CONFINEMENT OF LIQUIDS ON SURFACES
59
Patent #:
7087499
Issue Dt:
08/08/2006
Application #:
10539333
Filing Dt:
06/15/2005
Publication #:
US20060128071
Pub Dt:
06/15/2006
Title:
INTEGRATED ANTIFUSE STRUCTURE FOR FINFET AND CMOS DEVICES
60
Patent #:
7872897
Issue Dt:
01/18/2011
Application #:
10552971
Filing Dt:
10/18/2006
Publication #:
US20070242548
Pub Dt:
10/18/2007
Title:
PROGRAMMABLE SEMICONDUCTOR DEVICE
61
Patent #:
7932549
Issue Dt:
04/26/2011
Application #:
10596022
Filing Dt:
05/25/2006
Publication #:
US20090014767
Pub Dt:
01/15/2009
Title:
CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS
62
Patent #:
7935613
Issue Dt:
05/03/2011
Application #:
10596569
Filing Dt:
06/16/2006
Publication #:
US20100013044
Pub Dt:
01/21/2010
Title:
THREE-DIMENSIONAL SILICON ON OXIDE DEVICE ISOLATION
63
Patent #:
7550370
Issue Dt:
06/23/2009
Application #:
10597066
Filing Dt:
07/10/2006
Publication #:
US20070128840
Pub Dt:
06/07/2007
Title:
METHOD OF FORMING THIN SGOI WAFERS WITH HIGH RELAXATION AND LOW STACKING FAULT DEFECT DENSITY
64
Patent #:
7683428
Issue Dt:
03/23/2010
Application #:
10597288
Filing Dt:
07/19/2006
Publication #:
US20090200604
Pub Dt:
08/13/2009
Title:
VERTICAL FIN-FET MOS DEVICES
65
Patent #:
7960095
Issue Dt:
06/14/2011
Application #:
10597904
Filing Dt:
08/11/2006
Publication #:
US20080227030
Pub Dt:
09/18/2008
Title:
USE OF MIXED BASES TO ENHANCE PATTERNED RESIST PROFILES ON CHROME OR SENSITIVE SUBSTRATES
66
Patent #:
6913959
Issue Dt:
07/05/2005
Application #:
10601401
Filing Dt:
06/23/2003
Publication #:
US20050003593
Pub Dt:
01/06/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
67
Patent #:
6808970
Issue Dt:
10/26/2004
Application #:
10602583
Filing Dt:
06/24/2003
Publication #:
US20040126998
Pub Dt:
07/01/2004
Title:
SEMICONDUCTOR DEVICE HAVING AN IMPROVED STRAINED SURFACE LAYER AND METHOD OF FORMING A STRAINED SURFACE LAYER IN A SEMICONDUCTOR DEVICE
68
Patent #:
7148559
Issue Dt:
12/12/2006
Application #:
10604003
Filing Dt:
06/20/2003
Publication #:
US20050001290
Pub Dt:
01/06/2005
Title:
SUBSTRATE ENGINEERING FOR OPTIMUM CMOS DEVICE PERFORMANCE
69
Patent #:
6780736
Issue Dt:
08/24/2004
Application #:
10604009
Filing Dt:
06/20/2003
Title:
METHOD FOR IMAGE REVERSAL OF IMPLANT RESIST USING A SINGLE PHOTOLITHOGRAPHY EXPOSURE AND STRUCTURES FORMED THEREBY
70
Patent #:
7030031
Issue Dt:
04/18/2006
Application #:
10604056
Filing Dt:
06/24/2003
Publication #:
US20040266201
Pub Dt:
12/30/2004
Title:
METHOD FOR FORMING DAMASCENE STRUCTURE UTILIZING PLANARIZING MATERIAL COUPLED WITH DIFFUSION BARRIER MATERIAL
71
Patent #:
7350160
Issue Dt:
03/25/2008
Application #:
10604059
Filing Dt:
06/24/2003
Publication #:
US20040268284
Pub Dt:
12/30/2004
Title:
METHOD OF DISPLAYING A GUARD RING WITHIN AN INTEGRATED CIRCUIT
72
Patent #:
7289658
Issue Dt:
10/30/2007
Application #:
10604063
Filing Dt:
06/24/2003
Publication #:
US20040268290
Pub Dt:
12/30/2004
Title:
REMOVAL OF RELATIVELY UNIMPORTANT SHAPES FROM A SET OF SHAPES
73
Patent #:
6818906
Issue Dt:
11/16/2004
Application #:
10604079
Filing Dt:
06/25/2003
Title:
ELECTRON BEAM POSITION REFERENCE SYSTEM
74
Patent #:
6969648
Issue Dt:
11/29/2005
Application #:
10604081
Filing Dt:
06/25/2003
Publication #:
US20050009268
Pub Dt:
01/13/2005
Title:
METHOD FOR FORMING BURIED PLATE OF TRENCH CAPACITOR
75
Patent #:
6992354
Issue Dt:
01/31/2006
Application #:
10604086
Filing Dt:
06/25/2003
Publication #:
US20040262688
Pub Dt:
12/30/2004
Title:
FINFET HAVING SUPPRESSED PARASITIC DEVICE CHARACTERISTICS
76
Patent #:
7068564
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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03/31/2005
Title:
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Pub Dt:
03/31/2005
Title:
METAL-INSULATOR-METAL CAPACITOR AND METHOD OF FABRICATION
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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