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Reel/Frame:	056987/0001			Pages:	1045
		Recorded:	05/12/2021
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 18026
Page 46 of 181
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Patent #:	7170030	Issue Dt:	01/30/2007	Application #:	10660477	Filing Dt:	09/12/2003
Publication #:	US20050056625	Pub Dt:	03/17/2005
Title:	METHOD AND APPARATUS FOR REPAIR OF REFLECTIVE PHOTOMASKS

Patent #:	7030008	Issue Dt:	04/18/2006	Application #:	10661041	Filing Dt:	09/12/2003
Publication #:	US20050056823	Pub Dt:	03/17/2005
Title:	TECHNIQUES FOR PATTERNING FEATURES IN SEMICONDUCTOR DEVICES

Patent #:	7029951	Issue Dt:	04/18/2006	Application #:	10661299	Filing Dt:	09/12/2003
Publication #:	US20050059238	Pub Dt:	03/17/2005
Title:	COOLING SYSTEM FOR A SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME

Patent #:	6954879	Issue Dt:	10/11/2005	Application #:	10661894	Filing Dt:	09/12/2003
Title:	METHOD AND APPARATUS FOR COMMUNICATING CONFIGURATION DATA FOR A PERIPHERAL DEVICE OF A MICROCONTROLLER VIA A SCAN PATH

Patent #:	7067437	Issue Dt:	06/27/2006	Application #:	10662022	Filing Dt:	09/12/2003
Publication #:	US20050059258	Pub Dt:	03/17/2005
Title:	STRUCTURES WITH IMPROVED INTERFACIAL STRENGTH OF SICOH DIELECTRICS AND METHOD FOR PREPARING THE SAME

Patent #:	7114136	Issue Dt:	09/26/2006	Application #:	10663020	Filing Dt:	09/16/2003
Publication #:	US20050262454	Pub Dt:	11/24/2005
Title:	METHOD FOR VLSI SYSTEM DEBUG AND TIMING ANALYSIS

Patent #:	7205185	Issue Dt:	04/17/2007	Application #:	10663471	Filing Dt:	09/15/2003
Publication #:	US20050059252	Pub Dt:	03/17/2005
Title:	SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION

Patent #:	6949325	Issue Dt:	09/27/2005	Application #:	10663553	Filing Dt:	09/16/2003
Publication #:	US20050058930	Pub Dt:	03/17/2005
Title:	NEGATIVE RESIST COMPOSITION WITH FLUOROSULFONAMIDE-CONTAINING POLYMER

Patent #:	7146440	Issue Dt:	12/05/2006	Application #:	10663611	Filing Dt:	09/16/2003
Title:	DMA ACKNOWLEDGE SIGNAL FOR AN IDE DEVICE

Patent #:	7093209	Issue Dt:	08/15/2006	Application #:	10663613	Filing Dt:	09/16/2003
Publication #:	US20050060673	Pub Dt:	03/17/2005
Title:	METHOD AND APPARATUS FOR PACKAGING TEST INTEGRATED CIRCUITS

Patent #:	6960802	Issue Dt:	11/01/2005	Application #:	10663614	Filing Dt:	09/16/2003
Title:	PERFORMING PASSIVE VOLTAGE CONTRAST ON A SILICON ON INSULATOR SEMICONDUCTOR DEVICE

Patent #:	7313573	Issue Dt:	12/25/2007	Application #:	10663907	Filing Dt:	09/17/2003
Publication #:	US20050060323	Pub Dt:	03/17/2005
Title:	DIAGNOSIS OF EQUIPMENT FAILURES USING AN INTEGRATED APPROACH OF CASE BASED REASONING AND RELIABILITY ANALYSIS

Patent #:	7521367	Issue Dt:	04/21/2009	Application #:	10664073	Filing Dt:	09/17/2003
Publication #:	US20040063330	Pub Dt:	04/01/2004
Title:	FIB/RIE METHOD FOR IN-LINE CIRCUIT MODIFICATION OF MICROELECTRONIC CHIPS CONTAINING ORGANIC DIELECTRIC

Patent #:	7205165	Issue Dt:	04/17/2007	Application #:	10664665	Filing Dt:	09/18/2003
Title:	METHOD FOR DETERMINING THE RELIABILITY OF DIELECTRIC LAYERS

Patent #:	6825102	Issue Dt:	11/30/2004	Application #:	10664714	Filing Dt:	09/18/2003
Title:	METHOD OF IMPROVING THE QUALITY OF DEFECTIVE SEMICONDUCTOR MATERIAL

Patent #:	6902869	Issue Dt:	06/07/2005	Application #:	10664996	Filing Dt:	09/17/2003
Publication #:	US20040091821	Pub Dt:	05/13/2004
Title:	MANUFACTURING METHODS FOR PRINTED CIRCUIT BOARDS

Patent #:	7176927	Issue Dt:	02/13/2007	Application #:	10665289	Filing Dt:	09/22/2003
Publication #:	US20040054834	Pub Dt:	03/18/2004
Title:	METHOD AND SYSTEM FOR GRAPHICS RENDERING USING HARDWARE-EVENT-TRIGGERED EXECUTION OF CAPTURED GRAPHICS HARDWARE INSTRUCTIONS

Patent #:	6882052	Issue Dt:	04/19/2005	Application #:	10665322	Filing Dt:	09/20/2003
Publication #:	US20040060617	Pub Dt:	04/01/2004
Title:	PLASMA ENHANCED LINER

Patent #:	6936509	Issue Dt:	08/30/2005	Application #:	10665713	Filing Dt:	09/19/2003
Publication #:	US20040063273	Pub Dt:	04/01/2004
Title:	STI PULL-DOWN TO CONTROL SIGE FACET GROWTH

Patent #:	7063127	Issue Dt:	06/20/2006	Application #:	10665798	Filing Dt:	09/18/2003
Publication #:	US20050061474	Pub Dt:	03/24/2005
Title:	METHOD AND APPARATUS FOR CHIP-COOLING

Patent #:	6943096	Issue Dt:	09/13/2005	Application #:	10665938	Filing Dt:	09/17/2003
Title:	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE

Patent #:	6961920	Issue Dt:	11/01/2005	Application #:	10665996	Filing Dt:	09/18/2003
Publication #:	US20050066300	Pub Dt:	03/24/2005
Title:	METHOD FOR INTERLAYER AND YIELD BASED OPTICAL PROXIMITY CORRECTION

Patent #:	6958247	Issue Dt:	10/25/2005	Application #:	10666195	Filing Dt:	09/19/2003
Publication #:	US20040214423	Pub Dt:	10/28/2004
Title:	METHOD OF ELECTROPLATING COPPER OVER A PATTERNED DIELECTRIC LAYER TO ENHANCE PROCESS UNIFORMITY OF A SUBSEQUENT CMP PROCESS

Patent #:	7428716	Issue Dt:	09/23/2008	Application #:	10666353	Filing Dt:	09/19/2003
Publication #:	US20050065765	Pub Dt:	03/24/2005
Title:	SYSTEM AND METHOD FOR STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS

Patent #:	7175966	Issue Dt:	02/13/2007	Application #:	10666541	Filing Dt:	09/19/2003
Publication #:	US20050064322	Pub Dt:	03/24/2005
Title:	WATER AND AQUEOUS BASE SOLUBLE ANTIREFLECTIVE COATING/HARDMASK MATERIALS

Patent #:	6872641	Issue Dt:	03/29/2005	Application #:	10667603	Filing Dt:	09/23/2003
Publication #:	US20050064686	Pub Dt:	03/24/2005
Title:	STRAINED SILICON ON RELAXED SIGE FILM WITH UNIFORM MISFIT DISLOCATION DENSITY

Patent #:	8675722	Issue Dt:	03/18/2014	Application #:	10668562	Filing Dt:	09/23/2003
Publication #:	US20050074058	Pub Dt:	04/07/2005
Title:	METHODS AND APPARATUS FOR SNAPSHOT-BASED EQUALIZATION OF A COMMUNICATIONS CHANNEL

Patent #:	6884667	Issue Dt:	04/26/2005	Application #:	10669727	Filing Dt:	09/25/2003
Title:	FIELD EFFECT TRANSISTOR WITH STRESSED CHANNEL AND METHOD FOR MAKING SAME

Patent #:	6985645	Issue Dt:	01/10/2006	Application #:	10669944	Filing Dt:	09/24/2003
Publication #:	US20050063634	Pub Dt:	03/24/2005
Title:	APPARATUS AND METHODS FOR INTEGRALLY PACKAGING OPTOELECTRONIC DEVICES, IC CHIPS AND OPTICAL TRANSMISSION LINES

Patent #:	7516456	Issue Dt:	04/07/2009	Application #:	10670841	Filing Dt:	09/25/2003
Publication #:	US20050081203	Pub Dt:	04/14/2005
Title:	ASYMMETRIC HETEROGENEOUS MULTI-THREADED OPERATING SYSTEM

Patent #:	6862925	Issue Dt:	03/08/2005	Application #:	10672940	Filing Dt:	09/26/2003
Publication #:	US20040107770	Pub Dt:	06/10/2004
Title:	DEVICE FOR CONTACTING AND/OR MODIFYING A SURFACE HAVING A CANTILEVER AND A METHOD FOR PRODUCTION OF SAID CANTILEVER

Patent #:	7078341	Issue Dt:	07/18/2006	Application #:	10673648	Filing Dt:	09/30/2003
Publication #:	US20050079708	Pub Dt:	04/14/2005
Title:	METHOD OF DEPOSITING METAL LAYERS FROM METAL-CARBONYL PRECURSORS

Patent #:	7355872	Issue Dt:	04/08/2008	Application #:	10673801	Filing Dt:	09/29/2003
Publication #:	US20050071544	Pub Dt:	03/31/2005
Title:	SEGMENTED CONTENT ADDRESSABLE MEMORY ARCHITECTURE FOR IMPROVED CYCLE TIME AND REDUCED POWER CONSUMPTION

Patent #:	6995438	Issue Dt:	02/07/2006	Application #:	10674478	Filing Dt:	10/01/2003
Title:	SEMICONDUCTOR DEVICE WITH FULLY SILICIDED SOURCE/DRAIN AND DAMASCENE METAL GATE

Patent #:	6855989	Issue Dt:	02/15/2005	Application #:	10674520	Filing Dt:	10/01/2003
Title:	DAMASCENE FINFET GATE WITH SELECTIVE METAL INTERDIFFUSION

Patent #:	6821826	Issue Dt:	11/23/2004	Application #:	10674644	Filing Dt:	09/30/2003
Title:	THREE DIMENSIONAL CMOS INTEGRATED CIRCUITS HAVING DEVICE LAYERS BUILT ON DIFFERENT CRYSTAL ORIENTED WAFERS

Patent #:	6878624	Issue Dt:	04/12/2005	Application #:	10674645	Filing Dt:	09/30/2003
Publication #:	US20050070098	Pub Dt:	03/31/2005
Title:	PRE-ANNEAL OF COSI, TO PREVENT FORMATION OF AMORPHOUS LAYER BETWEEN TI-O-N AND COSI

Patent #:	7566482	Issue Dt:	07/28/2009	Application #:	10674648	Filing Dt:	09/30/2003
Publication #:	US20050067294	Pub Dt:	03/31/2005
Title:	SOI BY OXIDATION OF POROUS SILICON

Patent #:	7352066	Issue Dt:	04/01/2008	Application #:	10675139	Filing Dt:	09/30/2003
Publication #:	US20070085215	Pub Dt:	04/19/2007
Title:	SILICON BASED OPTICAL VIAS

Patent #:	7052958	Issue Dt:	05/30/2006	Application #:	10675625	Filing Dt:	09/30/2003
Title:	FINFET CMOS WITH NVRAM CAPABILITY

Patent #:	6787427	Issue Dt:	09/07/2004	Application #:	10676171	Filing Dt:	10/01/2003
Publication #:	US20040063293	Pub Dt:	04/01/2004
Title:	METHOD TO FABRICATE SIGE HBTS WITH CONTROLLED CURRENT GAIN AND IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS

Patent #:	7133969	Issue Dt:	11/07/2006	Application #:	10676437	Filing Dt:	10/01/2003
Publication #:	US20050076180	Pub Dt:	04/07/2005
Title:	SYSTEM AND METHOD FOR HANDLING EXCEPTIONAL INSTRUCTIONS IN A TRACE CACHE BASED PROCESSOR

Patent #:	7069155	Issue Dt:	06/27/2006	Application #:	10676455	Filing Dt:	10/01/2003
Title:	REAL TIME ANALYTICAL MONITOR FOR SOFT DEFECTS ON RETICLE DURING RETICLE INSPECTION

Patent #:	7165172	Issue Dt:	01/16/2007	Application #:	10676600	Filing Dt:	10/01/2003
Title:	FACILITATING COLD RESET AND WARM RESET TASKING IN A COMPUTER SYSTEM

Patent #:	7187796	Issue Dt:	03/06/2007	Application #:	10676613	Filing Dt:	10/01/2003
Title:	SYSTEMS AND METHODS THAT EMPLOY EXPOSURE COMPENSATION TO PROVIDE UNIFORM CD CONTROL ON RETICLE DURING FABRICATION

Patent #:	7043626	Issue Dt:	05/09/2006	Application #:	10676636	Filing Dt:	10/01/2003
Title:	Retaining flag value associated with dead result data in freed rename physical register with an indicator to select set-aside register instead for renaming

Patent #:	7056646	Issue Dt:	06/06/2006	Application #:	10676749	Filing Dt:	10/01/2003
Title:	USE OF BASE DEVELOPERS AS IMMERSION LITHOGRAPHY FLUID

Patent #:	6967363	Issue Dt:	11/22/2005	Application #:	10676904	Filing Dt:	10/01/2003
Title:	LATERAL DIODE WITH MULTIPLE SPACERS

Patent #:	6764946	Issue Dt:	07/20/2004	Application #:	10676911	Filing Dt:	10/01/2003
Title:	METHOD OF CONTROLLING LINE EDGE ROUGHNESS IN RESIST FILMS

Patent #:	6879406	Issue Dt:	04/12/2005	Application #:	10677041	Filing Dt:	10/01/2003
Title:	USE OF SCATTEROMETRY AS A CONTROL TOOL IN THE MANUFACTURE OF EXTREME UV MASKS

Patent #:	6849469	Issue Dt:	02/01/2005	Application #:	10677043	Filing Dt:	10/01/2003
Title:	MONITOR AND CONTROL OF SILICIDATION USING FOURIER TRANSFORM INFRARED SCATTEROMETRY

Patent #:	6953755	Issue Dt:	10/11/2005	Application #:	10677911	Filing Dt:	10/02/2003
Publication #:	US20050072919	Pub Dt:	04/07/2005
Title:	TECHNIQUE FOR MONITORING THE STATE OF METAL LINES IN MICROSTRUCTURES

Patent #:	6902977	Issue Dt:	06/07/2005	Application #:	10678445	Filing Dt:	10/03/2003
Title:	METHOD FOR FORMING POLYSILICON GATE ON HIGH-K DIELECTRIC AND RELATED STRUCTURE

Patent #:	6801368	Issue Dt:	10/05/2004	Application #:	10679058	Filing Dt:	10/02/2003
Publication #:	US20040061952	Pub Dt:	04/01/2004
Title:	SYSTEM FOR CONVERTING OPTICAL BEAMS TO COLLIMATED FLAT-TOP BEAMS

Patent #:	7270931	Issue Dt:	09/18/2007	Application #:	10679782	Filing Dt:	10/06/2003
Publication #:	US20050074689	Pub Dt:	04/07/2005
Title:	SILICON-CONTAINING COMPOSITIONS FOR SPIN-ON ARC/HARDMASK MATERIALS

Patent #:	6927454	Issue Dt:	08/09/2005	Application #:	10680820	Filing Dt:	10/07/2003
Publication #:	US20050073014	Pub Dt:	04/07/2005
Title:	SPLIT POLY-SIGE/POLY-SI ALLOY GATE STACK

Patent #:	6956296	Issue Dt:	10/18/2005	Application #:	10681513	Filing Dt:	10/08/2003
Publication #:	US20040071805	Pub Dt:	04/15/2004
Title:	TRANSFER MOLDING OF INTEGRATED CIRCUIT PACKAGES

Patent #:	7268432	Issue Dt:	09/11/2007	Application #:	10683333	Filing Dt:	10/10/2003
Publication #:	US20050079719	Pub Dt:	04/14/2005
Title:	INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY

Patent #:	6924682	Issue Dt:	08/02/2005	Application #:	10683823	Filing Dt:	10/10/2003
Title:	LATCH CIRCUIT WITH METASTABILITY TRAP AND METHOD THEREFOR

Patent #:	6849527	Issue Dt:	02/01/2005	Application #:	10684727	Filing Dt:	10/14/2003
Title:	STRAINED SILICON MOSFET HAVING IMPROVED CARRIER MOBILITY, STRAINED SILICON CMOS DEVICE, AND METHODS OF THEIR FORMATION

Patent #:	7091612	Issue Dt:	08/15/2006	Application #:	10684952	Filing Dt:	10/14/2003
Publication #:	US20050077628	Pub Dt:	04/14/2005
Title:	DUAL DAMASCENE STRUCTURE AND METHOD

Patent #:	6949761	Issue Dt:	09/27/2005	Application #:	10685013	Filing Dt:	10/14/2003
Publication #:	US20050077510	Pub Dt:	04/14/2005
Title:	STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-MOBILITY FIELD-EFFECT TRANSISTOR

Patent #:	7042277	Issue Dt:	05/09/2006	Application #:	10685022	Filing Dt:	10/14/2003
Publication #:	US20050077936	Pub Dt:	04/14/2005
Title:	CIRCUIT AND METHOD FOR REDUCING JITTER IN A PLL OF HIGH SPEED SERIAL LINKS

Patent #:	6920062	Issue Dt:	07/19/2005	Application #:	10685828	Filing Dt:	10/14/2003
Publication #:	US20050078509	Pub Dt:	04/14/2005
Title:	SYSTEM AND METHOD FOR READING DATA STORED ON A MAGNETIC SHIFT REGISTER

Patent #:	6970379	Issue Dt:	11/29/2005	Application #:	10685835	Filing Dt:	10/14/2003
Publication #:	US20050078511	Pub Dt:	04/14/2005
Title:	SYSTEM AND METHOD FOR STORING DATA IN AN UNPATTERNED, CONTINUOUS MAGNETIC LAYER

Patent #:	7169706	Issue Dt:	01/30/2007	Application #:	10687186	Filing Dt:	10/16/2003
Publication #:	US20050085073	Pub Dt:	04/21/2005
Title:	METHOD OF USING AN ADHESION PRECURSOR LAYER FOR CHEMICAL VAPOR DEPOSITION (CVD) COPPER DEPOSITION

Patent #:	6958506	Issue Dt:	10/25/2005	Application #:	10688508	Filing Dt:	10/17/2003
Publication #:	US20040087100	Pub Dt:	05/06/2004
Title:	HIGH-DIELECTRIC CONSTANT INSULATORS FOR FEOL CAPACITORS

Patent #:	7034362	Issue Dt:	04/25/2006	Application #:	10688692	Filing Dt:	10/17/2003
Publication #:	US20050082531	Pub Dt:	04/21/2005
Title:	DOUBLE SILICON-ON-INSULATOR (SOI) METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) STRUCTURES

Patent #:	7628974	Issue Dt:	12/08/2009	Application #:	10689675	Filing Dt:	10/22/2003
Publication #:	US20050089467	Pub Dt:	04/28/2005
Title:	CONTROL OF CARBON NANOTUBE DIAMETER USING CVD OR PECVD GROWTH

Patent #:	6833625	Issue Dt:	12/21/2004	Application #:	10690434	Filing Dt:	10/21/2003
Title:	SELF-ALIGNED BARRIER FORMED WITH AN ALLOY HAVING AT LEAST TWO DOPANT ELEMENTS FOR MINIMIZED RESISTANCE OF INTERCONNECT

Patent #:	7081676	Issue Dt:	07/25/2006	Application #:	10691299	Filing Dt:	10/22/2003
Publication #:	US20040087160	Pub Dt:	05/06/2004
Title:	Structure for controlling the interface roughness of cobalt disilicide

Patent #:	7329446	Issue Dt:	02/12/2008	Application #:	10691882	Filing Dt:	10/23/2003
Publication #:	US20040086741	Pub Dt:	05/06/2004
Title:	DRILL STACK FORMATION

Patent #:	6939664	Issue Dt:	09/06/2005	Application #:	10693199	Filing Dt:	10/24/2003
Publication #:	US20050089792	Pub Dt:	04/28/2005
Title:	LOW-ACTIVATION ENERGY SILICON-CONTAINING RESIST SYSTEM

Patent #:	7244341	Issue Dt:	07/17/2007	Application #:	10693276	Filing Dt:	10/23/2003
Publication #:	US20040206619	Pub Dt:	10/21/2004
Title:	METHOD TO ACHIEVE LOW AND STABLE FERROMAGNETIC COUPLING FIELD

Patent #:	7366342	Issue Dt:	04/29/2008	Application #:	10694299	Filing Dt:	10/27/2003
Publication #:	US20050089211	Pub Dt:	04/28/2005
Title:	SIMULTANEOUS COMPUTATION OF MULTIPLE POINTS ON ONE OR MULTIPLE CUT LINES

Patent #:	7343271	Issue Dt:	03/11/2008	Application #:	10694465	Filing Dt:	10/27/2003
Publication #:	US20050091013	Pub Dt:	04/28/2005
Title:	INCORPORATION OF A PHASE MAP INTO FAST MODEL-BASED OPTICAL PROXIMITY CORRECTION SIMULATION KERNELS TO ACCOUNT FOR NEAR AND MID-RANGE FLARE

Patent #:	7010776	Issue Dt:	03/07/2006	Application #:	10694466	Filing Dt:	10/27/2003
Publication #:	US20050091631	Pub Dt:	04/28/2005
Title:	EXTENDING THE RANGE OF LITHOGRAPHIC SIMULATION INTEGRALS

Patent #:	7287239	Issue Dt:	10/23/2007	Application #:	10694473	Filing Dt:	10/27/2003
Publication #:	US20050091014	Pub Dt:	04/28/2005
Title:	PERFORMANCE IN MODEL-BASED OPC ENGINE UTILIZING EFFICIENT POLYGON PINNING METHOD

Patent #:	7163883	Issue Dt:	01/16/2007	Application #:	10694500	Filing Dt:	10/27/2003
Publication #:	US20040087078	Pub Dt:	05/06/2004
Title:	EDGE SEAL FOR A SEMICONDUCTOR DEVICE

Patent #:	7173303	Issue Dt:	02/06/2007	Application #:	10695335	Filing Dt:	10/28/2003
Publication #:	US20040092060	Pub Dt:	05/13/2004
Title:	FIN FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED GATE

Patent #:	7247924	Issue Dt:	07/24/2007	Application #:	10695336	Filing Dt:	10/28/2003
Publication #:	US20040084754	Pub Dt:	05/06/2004
Title:	METHOD OF CONTROLLING GRAIN SIZE IN A POLYSILICON LAYER AND IN SEMICONDUCTOR DEVICES HAVING POLYSILICON STRUCTURES

Patent #:	8008724	Issue Dt:	08/30/2011	Application #:	10695748	Filing Dt:	10/30/2003
Publication #:	US20050093030	Pub Dt:	05/05/2005
Title:	STRUCTURE AND METHOD TO ENHANCE BOTH NFET AND PFET PERFORMANCE USING DIFFERENT KINDS OF STRESSED LAYERS

Patent #:	6977194	Issue Dt:	12/20/2005	Application #:	10695752	Filing Dt:	10/30/2003
Publication #:	US20050093059	Pub Dt:	05/05/2005
Title:	STRUCTURE AND METHOD TO IMPROVE CHANNEL MOBILITY BY GATE ELECTRODE STRESS MODIFICATION

Patent #:	6927611	Issue Dt:	08/09/2005	Application #:	10696139	Filing Dt:	10/29/2003
Publication #:	US20050093591	Pub Dt:	05/05/2005
Title:	SEMIDIGITAL DELAY-LOCKED LOOP USING AN ANALOG-BASED FINITE STATE MACHINE

Patent #:	7353359	Issue Dt:	04/01/2008	Application #:	10696511	Filing Dt:	10/28/2003
Publication #:	US20050091298	Pub Dt:	04/28/2005
Title:	AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS OF A MATRIX

Patent #:	7329361	Issue Dt:	02/12/2008	Application #:	10696771	Filing Dt:	10/29/2003
Publication #:	US20050095858	Pub Dt:	05/05/2005
Title:	METHOD AND APPARATUS FOR FABRICATING OR ALTERING MICROSTRUCTURES USING LOCAL CHEMICAL ALTERATIONS

Patent #:	7282148	Issue Dt:	10/16/2007	Application #:	10697077	Filing Dt:	10/30/2003
Publication #:	US20050092676	Pub Dt:	05/05/2005
Title:	POROUS SILICON COMPOSITE STRUCTURE AS LARGE FILTRATION ARRAY

Patent #:	7057216	Issue Dt:	06/06/2006	Application #:	10698122	Filing Dt:	10/31/2003
Publication #:	US20050093021	Pub Dt:	05/05/2005
Title:	HIGH MOBILITY HETEROJUNCTION COMPLEMENTARY FIELD EFFECT TRANSISTORS AND METHODS THEREOF

Patent #:	7211300	Issue Dt:	05/01/2007	Application #:	10698884	Filing Dt:	10/31/2003
Publication #:	US20040091638	Pub Dt:	05/13/2004
Title:	METHOD AND APPARATUS FOR PERFORMING LASER CVD

Patent #:	6943444	Issue Dt:	09/13/2005	Application #:	10699122	Filing Dt:	10/30/2003
Publication #:	US20050092007	Pub Dt:	05/05/2005
Title:	COOLING OF SURFACE TEMPERATURE OF A DEVICE

Patent #:	7186446	Issue Dt:	03/06/2007	Application #:	10699226	Filing Dt:	10/31/2003
Publication #:	US20050095443	Pub Dt:	05/05/2005
Title:	PLASMA ENHANCED ALD OF TANTALUM NITRIDE AND BILAYER

Patent #:	7496550	Issue Dt:	02/24/2009	Application #:	10699283	Filing Dt:	10/31/2003
Publication #:	US20050096887	Pub Dt:	05/05/2005
Title:	TECHNIQUES FOR RECONSTRUCTING SYNTHETIC NETWORKS USING PAIR-WISE CORRELATION ANALYSIS

Patent #:	7184714	Issue Dt:	02/27/2007	Application #:	10699667	Filing Dt:	11/04/2003
Title:	FREQUENCY DOMAIN ESTIMATION OF IQ IMBALANCE IN A WIRELESS OFDM DIRECT CONVERSION RECEIVER USING LOOPBACK CONNECTION

Patent #:	6974652	Issue Dt:	12/13/2005	Application #:	10699748	Filing Dt:	11/03/2003
Title:	LITHOGRAPHIC PHOTOMASK AND METHOD OF MANUFACTURE TO IMPROVE PHOTOMASK TEST MEASUREMENT

Patent #:	6984475	Issue Dt:	01/10/2006	Application #:	10699767	Filing Dt:	11/03/2003
Title:	EXTREME ULTRAVIOLET (EUV) LITHOGRAPHY MASKS

Patent #:	7029958	Issue Dt:	04/18/2006	Application #:	10699887	Filing Dt:	11/04/2003
Publication #:	US20050104091	Pub Dt:	05/19/2005
Title:	SELF ALIGNED DAMASCENE GATE

Patent #:	7328339	Issue Dt:	02/05/2008	Application #:	10699947	Filing Dt:	11/03/2003
Title:	METHOD OF TESTING THE ENCRYPTION FUNCTION OF A DEVICE

Patent #:	7555633	Issue Dt:	06/30/2009	Application #:	10700033	Filing Dt:	11/03/2003
Title:	INSTRUCTION CACHE PREFETCH BASED ON TRACE CACHE EVICTION

Patent #:	7084460	Issue Dt:	08/01/2006	Application #:	10700085	Filing Dt:	11/03/2003
Publication #:	US20050093100	Pub Dt:	05/05/2005
Title:	METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES

100

Patent #:	6960774	Issue Dt:	11/01/2005	Application #:	10700175	Filing Dt:	11/03/2003
Publication #:	US20050092939	Pub Dt:	05/05/2005
Title:	FAULT DETECTION AND CONTROL METHODOLOGIES FOR ION IMPLANTATION PROCESSES, AND SYSTEM FOR PERFORMING SAME

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

440 STONE BREAK ROAD EXTENSION

MALTA, NEW YORK 12020

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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