|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08658457
|
Filing Dt:
|
06/05/1996
|
Title:
|
INTERLEVEL DIELECTRIC WITH AIR GAPS TO REDUCE PERMITIVITY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/1997
|
Application #:
|
08658458
|
Filing Dt:
|
06/05/1996
|
Title:
|
A MULTILEVEL INTERCONNECT STRUCTURE OF AN INTEGRATED CIRCUIT FORMED BY A SINGLE VIA ETCH AND DUAL FILL PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08658547
|
Filing Dt:
|
06/05/1996
|
Title:
|
METHOD OF FORMATION OF AN AIR GAP WITHIN A SEMICONDUCTOR DIELECTRIC BY SOLVENT DESORPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08659167
|
Filing Dt:
|
06/05/1996
|
Title:
|
SEMICONDUCTOR INTERLEVEL DIELECTRIC HAVING A POLYMIDE FOR PRODUCING AIR GAPS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08659728
|
Filing Dt:
|
06/06/1996
|
Title:
|
ADDRESS GENERATION AND DATA PATH ARBITRATION TO AND FROM SRAM TO ACCOMMODATE MULTIPLE TRANSMITTED PACKETS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08659733
|
Filing Dt:
|
06/06/1996
|
Title:
|
DATA STRUCTURE TO SUPPORT MULTIPLE TRANSMIT PACKETS FOR HIGH PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08659795
|
Filing Dt:
|
06/06/1996
|
Title:
|
METHOD OF IDENTIFYING END OF PACKET BY WRITING THE ADDRESS OF LAST DATA INTO THE FIRST LOCATION OF THE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08660674
|
Filing Dt:
|
06/05/1996
|
Title:
|
METHOD OF FORMING A RECESSED INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1998
|
Application #:
|
08662164
|
Filing Dt:
|
06/12/1996
|
Title:
|
PRINTED CIRCUT BOARD WITH EMBEDDED DECOUPLING CAPACITANCE AND METHOD FOR PRODUCING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08662217
|
Filing Dt:
|
06/12/1996
|
Title:
|
TRENCH ISOLATION OF FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
08666017
|
Filing Dt:
|
06/19/1996
|
Title:
|
NITROGENATED GATE STRUCTURE FOR IMPROVED TRANSISTOR PERFORMANCE AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08666457
|
Filing Dt:
|
06/27/1996
|
Title:
|
METHOD AND APPARATUS FOR MULTIUSER-INTERFERENCE REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/1998
|
Application #:
|
08666696
|
Filing Dt:
|
06/18/1996
|
Title:
|
SIMPLIFIED BUFFER MANIPULATION USING STANDARD REPOWERING FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2000
|
Application #:
|
08668017
|
Filing Dt:
|
06/17/1996
|
Title:
|
METHOD OF PRODUCING PLANAR METAL-TO-METAL CAPACITOR FOR USE IN INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/1999
|
Application #:
|
08668048
|
Filing Dt:
|
06/18/1996
|
Title:
|
HIGH SPEED ELECTRON BEAM LITHOGRAPHY PATTERN PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08671030
|
Filing Dt:
|
06/24/1996
|
Title:
|
PARALLEL HIERARCHICAL TIMING CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08671439
|
Filing Dt:
|
06/27/1996
|
Title:
|
DEPENDENCY CHECKING AND FORWARDING OF VARIABLE WIDTH OPERANDS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08671831
|
Filing Dt:
|
10/09/1996
|
Title:
|
INTERRUPT CONTROLLER OPTIMIZED FOR POWER MANAGEMENT IN A COMPUTER SYSTEM OR SUBSYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08671903
|
Filing Dt:
|
06/28/1996
|
Title:
|
INTEGRATED PAD AND FUSE STRUCTURE FOR PLANAR COPPER METALLURGY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2001
|
Application #:
|
08672290
|
Filing Dt:
|
06/28/1996
|
Title:
|
MANUFACTURING COMPUTER SYSTEMS WITH FINE LINE CIRCUITIZED SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/1997
|
Application #:
|
08672683
|
Filing Dt:
|
06/28/1996
|
Title:
|
CONSTRUCTION THAT PREVENTS THE UNDERCUT OF INTERCONNECT LINES IN PLASMA METAL ETCH SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08672882
|
Filing Dt:
|
06/28/1996
|
Title:
|
HEATED CIRCUIT ASSEMBLY TESTER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08674081
|
Filing Dt:
|
07/01/1996
|
Title:
|
METHOD FOR PRODUCING A LOW RESISTIVITY POLYCIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08675310
|
Filing Dt:
|
07/01/1996
|
Title:
|
PROGRAMMABLE DRIVE STRENGTH OUTPUT BUFFER WITH SLEW RATE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08677406
|
Filing Dt:
|
07/09/1996
|
Title:
|
PRECHARGING AN OUTPUT PERIPHERAL FOR A DIRECT MEMORY ACCESS OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08678442
|
Filing Dt:
|
07/03/1996
|
Title:
|
SOI CMOS STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08679650
|
Filing Dt:
|
07/12/1996
|
Title:
|
METHOD AND SYSTEM FOR ASSIGNING PERIPHERAL DEVICE ADDRESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08681105
|
Filing Dt:
|
07/22/1996
|
Title:
|
CACHE SYSTEM AND METHOD USING TAGGED CACHE LINES FOR MATCHING CACHE STRATEGY TO I/O APPLICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/1997
|
Application #:
|
08682493
|
Filing Dt:
|
07/17/1996
|
Title:
|
METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08683837
|
Filing Dt:
|
07/18/1996
|
Title:
|
NONINVASIVE OPTICAL METHOD FOR MEASURING INTERNAL SWITCHING AND OTHER DYNAMIC PARAMETERS OF CMOS CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08684701
|
Filing Dt:
|
07/19/1996
|
Title:
|
COMPUTER SYSTEM HAVING DISTRIBUTED COMPRESSION AND DECOMPRESSION LOGIC FOR COMPRESSED DATA MOVEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08685655
|
Filing Dt:
|
07/24/1996
|
Title:
|
MICROPROCESSOR CONFIGURED TO SIMULTANEOUSLY DISPATCH MICROCODE AND DIRECTLY-DECODED INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08686241
|
Filing Dt:
|
07/23/1996
|
Title:
|
METHOD OF MAKING AN ELECTRONIC PACKAGE HAVING SPACER ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/1998
|
Application #:
|
08687857
|
Filing Dt:
|
07/26/1996
|
Title:
|
RAPID THERMAL ANNEAL SYSTEM AND METHOD INCLUDING IMPROVED TEMPERATURE SENSING AND MONITORING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/1999
|
Application #:
|
08687859
|
Filing Dt:
|
07/26/1996
|
Title:
|
VERTICAL WAVETABLE CACHE ARCHITECTURE IN WHICH THE NUMBER OF QUEUES IS SUBSTANTIALLY SMALLER THAN THE TOTAL NUMBER OF VOICES STORED IN THE SYSTEM MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
08688073
|
Filing Dt:
|
07/29/1996
|
Title:
|
COLUMN GRID ARRAY SUBSTRATE ATTACHMENT WITH HEAT SINK STRESS RELIEF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08689546
|
Filing Dt:
|
08/09/1996
|
Title:
|
PERSONAL COMMUNICATOR INCLUDING A HANDSET PHONE WITH AN INTEGRATED VIRTUAL IMAGE DISPLAY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
08690382
|
Filing Dt:
|
07/26/1996
|
Title:
|
APPARATUS FOR ALIGNING INSTRUCTIONS USING PREDECODED SHIFT AMOUNTS EACH SHIFT AMOUNT IDENTIFYING A PATTICULAR INSTRUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/1999
|
Application #:
|
08690384
|
Filing Dt:
|
07/26/1996
|
Title:
|
A SUPERSCALAR MICPROCESSOR HAVING SYMMETRICAL FIXED ISSUE POSITIONS EACH CONFIGURED TO EXECUTE A PARTICULAR SUBSET OF INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08690385
|
Filing Dt:
|
07/26/1996
|
Title:
|
REORDER BUFFER CONFIGURED TO ALLOCATE STORGE CAPABLE OF STORING RESULTS CORRESPONDING TO A MAXIMUM NUMBER OF CONCURRENTLY RECEIVABLE INSTRUCTIONS REGARDLESS OF A NUMBER OF INSTRUCTIONS RECEIVED
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08691053
|
Filing Dt:
|
08/01/1996
|
Title:
|
ON-CHIP TRANSFORMERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08692689
|
Filing Dt:
|
08/06/1996
|
Title:
|
METHOD AND APPARATUS FOR PRIORITIZING TRAFFIC IN HALF-DUPLEX NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08693815
|
Filing Dt:
|
07/15/1996
|
Title:
|
THIN FILM MATERIALS FOR THE PREPARATION OF ATTENUATING PHASE SHIFT MASKS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08696398
|
Filing Dt:
|
08/14/1996
|
Title:
|
PHOTOSENSITIVE REWORKABLE ENCAPSULANT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08696733
|
Filing Dt:
|
08/14/1996
|
Title:
|
MICROCONTROLLER CONFIGURED TO CONVEY DATA CORRESPONDING TO INTERNAL MEMORY ACCESSES EXTERNALLY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/1997
|
Application #:
|
08696734
|
Filing Dt:
|
08/14/1996
|
Title:
|
METHOD FOR TESTING INTEGRATED MEMORY USING AN INTEGRATED DMA CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08697655
|
Filing Dt:
|
08/28/1996
|
Title:
|
PLANAR REDISTRIBUTION STRUCTURE AND PRINTED WIRING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08698102
|
Filing Dt:
|
08/15/1996
|
Title:
|
A SYSTEM FOR SELECTIVELY REDUCING CAPTURE EFFECT IN A NETWORK STATION BY INCREASING DELAY TIME AFTER A PREDETERMINED NUMBER OF CONSECUTIVE SUCCESSFUL TRANSMISSIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08698185
|
Filing Dt:
|
08/15/1996
|
Title:
|
METHOD AND SYSTEM FOR INCREASING NETWORK INFORMATION CARRIED IN A DATA PACKET VIA PACKET TAGGING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08700129
|
Filing Dt:
|
08/20/1996
|
Title:
|
POWER MANAGEMENT CONTROL TECHNIQUE FOR TIMER TICK ACTIVITY WITHIN AN INTERRUPT DRIVEN COMPUTER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08700261
|
Filing Dt:
|
08/20/1996
|
Title:
|
CLOCK SKEW MINIMIZATION SYSTEM AND METHOD FOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08702057
|
Filing Dt:
|
08/23/1996
|
Title:
|
METHOD OF OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08702058
|
Filing Dt:
|
08/23/1996
|
Title:
|
MASK FOR OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING AND INTEGRATED CIRCUIT PRODUCED THEREFROM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/1998
|
Application #:
|
08703273
|
Filing Dt:
|
08/26/1996
|
Title:
|
METHOD OF FORMING A SHALLOW JUNCTION BY DIFFUSION FROM A SILICON-BASED SPACER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08704193
|
Filing Dt:
|
08/28/1996
|
Title:
|
METHOD AND APPARATUS FOR POLISHING METAL SURFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08705033
|
Filing Dt:
|
08/29/1996
|
Title:
|
INTERRUPT HANDLING THAT DISABLES INTERRUPTS SAVING THE REGISTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08706155
|
Filing Dt:
|
08/30/1996
|
Title:
|
PLANARIZING APPARATUS WITH DEFLECTABLE POLISHING PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08706212
|
Filing Dt:
|
08/30/1996
|
Title:
|
DYNAMIC LATCHING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08706317
|
Filing Dt:
|
08/30/1996
|
Title:
|
ARRANGEMENT FOR REGULATING PACKET FLOW RATE IN SHARED-MEDIUM, POINT-TO-POINT, AND SWITCHED NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08709889
|
Filing Dt:
|
09/11/1996
|
Title:
|
ARRANGEMENT FOR INITIATING AND MAINTAINING FLOW CONTROL IN SHARED-MEDIUM, FULL-DUPLEX, AND SWITCHED NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08709960
|
Filing Dt:
|
09/09/1996
|
Title:
|
SELF-ALLIGNING LOW PROFILE SOCKET FOR CONNECTING BALL GRID ARRAY DEVICES THROUGH A DENDRITIC INTERPOSER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08710071
|
Filing Dt:
|
09/10/1996
|
Title:
|
PRODUCTION WORTHY INTERCONNECT PROCESS FOR DEEP SUB-HALF MICROMETER BACK-END-OF-LINE TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08710560
|
Filing Dt:
|
09/19/1996
|
Title:
|
CACHE LINE BRANCH PREDICTION SCHEME THAT SHARES AMONG SETS OF A SET ASSOCIATIVE CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08711112
|
Filing Dt:
|
09/09/1996
|
Title:
|
METHOD OF OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08711382
|
Filing Dt:
|
09/03/1996
|
Title:
|
METHOD OF MAKING AN ASYMMETRICAL TRANSISTOR WITH LIGHTLY AND HEAVILY DOPED DRAIN REGIONS AND ULTRA-HEAVILY DOPED DRAIN REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08711748
|
Filing Dt:
|
09/10/1996
|
Title:
|
LOW PROFILE SUBSTRATE GROUND PROBE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08711880
|
Filing Dt:
|
09/12/1996
|
Title:
|
SUPERSCALAR MICROPROCESSOR EMPLOYING A FUTURE FILE FOR STORING RESULTS INTO MULTIPORTION REGISTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08712867
|
Filing Dt:
|
09/12/1996
|
Title:
|
SYSTEM AND METHOD FOR SIMULATING A MULTIPROCESSOR ENVIRONMENT FOR TESTING A MULTIPROCESSING INTERRUPT CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08713063
|
Filing Dt:
|
09/12/1996
|
Title:
|
METHOD AND SYSTEM FOR IDENTIFYING AN ERROR CONDITION DUE TO A FAULTY CABLE CONNECTION IN AN ETHERNET NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08713281
|
Filing Dt:
|
09/12/1996
|
Title:
|
ULTRA SHORT TRENCH TRANSISTORS AND PROCESS FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
08713386
|
Filing Dt:
|
09/13/1996
|
Title:
|
METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08713388
|
Filing Dt:
|
09/13/1996
|
Title:
|
METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08713489
|
Filing Dt:
|
09/13/1996
|
Title:
|
REDUCING THE PIN COURT WITHIN A SWITCHING ELEMENT THROUGH THE USE OF A MULTIPLEXER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08713640
|
Filing Dt:
|
09/13/1996
|
Title:
|
MEMORY DEVICE HAVING PROGRAMMABLE DEVICE WIDTH, METHOD OF PROGRAMMING, AND METHOD OF SETTING DEVICE WIDTH FOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08714317
|
Filing Dt:
|
09/18/1996
|
Title:
|
SHORT CHANNEL SELF ALIGNED VMOS FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08714558
|
Filing Dt:
|
09/16/1996
|
Title:
|
ADDRESS ADMINISTRATION FOR 100BASE-T PHY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/1998
|
Application #:
|
08715212
|
Filing Dt:
|
09/17/1996
|
Title:
|
THERMALLY ENHANCED FLIP CHIP PACKAGE AND METHOD OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2000
|
Application #:
|
08715287
|
Filing Dt:
|
09/16/1996
|
Title:
|
FREQUENCY DOUBLING HYBRID PHOTORESIST HAVING NEGATIVE AND POSITIVE TONE COMPONENTS AND METHOD OF PREPARING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/1998
|
Application #:
|
08716764
|
Filing Dt:
|
09/23/1996
|
Title:
|
PROGRAM COUNTER UPDATE MECHANISM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08717981
|
Filing Dt:
|
09/23/1996
|
Title:
|
METHOD FOR FORMING ADVANCED TRANSISTORS STRUCTURES WITH OPTIMUM SHORT CHANNEL CONTROLS FOR HIGH DENSITY/HIGH PERFORMANCE INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/1998
|
Application #:
|
08718710
|
Filing Dt:
|
09/24/1996
|
Title:
|
APPARATUS AND METHOD FOR DETERMINING A NUMBER OF DIGITS LEADING A PARTICULAR DIGIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08719826
|
Filing Dt:
|
09/30/1996
|
Title:
|
METHOD AND APPARATUS FOR DIRECTING THE INPUT/OUTPUT CONNECTION OF INTEGRATED CIRCUIT CHIP CUBE CONFIGURATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08721072
|
Filing Dt:
|
09/26/1996
|
Title:
|
SEMICONDUCTOR LASERS AND METHOD FOR MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/1997
|
Application #:
|
08721211
|
Filing Dt:
|
09/26/1996
|
Title:
|
PREPAGING DURING PCI MASTER INITIATED WAIT CYCLES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
08722283
|
Filing Dt:
|
09/27/1996
|
Title:
|
BRANCHED ELECTRICALLY CONDUCTIVE POLYMERS AND PRECURSORS AND APPLICATIONS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08722284
|
Filing Dt:
|
09/27/1996
|
Title:
|
METHODS OF FABRICATING BRANCHED ELECTRIALLY CONDUCTIVE POLYMERS AND PRECURSORS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08724877
|
Filing Dt:
|
10/03/1996
|
Title:
|
INORGANIC SEAL FOR ENCAPSULATION OF AN ORGANIC LAYER AND METHOD FOR MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08726113
|
Filing Dt:
|
10/04/1996
|
Title:
|
ULTRA SHALLOW JUNCTION FORMATION USING AMORPHOUS SILICON LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08726722
|
Filing Dt:
|
10/07/1996
|
Title:
|
METHOD AND SYSTEM FOR CHARACTERIZING INTERCONNECT DATA WITHIN AN INTEGRATED CIRCUIT FOR FACILITATING PARASITIC CAPACITANCE ESTIMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08727050
|
Filing Dt:
|
10/08/1996
|
Title:
|
MULTILEVEL TRANSISTOR FABRICATION METHOD HAVING AN INVERTED, UPPER LEVEL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08727358
|
Filing Dt:
|
10/08/1996
|
Title:
|
INTEGRATED CIRCUIT EMPLOYING SIMULTANEOUSLY FORMED ISOLATION AND TRANSISTOR TRENCHES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08728225
|
Filing Dt:
|
10/10/1996
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING WITHOUT UNDERCUTTING CONDUCTIVE LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08729638
|
Filing Dt:
|
10/21/1996
|
Title:
|
INTERCONNECT BUS CONFIGURED TO IMPLEMENT MULTIPLE TRANSFER PROTOCOLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08729810
|
Filing Dt:
|
10/08/1996
|
Title:
|
MULTI-LEVEL TRANSISTOR FABRICATION METHOD HAVING AN INVERTED, UPPER LEVEL TRANSISTOR WHICH SHARES A GATE CONDUCTOR WITH A NON-INVERTED, LOWER LEVEL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08730725
|
Filing Dt:
|
10/11/1996
|
Title:
|
DETERMINING THE NUMBER OF ACTIVE NODES ON AN ETHERNET NETWORK BY COUNTING A NUMBER OF PACKET RECEPTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08730839
|
Filing Dt:
|
10/17/1996
|
Title:
|
NITRIDE CAP FORMATION IN A DRAM TRENCH CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08731028
|
Filing Dt:
|
10/08/1996
|
Title:
|
ELECTRODE RESHAPING IN A SEMICONDUCTOR ETCHING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08731825
|
Filing Dt:
|
10/21/1996
|
Title:
|
INTER-CHIP BUS WITH FAIR ACCESS FOR MULTIPLE DATA PIPES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08731941
|
Filing Dt:
|
10/22/1996
|
Title:
|
SILICON-ON-INSULATOR BODY-COUPLED GATED DIODE FOR ELECTROSTATIC DISCHARGE (ESD) AND ANALOG APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08731956
|
Filing Dt:
|
10/23/1996
|
Title:
|
ARCHITECTURE FOR A UNIVERSAL SERIAL BUS-BASED PC SPEAKER CONTROLLER
|
|