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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
08/21/2007
Application #:
10931100
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
APPARATUS, SYSTEM, AND METHOD FOR REDUCING ROTATIONAL VIBRATION TRANSMISSION WITHIN A DATA STORAGE SYSTEM
2
Patent #:
Issue Dt:
09/05/2006
Application #:
10931660
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
03/02/2006
Title:
BIPOLAR TRANSISTOR WITH EXTRINSIC STRESS LAYER
3
Patent #:
Issue Dt:
11/28/2006
Application #:
10932598
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF PRODUCING SILICON-GERMANIUM-ON-INSULATOR MATERIAL USING UNSTRAINED GE-CONTAINING SOURCE LAYERS
4
Patent #:
Issue Dt:
08/29/2006
Application #:
10932982
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/03/2005
Title:
ULTRA-THIN SILICON-ON-INSULATOR AND STRAINED-SILICON-DIRECT-ON-INSULATOR WITH HYBRID CRYSTAL ORIENTATIONS
5
Patent #:
Issue Dt:
07/07/2009
Application #:
10932999
Filing Dt:
09/02/2004
Title:
METHOD AND APPARATUS FOR DYNAMIC ADJUSTMENT OF A SENSOR SAMPLING RATE
6
Patent #:
Issue Dt:
10/14/2008
Application #:
10933051
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/02/2006
Title:
COOLING OF SUBSTRATE USING INTERPOSER CHANNELS
7
Patent #:
Issue Dt:
08/29/2006
Application #:
10934121
Filing Dt:
09/02/2004
Title:
CHARACTERIZING DISTRIBUTION SIGNATURES IN INTEGRATED CIRCUIT TECHNOLOGY
8
Patent #:
Issue Dt:
05/30/2006
Application #:
10934192
Filing Dt:
09/03/2004
Title:
SYSTEM AND METHOD USING IN SITU SCATTEROMETRY TO DETECT PHOTORESIST PATTERN INTEGRITY DURING THE PHOTOLITHOGRAPHY PROCESS
9
Patent #:
Issue Dt:
07/03/2007
Application #:
10939230
Filing Dt:
09/10/2004
Publication #:
Pub Dt:
03/16/2006
Title:
FLEXURE PLATE FOR MAINTAINING CONTACT BETWEEN A COOLING PLATE/HEAT SINK AND A MICROCHIP
10
Patent #:
Issue Dt:
06/26/2007
Application #:
10939736
Filing Dt:
09/13/2004
Publication #:
Pub Dt:
03/16/2006
Title:
METHOD OF CREATING DEFECT FREE HIGH GE CONTENT (>25%) SIGE-ON-INSULATOR (SGOI) SUBSTRATES USING WAFER BONDING TECHNIQUES
11
Patent #:
Issue Dt:
12/04/2007
Application #:
10940543
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
03/16/2006
Title:
POWER NETWORK RECONFIGURATION USING MEM SWITCHES
12
Patent #:
Issue Dt:
01/24/2006
Application #:
10946071
Filing Dt:
09/22/2004
Title:
COPPER DAMASCENE WITH LOW-K CAPPING LAYER AND IMPROVED ELECTROMIGRATION RELIABILITY
13
Patent #:
Issue Dt:
08/24/2010
Application #:
10946653
Filing Dt:
09/20/2004
Title:
MULTI-GIGABIT PER SECOND COMPUTING OF THE RIJNDAEL INVERSE CIPHER
14
Patent #:
Issue Dt:
09/23/2008
Application #:
10948421
Filing Dt:
09/23/2004
Publication #:
Pub Dt:
05/19/2005
Title:
LAYER TRANSFER OF LOW DEFECT SIGE USING AN ETCH-BACK PROCESS
15
Patent #:
Issue Dt:
01/06/2009
Application #:
10948772
Filing Dt:
09/23/2004
Publication #:
Pub Dt:
03/23/2006
Title:
SINGLE PASS VARIABLE BIT RATE CONTROL STRATEGY AND ENCODER FOR PROCESSING A VIDEO FRAME OF A SEQUENCE OF VIDEO FRAMES
16
Patent #:
Issue Dt:
08/29/2006
Application #:
10949837
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
02/17/2005
Title:
MULTILAYER INTERCONNECT STRUCTURE CONTAINING AIR GAPS AND METHOD FOR MAKING
17
Patent #:
Issue Dt:
04/15/2008
Application #:
10951745
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SILICON-ON-INSULATOR WAFER HAVING REENTRANT SHAPE DIELECTRIC TRENCHES
18
Patent #:
Issue Dt:
03/13/2007
Application #:
10952269
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
02/24/2005
Title:
METHOD AND APPARATUS FOR ADDRESS DECODING OF EMBEDDED DRAM DEVICES
19
Patent #:
Issue Dt:
02/06/2007
Application #:
10953378
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/10/2005
Title:
INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY
20
Patent #:
Issue Dt:
04/14/2009
Application #:
10956466
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SYSTEM AND METHOD FOR TOLERATING MULTIPLE STORAGE DEVICE FAILURES IN A STORAGE SYSTEM WITH CONSTRAINED PARITY IN-DEGREE
21
Patent #:
Issue Dt:
11/13/2007
Application #:
10956537
Filing Dt:
10/01/2004
Title:
COMBINED SYSTEM RESPONSES IN A CHIP MULTIPROCESSOR
22
Patent #:
Issue Dt:
08/14/2007
Application #:
10956560
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
04/06/2006
Title:
DYNAMIC RECONFIGURATION OF CACHE MEMORY
23
Patent #:
Issue Dt:
12/30/2008
Application #:
10956561
Filing Dt:
10/01/2004
Title:
RECONFIGURABLE PROCESSING NODE INCLUDING FIRST AND SECOND PROCESSOR CORES
24
Patent #:
Issue Dt:
01/16/2007
Application #:
10956650
Filing Dt:
10/01/2004
Title:
PROCESSING NODE INCLUDING A PLURALITY OF PROCESSOR CORES AND AN INTERCONNECT CONFIGURABLE IN A TEST-MODE TO CAUSE FIRST AND SECOND TRANSACTION SOURCE INDICATORS TO BE INTERCHANGED
25
Patent #:
Issue Dt:
08/07/2007
Application #:
10956851
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
03/17/2005
Title:
SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME
26
Patent #:
Issue Dt:
06/03/2008
Application #:
10957250
Filing Dt:
10/01/2004
Title:
SHARED RESOURCES IN A CHIP MULTIPROCESSOR
27
Patent #:
Issue Dt:
09/21/2010
Application #:
10957367
Filing Dt:
10/01/2004
Title:
SURFACE TREATMENT WITH AN ACIDIC COMPOSITION TO PREVENT SUBSTRATE AND ENVIRONMENTAL CONTAMINATION
28
Patent #:
Issue Dt:
01/23/2007
Application #:
10957833
Filing Dt:
10/04/2004
Publication #:
Pub Dt:
02/24/2005
Title:
SOI WAFERS WITH 30-100 ¿ BURIED OXIDE (BOX) CREATED BY WAFER BONDING USING 30-100 ¿ THIN OXIDE AS BONDING LAYER
29
Patent #:
Issue Dt:
11/13/2007
Application #:
10958834
Filing Dt:
10/05/2004
Title:
METHOD AND SYSTEM FOR DYNAMICALLY SELECTING WAFER LOTS FOR METROLOGY PROCESSING
30
Patent #:
Issue Dt:
07/11/2006
Application #:
10958891
Filing Dt:
10/05/2004
Publication #:
Pub Dt:
04/06/2006
Title:
METHOD AND SYSTEM FOR DYNAMICALLY ADJUSTING METROLOGY SAMPLING BASED UPON AVAILABLE METROLOGY CAPACITY
31
Patent #:
Issue Dt:
09/30/2008
Application #:
10959938
Filing Dt:
10/06/2004
Publication #:
Pub Dt:
04/21/2005
Title:
SYSTEM AND METHOD OF TRANSFER PRINTING AN ORGANIC SEMICONDUCTOR
32
Patent #:
Issue Dt:
07/24/2007
Application #:
10960730
Filing Dt:
10/07/2004
Publication #:
Pub Dt:
04/13/2006
Title:
ARCHITECTURAL LEVEL THROUGHPUT BASED POWER MODELING METHODOLOGY AND APPARATUS FOR PERVASIVELY CLOCK-GATED PROCESSOR CORES
33
Patent #:
Issue Dt:
05/29/2012
Application #:
10961347
Filing Dt:
10/08/2004
Publication #:
Pub Dt:
04/13/2006
Title:
SOLID IMMERSION LENS LITHOGRAPHY
34
Patent #:
Issue Dt:
05/29/2007
Application #:
10962121
Filing Dt:
10/08/2004
Publication #:
Pub Dt:
03/31/2005
Title:
METHODS FOR MODELING LATCH TRANSPARENCY
35
Patent #:
Issue Dt:
11/15/2005
Application #:
10962582
Filing Dt:
10/13/2004
Title:
ARRAY OF GATE DIELECTRIC STRUCTURES TO MEASURE GATE DIELECTRIC THICKNESS AND PARASITIC CAPACITANCE
36
Patent #:
Issue Dt:
01/20/2009
Application #:
10963475
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
04/20/2006
Title:
APPARATUS, SYSTEM, AND METHOD FOR FACILITATING PORT TESTING OF A MULTI-PORT HOST ADAPTER
37
Patent #:
Issue Dt:
10/16/2007
Application #:
10964882
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
MODIFIED VIA BOTTOM STRUCTURE FOR RELIABILITY ENHANCEMENT
38
Patent #:
Issue Dt:
04/14/2009
Application #:
10964884
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
01/19/2006
Title:
Combined command and response on-chip data interface for a computer system chipset
39
Patent #:
Issue Dt:
05/29/2007
Application #:
10965031
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD OF FORMING LOW RESISTANCE AND RELIABLE VIA IN INTER-LEVEL DIELECTRIC INTERCONNECT
40
Patent #:
Issue Dt:
02/12/2008
Application #:
10966202
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
04/20/2006
Title:
MICROELECTRONIC DEVICES AND METHODS
41
Patent #:
Issue Dt:
07/17/2007
Application #:
10966492
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD FOR OPTIMIZING INTEGRATED CIRCUIT DEVICE DESIGN AND SERVICE
42
Patent #:
Issue Dt:
02/14/2006
Application #:
10967845
Filing Dt:
10/18/2004
Title:
REFRACTIVE INDEX SYSTEM MONITOR AND CONTROL FOR IMMERSION LITHOGRAPHY
43
Patent #:
Issue Dt:
09/16/2008
Application #:
10968181
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
04/20/2006
Title:
SYSTEM AND METHOD FOR SENSOR REPLICATION FOR ENSEMBLE AVERAGING IN MICRO-ELECTROMECHANICAL SYSTEMS (MEMS)
44
Patent #:
Issue Dt:
10/14/2008
Application #:
10968917
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SYSTEM AND METHOD FOR PROBLEM DETERMINATION USING DEPENDENCY GRAPHS AND RUN-TIME BEHAVIOR MODELS
45
Patent #:
Issue Dt:
05/27/2008
Application #:
10969684
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
03/17/2005
Title:
METHOD OF MAKING A PRINTED WIRING BOARD WITH CONFORMALLY PLATED CIRCUIT TRACES
46
Patent #:
Issue Dt:
02/20/2007
Application #:
10970239
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
06/30/2005
Title:
MESSAGE BASED TRANSPORT MECHANISM FOR LEVEL SENSITIVE INTERRUPTS
47
Patent #:
Issue Dt:
05/23/2006
Application #:
10970266
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
12/01/2005
Title:
DIGITALLY CONTROLLED FILTER TUNING FOR WLAN COMMUNICATION DEVICES
48
Patent #:
Issue Dt:
06/24/2008
Application #:
10970469
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
04/27/2006
Title:
METHOD, SYSTEM AND PROGRAM PRODUCT FOR DEFINING AND RECORDING MINIUM AND MAXIMUM EVENT COUNTS OF A SIMULATION UTILIZING A HIGH LEVEL LANGUAGE
49
Patent #:
Issue Dt:
11/28/2006
Application #:
10973366
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SRAM RING OSCILLATOR
50
Patent #:
Issue Dt:
07/03/2007
Application #:
10973871
Filing Dt:
10/26/2004
Title:
HEAT REMOVAL IN SOI DEVICES USING A BURIED OXIDE LAYER/CONDUCTIVE LAYER COMBINATION
51
Patent #:
Issue Dt:
12/19/2006
Application #:
10974119
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
06/02/2005
Title:
TECHNIQUE FOR FORMING A GATE ELECTRODE BY USING A HARD MASK
52
Patent #:
Issue Dt:
11/21/2006
Application #:
10974232
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
05/05/2005
Title:
ADVANCED TECHNIQUE FOR FORMING A TRANSISTOR HAVING RAISED DRAIN AND SOURCE REGIONS
53
Patent #:
Issue Dt:
01/03/2006
Application #:
10975473
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
03/17/2005
Title:
DUAL SILICON LAYER FOR CHEMICAL MECHANICAL POLISHING PLANARIZATION
54
Patent #:
Issue Dt:
02/10/2009
Application #:
10976068
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
04/28/2005
Title:
ALUMINUM NITRIDE AND ALUMINUM OXIDE/ALUMINUM NITRIDE HETEROSTRUCTURE GATE DIELECTRIC STACK BASED FIELD EFFECT TRANSISTORS AND METHOD FOR FORMING SAME
55
Patent #:
Issue Dt:
12/13/2005
Application #:
10976598
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/05/2005
Title:
MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
56
Patent #:
Issue Dt:
06/30/2009
Application #:
10977159
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
METHOD FOR HIGH-DENSITY PACKAGING AND COOLING OF HIGH-POWERED COMPUTE AND STORAGE SERVER BLADES
57
Patent #:
Issue Dt:
10/30/2007
Application #:
10977432
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/18/2006
Title:
DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA
58
Patent #:
Issue Dt:
07/10/2007
Application #:
10977768
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
FINFET BODY CONTACT STRUCTURE
59
Patent #:
Issue Dt:
06/10/2008
Application #:
10978056
Filing Dt:
10/30/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN
60
Patent #:
Issue Dt:
10/24/2006
Application #:
10978067
Filing Dt:
10/28/2004
Publication #:
Pub Dt:
05/04/2006
Title:
POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES
61
Patent #:
Issue Dt:
05/25/2010
Application #:
10978183
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
CLOCK SCALING CIRCUIT
62
Patent #:
Issue Dt:
01/11/2011
Application #:
10978389
Filing Dt:
11/02/2004
Publication #:
Pub Dt:
05/18/2006
Title:
SYSTEM AND METHOD FOR RECOVERY OF DATA FOR A LOST SECTOR IN A STORAGE SYSTEM
63
Patent #:
Issue Dt:
01/02/2007
Application #:
10978604
Filing Dt:
11/01/2004
Title:
REAL TIME IMMERSION MEDIUM CONTROL USING SCATTEROMETRY
64
Patent #:
Issue Dt:
09/25/2007
Application #:
10978715
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
05/04/2006
Title:
HETERO-INTEGRATED STRAINED SILICON N-AND P-MOSFETS
65
Patent #:
Issue Dt:
06/20/2006
Application #:
10979367
Filing Dt:
11/01/2004
Title:
OPTICAL MONITORING AND CONTROL OF TWO LAYERS OF LIQUID IMMERSION MEDIA
66
Patent #:
Issue Dt:
08/28/2007
Application #:
10979381
Filing Dt:
11/02/2004
Title:
METHOD AND SYSTEM FOR CONVERTING TOOL PROCESS ABILITY BASED UPON WORK IN PROGRESS CHARACTERISTICS
67
Patent #:
Issue Dt:
01/09/2007
Application #:
10980220
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
07/07/2005
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
68
Patent #:
Issue Dt:
01/22/2008
Application #:
10980365
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SILICON CONTAINING TARC / BARRIER LAYER
69
Patent #:
Issue Dt:
02/26/2008
Application #:
10981233
Filing Dt:
11/04/2004
Publication #:
Pub Dt:
05/04/2006
Title:
HARDMASK FOR RELIABILITY OF SILICON BASED DIELECTRICS
70
Patent #:
Issue Dt:
03/13/2012
Application #:
10981926
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
03/24/2005
Title:
DUAL MAGNETIC TUNNEL JUNCTION SENSOR WITH A LONGITUDINAL BIAS STACK
71
Patent #:
Issue Dt:
12/04/2007
Application #:
10982411
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
06/16/2005
Title:
USE OF HYDROGEN IMPLANTATION TO IMPROVE MATERIAL PROPERTIES OF SILICON-GERMANIUM-ON-INSULATOR MATERIAL MADE BY THERMAL DIFFUSION
72
Patent #:
Issue Dt:
10/04/2011
Application #:
10982575
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
05/11/2006
Title:
METHOD FOR THERMAL CHARACTERIZATION UNDER NON-UNIFORM HEAT LOAD
73
Patent #:
Issue Dt:
03/27/2007
Application #:
10983345
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SYSTEM AND METHOD FOR PLASMA INDUCED MODIFICATION AND IMPROVEMENT OF CRITICAL DIMENSION UNIFORMITY
74
Patent #:
Issue Dt:
07/15/2008
Application #:
10983819
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
06/16/2005
Title:
AUTOMATIC METHOD FOR ROUTING AND DESIGNING AN LSI
75
Patent #:
Issue Dt:
04/18/2006
Application #:
10984055
Filing Dt:
11/09/2004
Publication #:
Pub Dt:
05/05/2005
Title:
MAGNETIC SHIFT REGISTER WITH SHIFTABLE MAGNETIC DOMAINS BETWEEN TWO REGIONS, AND METHOD OF USING THE SAME
76
Patent #:
Issue Dt:
07/01/2008
Application #:
10984439
Filing Dt:
11/09/2004
Publication #:
Pub Dt:
04/21/2005
Title:
SACRIFICIAL METAL SPACER DAMASCENE PROCESS
77
Patent #:
Issue Dt:
01/17/2006
Application #:
10984578
Filing Dt:
11/09/2004
Publication #:
Pub Dt:
04/21/2005
Title:
HIGH-DENSITY FINFET INTEGRATION SCHEME
78
Patent #:
Issue Dt:
03/20/2007
Application #:
10985453
Filing Dt:
11/10/2004
Publication #:
Pub Dt:
05/11/2006
Title:
RANDOM ACCESS MEMORY WITH STABILITY ENHANCEMENT AND EARLY READ ELIMINATION
79
Patent #:
Issue Dt:
12/11/2007
Application #:
10986399
Filing Dt:
11/10/2004
Publication #:
Pub Dt:
05/11/2006
Title:
STRAINED FULLY DEPLETED SILICON ON INSULATOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
80
Patent #:
Issue Dt:
03/03/2009
Application #:
10986577
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
METHOD AND SYSTEM FOR SUPERVISOR PARTITIONING OF CLIENT RESOURCES
81
Patent #:
Issue Dt:
04/01/2008
Application #:
10986665
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/01/2006
Title:
SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
82
Patent #:
Issue Dt:
04/01/2008
Application #:
10986773
Filing Dt:
11/15/2004
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE
83
Patent #:
Issue Dt:
01/29/2008
Application #:
10987427
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/02/2005
Title:
METHOD AND SYSTEM FOR INCREASING PRODUCT YIELD BY CONTROLLING LITHOGRAPHY ON THE BASIS OF ELECTRICAL SPEED DATA
84
Patent #:
Issue Dt:
10/15/2013
Application #:
10987484
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/23/2005
Title:
SPACER FOR A GATE ELECTRODE HAVING TENSILE STRESS AND A METHOD OF FORMING THE SAME
85
Patent #:
Issue Dt:
10/31/2006
Application #:
10987749
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/26/2005
Title:
FIELD EFFECT DEVICE WITH A CHANNEL WITH A SWITCHABLE CONDUCTIVITY
86
Patent #:
Issue Dt:
06/20/2006
Application #:
10987778
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/30/2005
Title:
HIGH PERFORMANCE LOW COST MONOPOLE ANTENNA FOR WIRELESS APPLICATIONS
87
Patent #:
Issue Dt:
04/03/2007
Application #:
10987804
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD AND SYSTEM FOR CONTROLLING THE CHEMICAL MECHANICAL POLISHING BY USING A SEISMIC SIGNAL OF A SEISMIC SENSOR
88
Patent #:
Issue Dt:
09/19/2006
Application #:
10987827
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
06/30/2005
Title:
TECHNIQUE FOR FORMING A SPACER FOR A LINE ELEMENT BY USING AN ETCH STOP LAYER DEPOSITED BY A HIGHLY DIRECTIONAL DEPOSITION TECHNIQUE
89
Patent #:
Issue Dt:
06/12/2007
Application #:
10987985
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT CHIP PACKAGES HAVING INTEGRATED MICROCHANNEL COOLING MODULES
90
Patent #:
Issue Dt:
06/09/2009
Application #:
10988015
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
INTEGRATED THERMOELECTRIC COOLING DEVICES AND METHODS FOR FABRICATING SAME
91
Patent #:
Issue Dt:
01/29/2008
Application #:
10988132
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
ANTIFUSE STRUCTURE HAVING AN INTEGRATED HEATING ELEMENT
92
Patent #:
Issue Dt:
05/15/2007
Application #:
10988137
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
FLUORINATED PHOTORESIST MATERIALS WITH IMPROVED ETCH RESISTANT PROPERTIES
93
Patent #:
Issue Dt:
10/31/2006
Application #:
10988215
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
COOLING DEVICE USING MULTIPLE FANS AND HEAT SINKS
94
Patent #:
Issue Dt:
12/02/2008
Application #:
10988219
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR CHIP HEAT TRANSFER DEVICE
95
Patent #:
Issue Dt:
11/03/2009
Application #:
10988220
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
MIXED ELECTRICAL AND OPTICAL LGA INTERPOSER FOR FACILITATING CHIP TO BOARD COMMUNICATIONS BY DUAL SIGNAL TYPES
96
Patent #:
Issue Dt:
05/13/2014
Application #:
10989078
Filing Dt:
11/16/2004
Publication #:
Pub Dt:
05/18/2006
Title:
PNEUMATIC METHOD AND APPARATUS FOR NANO IMPRINT LITHOGRAPHY HAVING A CONFORMING MASK
97
Patent #:
Issue Dt:
08/29/2006
Application #:
10990252
Filing Dt:
11/16/2004
Publication #:
Pub Dt:
05/18/2006
Title:
DEVICE AND METHOD FOR FABRICATING DOUBLE-SIDED SOI WAFER SCALE PACKAGE WITH THROUGH VIA CONNECTIONS
98
Patent #:
Issue Dt:
12/25/2007
Application #:
10990401
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
05/18/2006
Title:
SPIN-CURRENT SWITCHABLE MAGNETIC MEMORY ELEMENT AND METHOD OF FABRICATING THE MEMORY ELEMENT
99
Patent #:
Issue Dt:
09/01/2009
Application #:
10991582
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
05/18/2006
Title:
CHEMICAL DOPING OF NANO-COMPONENTS
100
Patent #:
Issue Dt:
12/09/2008
Application #:
10991808
Filing Dt:
11/18/2004
Title:
SCHEDULING TOOLS WITH QUEUE TIME CONSTRAINTS
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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