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07/13/2006
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Title:
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QUASI-HYDROPHOBIC SI-SI WAFER BONDING USING HYDROPHILIC SI SURFACES AND DISSOLUTION OF INTERFACIAL BONDING OXIDE
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Patent #:
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Issue Dt:
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10/06/2009
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Application #:
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11031168
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Filing Dt:
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01/07/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETS
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11031418
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Filing Dt:
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01/07/2005
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Publication #:
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Pub Dt:
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04/20/2006
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Title:
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POROUS ORGANOSILICATES WITH IMPROVED MECHANICAL PROPERTIES
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11032878
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Filing Dt:
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01/11/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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PROBABILISTIC CONGESTION PREDICTION WITH PARTIAL BLOCKAGES
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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11033641
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Filing Dt:
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01/13/2005
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Title:
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BINARY CONTROLLED PHASE SELECTOR WITH OUTPUT DUTY CYCLE CORRECTION
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Patent #:
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Issue Dt:
|
12/26/2006
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Application #:
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11033754
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Filing Dt:
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01/13/2005
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Title:
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DUAL-MODE OUTPUT DRIVER CONFIGURED FOR OUTPUTTING A SIGNAL ACCORDING TO EITHER A SELECTED HIGH VOLTAGE/LOW SPEED MODE OR A LOW VOLTAGE/HIGH SPEED MODE
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11033755
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Filing Dt:
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01/13/2005
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Title:
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ALIGNMENT OF LOCAL TRANSMIT CLOCK TO SYNCHRONOUS DATA TRANSFER CLOCK HAVING PROGRAMMABLE TRANSFER RATE
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Patent #:
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Issue Dt:
|
11/14/2006
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Application #:
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11033757
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Filing Dt:
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01/13/2005
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Title:
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VOLTAGE MODE TRANSCEIVER HAVING PROGRAMMABLE VOLTAGE SWING AND EXTERNAL REFERENCE-BASED CALIBRATION
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11033926
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Filing Dt:
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01/12/2005
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Publication #:
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Pub Dt:
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06/09/2005
| | | | |
Title:
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CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
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Patent #:
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Issue Dt:
|
01/22/2008
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Application #:
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11034420
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Filing Dt:
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01/11/2005
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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IMPACT CHECKING TECHNIQUE
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Patent #:
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Issue Dt:
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04/15/2008
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Application #:
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11034479
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Filing Dt:
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01/13/2005
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Publication #:
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Pub Dt:
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02/21/2008
| | | | |
Title:
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ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11034480
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Filing Dt:
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01/13/2005
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SICOH DIELECTRICS
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Patent #:
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Issue Dt:
|
11/04/2008
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Application #:
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11036148
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Filing Dt:
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01/14/2005
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Publication #:
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Pub Dt:
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06/09/2005
| | | | |
Title:
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ELECTRONIC COMPONENT AND TAPE HEAD HAVING A CLOSURE
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Patent #:
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Issue Dt:
|
12/23/2008
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Application #:
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11037694
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Filing Dt:
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01/18/2005
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Publication #:
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Pub Dt:
|
07/20/2006
| | | | |
Title:
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SYSTEMS AND METHODS FOR MANAGING ERROR DEPENDENCIES
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Patent #:
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Issue Dt:
|
05/22/2007
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Application #:
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11037913
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Filing Dt:
|
01/18/2005
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Publication #:
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Pub Dt:
|
07/20/2006
| | | | |
Title:
|
HETEROGENEOUS THERMAL INTERFACE FOR COOLING
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Patent #:
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Issue Dt:
|
07/24/2007
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Application #:
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11037970
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Filing Dt:
|
01/18/2005
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Publication #:
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Pub Dt:
|
07/20/2006
| | | | |
Title:
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ON-CHIP CU INTERCONNECTION USING 1 TO 5 NM THICK METAL CAP
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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11037995
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Filing Dt:
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01/18/2005
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
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LOW-K DIELECTRIC MATERIAL SYSTEM FOR IC APPLICATION
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Patent #:
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Issue Dt:
|
05/15/2007
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Application #:
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11038593
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Filing Dt:
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01/19/2005
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Publication #:
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Pub Dt:
|
07/20/2006
| | | | |
Title:
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SRAM MEMORIES AND MICROPROCESSORS HAVING LOGIC PORTIONS IMPLEMENTED IN HIGH-PERFORMANCE SILICON SUBSTRATES AND SRAM ARRAY PORTIONS HAVING FIELD EFFECT TRANSISTORS WITH LINKED BODIES AND METHODS FOR MAKING SAME
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|
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Patent #:
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Issue Dt:
|
07/04/2006
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Application #:
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11039103
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Filing Dt:
|
01/20/2005
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Publication #:
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Pub Dt:
|
10/20/2005
| | | | |
Title:
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METHOD OF FORMING A CONDUCTIVE BARRIER LAYER WITHIN CRITICAL OPENINGS BY A FINAL DEPOSITION STEP AFTER A RE-SPUTTER DEPOSITION
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Patent #:
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|
Issue Dt:
|
06/05/2007
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Application #:
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11040139
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Filing Dt:
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01/21/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR AUTOMATICALLY ESTIMATING PIN LOCATIONS AND INTERCONNECT PARASITICS OF A CIRCUIT LAYOUT
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|
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Patent #:
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|
Issue Dt:
|
09/07/2010
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Application #:
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11042218
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Filing Dt:
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01/25/2005
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Publication #:
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|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
SCRATCH PAD FOR STORING INTERMEDIATE LOOP FILTER DATA
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|
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Patent #:
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|
Issue Dt:
|
04/25/2006
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Application #:
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11042426
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Filing Dt:
|
01/25/2005
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Title:
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FABRICATION OF DUAL WORK-FUNCTION METAL GATE STRUCTURE FOR COMPLEMENTARY FIELD EFFECT TRANSISTORS
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|
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Patent #:
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|
Issue Dt:
|
07/17/2007
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Application #:
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11042866
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Filing Dt:
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01/25/2005
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
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EEPROM DEVICE WITH SUBSTRATE HOT-ELECTRON INJECTOR FOR LOW-POWER PROGRAMMING
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|
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Patent #:
|
|
Issue Dt:
|
07/07/2009
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Application #:
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11044346
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Filing Dt:
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01/27/2005
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Publication #:
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Pub Dt:
|
08/04/2005
| | | | |
Title:
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STORAGE DEVICE HAVING FLEXIBLE ARCHITECTURE AND FREE SCALABILITY
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Patent #:
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|
Issue Dt:
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03/17/2009
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Application #:
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11044885
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Filing Dt:
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01/27/2005
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Publication #:
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Pub Dt:
|
07/27/2006
| | | | |
Title:
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SELECTIVE PLACEMENT OF CARBON NANOTUBES ON OXIDE SURFACES
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|
|
Patent #:
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Issue Dt:
|
04/15/2014
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Application #:
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11046986
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Filing Dt:
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01/31/2005
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Publication #:
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Pub Dt:
|
11/03/2005
| | | | |
Title:
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Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging
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Patent #:
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Issue Dt:
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01/01/2008
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Application #:
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11047129
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Filing Dt:
|
01/31/2005
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Publication #:
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Pub Dt:
|
12/01/2005
| | | | |
Title:
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TECHIQUE FOR CONTROLLING MECHANICAL STRESS IN A CHANNEL REGION BY SPACER REMOVAL
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Patent #:
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Issue Dt:
|
08/25/2009
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Application #:
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11047250
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Filing Dt:
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01/31/2005
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Publication #:
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Pub Dt:
|
08/03/2006
| | | | |
Title:
|
METHOD AND APPARATUS TO SEPARATE MOLECULES ACCORDING TO THEIR MOBILITIES
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Patent #:
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|
Issue Dt:
|
03/11/2008
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Application #:
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11048001
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Filing Dt:
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01/31/2005
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Publication #:
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Pub Dt:
|
08/03/2006
| | | | |
Title:
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TECHNIQUES SUPPORTING COLLABORATIVE PRODUCT DEVELOPMENT
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11048578
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Filing Dt:
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02/01/2005
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Publication #:
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Pub Dt:
|
02/16/2006
| | | | |
Title:
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FLUXLESS SOLDER TRANSFER AND REFLOW PROCESS
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Patent #:
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Issue Dt:
|
06/21/2011
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Application #:
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11048739
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Filing Dt:
|
02/03/2005
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Publication #:
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Pub Dt:
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07/28/2005
| | | | |
Title:
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STRAINED SILICON ON RELAXED SIGE FILM WITH UNIFORM MISFIT DISLOCATION DENSITY
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Patent #:
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Issue Dt:
|
01/04/2011
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Application #:
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11049855
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Filing Dt:
|
02/04/2005
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Title:
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NON-VOLATILE MEMORY DEVICE WITH IMPROVED ERASE SPEED
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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11050232
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Filing Dt:
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02/03/2005
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Publication #:
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Pub Dt:
|
08/24/2006
| | | | |
Title:
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METHOD FOR RECONFIGURATION OF RANDOM BIASES IN A SYNTHESIZED DESIGN WITHOUT RECOMPILATION
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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11050325
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Filing Dt:
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02/03/2005
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Publication #:
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Pub Dt:
|
08/03/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR FREQUENCY INDEPENDENT PROCESSOR UTILIZATION RECORDING REGISTER IN A SIMULTANEOUSLY MULTI-THREADED PROCESSOR
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Patent #:
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Issue Dt:
|
08/21/2007
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Application #:
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11050572
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Filing Dt:
|
02/03/2005
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Publication #:
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Pub Dt:
|
02/23/2006
| | | | |
Title:
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INTEGRATED CIRCUIT WITH INCREASED HEAT TRANSFER
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11050592
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Filing Dt:
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02/03/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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METHOD AND SYSTEM FOR OPTIMIZED HANDLING OF CONSTRAINTS DURING SYMBOLIC SIMULATION
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11050602
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Filing Dt:
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02/03/2005
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Publication #:
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Pub Dt:
|
08/03/2006
| | | | |
Title:
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METHOD FOR BALANCING POWER PLANE PIN CURRENTS IN A PRINTED WIRING BOARD USING COLLINEAR SLOTS
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Patent #:
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Issue Dt:
|
05/06/2008
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Application #:
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11050790
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Filing Dt:
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01/27/2005
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Publication #:
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Pub Dt:
|
07/27/2006
| | | | |
Title:
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GATE STACK ENGINEERING BY ELECTROCHEMICAL PROCESSING UTILIZING THROUGH-GATE-DIELECTRIC CURRENT FLOW
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Patent #:
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Issue Dt:
|
05/08/2007
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Application #:
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11051703
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Filing Dt:
|
02/04/2005
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Publication #:
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Pub Dt:
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06/23/2005
| | | | |
Title:
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ELECTRONICALLY PROGRAMMABLE ANTIFUSE AND CIRCUITS MADE THEREWITH
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11052675
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Filing Dt:
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02/07/2005
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Publication #:
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Pub Dt:
|
07/07/2005
| | | | |
Title:
|
METHOD OF MAKING STRAINED CHANNEL CMOS TRANSISTORS HAVING LATTICE-MISMATCHED EPITAXIAL EXTENSION AND SOURCE AND DRAIN REGIONS
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