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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 55 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
7679129
Issue Dt:
03/16/2010
Application #:
11128389
Filing Dt:
05/13/2005
Title:
SYSTEM AND METHOD FOR IMPROVING OXIDE-NITRIDE-OXIDE (ONO) COUPLING IN A SEMICONDUCTOR DEVICE
2
Patent #:
7356793
Issue Dt:
04/08/2008
Application #:
11129784
Filing Dt:
05/16/2005
Publication #:
US20060010410
Pub Dt:
01/12/2006
Title:
GENIE: A METHOD FOR CLASSIFICATION AND GRAPHICAL DISPLAY OF NEGATIVE SLACK TIMING TEST FAILURES
3
Patent #:
7305644
Issue Dt:
12/04/2007
Application #:
11129785
Filing Dt:
05/16/2005
Publication #:
US20060015836
Pub Dt:
01/19/2006
Title:
NEGATIVE SLACK RECOVERABILITY FACTOR - A NET WEIGHT TO ENHANCE TIMING CLOSURE BEHAVIOR
4
Patent #:
7371684
Issue Dt:
05/13/2008
Application #:
11130078
Filing Dt:
05/16/2005
Publication #:
US20060258159
Pub Dt:
11/16/2006
Title:
PROCESS FOR PREPARING ELECTRONICS STRUCTURES USING A SACRIFICIAL MULTILAYER HARDMASK SCHEME
5
Patent #:
7299154
Issue Dt:
11/20/2007
Application #:
11130459
Filing Dt:
05/16/2005
Title:
METHOD AND APPARATUS FOR FAST DISTURBANCE DETECTION AND CLASSIFICIATION
6
Patent #:
7199658
Issue Dt:
04/03/2007
Application #:
11131534
Filing Dt:
05/18/2005
Publication #:
US20060261890
Pub Dt:
11/23/2006
Title:
CIRCUITS AND METHODS FOR IMPLEMENTING POWER AMPLIFIERS FOR MILLIMETER WAVE APPLICATIONS
7
Patent #:
7230286
Issue Dt:
06/12/2007
Application #:
11135227
Filing Dt:
05/23/2005
Publication #:
US20060273389
Pub Dt:
12/07/2006
Title:
VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT
8
Patent #:
7169676
Issue Dt:
01/30/2007
Application #:
11135711
Filing Dt:
05/23/2005
Title:
SEMICONDUCTOR DEVICES AND METHODS FOR FORMING THE SAME
9
Patent #:
7271495
Issue Dt:
09/18/2007
Application #:
11135720
Filing Dt:
05/24/2005
Publication #:
US20060076691
Pub Dt:
04/13/2006
Title:
CHIP BOND LAYOUT FOR CHIP CARRIER FOR FLIP CHIP APPLICATIONS
10
Patent #:
7526419
Issue Dt:
04/28/2009
Application #:
11135739
Filing Dt:
05/24/2005
Publication #:
US20060271515
Pub Dt:
11/30/2006
Title:
METHODS FOR RECONSTRUCTING DATA FROM SIMULATION MODELS
11
Patent #:
7313772
Issue Dt:
12/25/2007
Application #:
11136256
Filing Dt:
05/24/2005
Publication #:
US20060271890
Pub Dt:
11/30/2006
Title:
SYSTEMS, METHODS, AND MEDIA FOR BLOCK-BASED ASSERTION GENERATION, QUALIFICATION AND ANALYSIS
12
Patent #:
7457355
Issue Dt:
11/25/2008
Application #:
11136872
Filing Dt:
05/25/2005
Publication #:
US20060268442
Pub Dt:
11/30/2006
Title:
METHOD FOR AN EQUALIZER COMPUTATION IN A MEDIA SYSTEM USING A DATA SET SEPARATOR SEQUENCE
13
Patent #:
7335976
Issue Dt:
02/26/2008
Application #:
11137245
Filing Dt:
05/25/2005
Publication #:
US20060267048
Pub Dt:
11/30/2006
Title:
CROSSTALK REDUCTION IN ELECTRICAL INTERCONNECTS USING DIFFERENTIAL SIGNALING
14
Patent #:
7405129
Issue Dt:
07/29/2008
Application #:
11138797
Filing Dt:
05/26/2005
Publication #:
US20060105513
Pub Dt:
05/18/2006
Title:
DEVICE COMPRISING DOPED NANO-COMPONENT AND METHOD OF FORMING THE DEVICE
15
Patent #:
7506276
Issue Dt:
03/17/2009
Application #:
11138835
Filing Dt:
05/26/2005
Publication #:
US20060271893
Pub Dt:
11/30/2006
Title:
METHOD FOR ISOLATING PROBLEM NETWORKS WITHIN AN INTEGRATED CIRCUIT DESIGN
16
Patent #:
7256415
Issue Dt:
08/14/2007
Application #:
11140780
Filing Dt:
05/31/2005
Publication #:
US20060267086
Pub Dt:
11/30/2006
Title:
MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS
17
Patent #:
7231474
Issue Dt:
06/12/2007
Application #:
11140803
Filing Dt:
05/31/2005
Title:
SERIAL INTERFACE HAVING A READ TEMPERATURE COMMAND
18
Patent #:
7532501
Issue Dt:
05/12/2009
Application #:
11142248
Filing Dt:
06/02/2005
Publication #:
US20060274569
Pub Dt:
12/07/2006
Title:
SEMICONDUCTOR DEVICE INCLUDING BACK-GATED TRANSISTORS AND METHOD OF FABRICATING THE DEVICE
19
Patent #:
7430800
Issue Dt:
10/07/2008
Application #:
11146441
Filing Dt:
06/06/2005
Publication #:
US20060272851
Pub Dt:
12/07/2006
Title:
APPARATUS AND METHOD FOR FAR END NOISE REDUCTION USING CAPACITIVE CANCELLATION BY OFFSET WIRING
20
Patent #:
7282790
Issue Dt:
10/16/2007
Application #:
11146495
Filing Dt:
06/06/2005
Publication #:
US20060274562
Pub Dt:
12/07/2006
Title:
PLANAR ARRAY CONTACT MEMORY CARDS
21
Patent #:
7389402
Issue Dt:
06/17/2008
Application #:
11146863
Filing Dt:
06/07/2005
Publication #:
US20060277390
Pub Dt:
12/07/2006
Title:
MICROPROCESSOR INCLUDING A CONFIGURABLE TRANSLATION LOOKASIDE BUFFER
22
Patent #:
7205812
Issue Dt:
04/17/2007
Application #:
11147003
Filing Dt:
06/07/2005
Title:
HYSTERISIS MANAGEMENT FOR DELAY LINE
23
Patent #:
7745296
Issue Dt:
06/29/2010
Application #:
11147383
Filing Dt:
06/08/2005
Publication #:
US20060281270
Pub Dt:
12/14/2006
Title:
RAISED SOURCE AND DRAIN PROCESS WITH DISPOSABLE SPACERS
24
Patent #:
7289867
Issue Dt:
10/30/2007
Application #:
11148092
Filing Dt:
06/08/2005
Title:
AUTOMATED INTEGRATED CIRCUIT DEVICE MANUFACTURING FACILITY USING DISTRIBUTED CONTROL
25
Patent #:
7271034
Issue Dt:
09/18/2007
Application #:
11148737
Filing Dt:
06/09/2005
Publication #:
US20050277280
Pub Dt:
12/15/2005
Title:
SEMICONDUCTOR DEVICE WITH A HIGH THERMAL DISSIPATION EFFICIENCY
26
Patent #:
7221579
Issue Dt:
05/22/2007
Application #:
11150188
Filing Dt:
06/13/2005
Publication #:
US20060279978
Pub Dt:
12/14/2006
Title:
METHOD AND STRUCTURE FOR HIGH PERFORMANCE PHASE CHANGE MEMORY
27
Patent #:
7541134
Issue Dt:
06/02/2009
Application #:
11150565
Filing Dt:
06/10/2005
Publication #:
US20050277058
Pub Dt:
12/15/2005
Title:
ANTIREFLECTIVE FILM-FORMING COMPOSITION, METHOD FOR MANUFACTURING THE SAME, AND ANTIREFLECTIVE FILM AND PATTERN FORMATION METHOD USING THE SAME
28
Patent #:
7151029
Issue Dt:
12/19/2006
Application #:
11151007
Filing Dt:
06/14/2005
Publication #:
US20050237834
Pub Dt:
10/27/2005
Title:
MEMORY DEVICE AND METHOD OF MAKING THE SAME
29
Patent #:
7269679
Issue Dt:
09/11/2007
Application #:
11151317
Filing Dt:
06/14/2005
Title:
PCI-X ERROR CORRECTING CODE (ECC) PIN SHARING CONFIGURATION
30
Patent #:
7657690
Issue Dt:
02/02/2010
Application #:
11151318
Filing Dt:
06/14/2005
Title:
CONTROL OF PCI MEMORY READ BEHAVIOR USING MEMORY READ ALIAS AND MEMORY COMMAND REISSUE BITS
31
Patent #:
7276384
Issue Dt:
10/02/2007
Application #:
11151470
Filing Dt:
06/13/2005
Publication #:
US20050226043
Pub Dt:
10/13/2005
Title:
MAGNETIC TUNNEL JUNCTIONS WITH IMPROVED TUNNELING MAGNETO-RESISTANCE
32
Patent #:
7391023
Issue Dt:
06/24/2008
Application #:
11151480
Filing Dt:
06/13/2005
Publication #:
US20050236567
Pub Dt:
10/27/2005
Title:
LITHOGRAPHY TOOL IMAGE QUALITY EVALUATING AND CORRECTING
33
Patent #:
7417250
Issue Dt:
08/26/2008
Application #:
11151550
Filing Dt:
06/14/2005
Title:
STRAINED-SILICON DEVICE WITH DIFFERENT SILICON THICKNESSES
34
Patent #:
7355855
Issue Dt:
04/08/2008
Application #:
11151830
Filing Dt:
06/14/2005
Publication #:
US20060279935
Pub Dt:
12/14/2006
Title:
COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS
35
Patent #:
7408780
Issue Dt:
08/05/2008
Application #:
11151843
Filing Dt:
06/14/2005
Publication #:
US20060279932
Pub Dt:
12/14/2006
Title:
COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS WITH FINS
36
Patent #:
7362582
Issue Dt:
04/22/2008
Application #:
11151905
Filing Dt:
06/14/2005
Publication #:
US20060279936
Pub Dt:
12/14/2006
Title:
COOLING STRUCTURE USING RIGID MOVABLE ELEMENTS
37
Patent #:
7388273
Issue Dt:
06/17/2008
Application #:
11152750
Filing Dt:
06/14/2005
Publication #:
US20060278895
Pub Dt:
12/14/2006
Title:
REPROGRAMMABLE FUSE STRUCTURE AND METHOD
38
Patent #:
7308662
Issue Dt:
12/11/2007
Application #:
11153047
Filing Dt:
06/15/2005
Publication #:
US20060286691
Pub Dt:
12/21/2006
Title:
CAPACITANCE MODELING
39
Patent #:
7330662
Issue Dt:
02/12/2008
Application #:
11153570
Filing Dt:
06/13/2005
Publication #:
US20050232639
Pub Dt:
10/20/2005
Title:
SYSTEM AND METHOD FOR REMOTE OPTICAL DIGITAL NETWORKING OF COMPUTING DEVICES
40
Patent #:
7776993
Issue Dt:
08/17/2010
Application #:
11154794
Filing Dt:
06/15/2005
Publication #:
US20050250248
Pub Dt:
11/10/2005
Title:
UNDERFILLING WITH ACID-CLEAVABLE ACETAL AND KETAL EPOXY OLIGOMERS
41
Patent #:
7428483
Issue Dt:
09/23/2008
Application #:
11154905
Filing Dt:
06/16/2005
Publication #:
US20070005332
Pub Dt:
01/04/2007
Title:
METHOD AND APPARATUS TO SIMULATE AND VERIFY SIGNAL GLITCHING
42
Patent #:
7439108
Issue Dt:
10/21/2008
Application #:
11155030
Filing Dt:
06/16/2005
Publication #:
US20060284251
Pub Dt:
12/21/2006
Title:
COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
43
Patent #:
7392159
Issue Dt:
06/24/2008
Application #:
11157090
Filing Dt:
06/20/2005
Publication #:
US20060287739
Pub Dt:
12/21/2006
Title:
METHOD AND APPARATUS OF CAPACITY LEARNING FOR COMPUTER SYSTEMS AND APPLICATIONS
44
Patent #:
7569442
Issue Dt:
08/04/2009
Application #:
11158726
Filing Dt:
06/22/2005
Publication #:
US20050239241
Pub Dt:
10/27/2005
Title:
HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
45
Patent #:
7123529
Issue Dt:
10/17/2006
Application #:
11160054
Filing Dt:
06/07/2005
Title:
SENSE AMPLIFIER INCLUDING MULTIPLE CONDUCTION STATE FIELD EFFECT TRANSISTOR
46
Patent #:
8405165
Issue Dt:
03/26/2013
Application #:
11160055
Filing Dt:
06/07/2005
Publication #:
US20060273393
Pub Dt:
12/07/2006
Title:
FIELD EFFECT TRANSISTOR HAVING MULTIPLE CONDUCTION STATES
47
Patent #:
7391097
Issue Dt:
06/24/2008
Application #:
11160151
Filing Dt:
06/10/2005
Publication #:
US20060278932
Pub Dt:
12/14/2006
Title:
SECURE ELECTRICALLY PROGRAMMABLE FUSE
48
Patent #:
7385673
Issue Dt:
06/10/2008
Application #:
11160156
Filing Dt:
06/10/2005
Publication #:
US20060289794
Pub Dt:
12/28/2006
Title:
IMMERSION LITHOGRAPHY WITH EQUALIZED PRESSURE ON AT LEAST PROJECTION OPTICS COMPONENT AND WAFER
49
Patent #:
7145829
Issue Dt:
12/05/2006
Application #:
11160273
Filing Dt:
06/16/2005
Publication #:
US20060285411
Pub Dt:
12/21/2006
Title:
SINGLE CYCLE REFRESH OF MULTI-PORT DYNAMIC RANDOM ACCESS MEMORY (DRAM)
50
Patent #:
7411252
Issue Dt:
08/12/2008
Application #:
11160361
Filing Dt:
06/21/2005
Publication #:
US20060286724
Pub Dt:
12/21/2006
Title:
SUBSTRATE BACKGATE FOR TRIGATE FET
51
Patent #:
7960791
Issue Dt:
06/14/2011
Application #:
11160457
Filing Dt:
06/24/2005
Publication #:
US20060292772
Pub Dt:
12/28/2006
Title:
DENSE PITCH BULK FINFET PROCESS BY SELECTIVE EPI AND ETCH
52
Patent #:
7482675
Issue Dt:
01/27/2009
Application #:
11160461
Filing Dt:
06/24/2005
Publication #:
US20070013071
Pub Dt:
01/18/2007
Title:
PROBING PADS IN KERF AREA FOR WAFER TESTING
53
Patent #:
7414275
Issue Dt:
08/19/2008
Application #:
11160463
Filing Dt:
06/24/2005
Publication #:
US20060289994
Pub Dt:
12/28/2006
Title:
MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP
54
Patent #:
7445966
Issue Dt:
11/04/2008
Application #:
11160468
Filing Dt:
06/24/2005
Publication #:
US20070013072
Pub Dt:
01/18/2007
Title:
METHOD AND STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF
55
Patent #:
7205237
Issue Dt:
04/17/2007
Application #:
11160667
Filing Dt:
07/05/2005
Publication #:
US20070010097
Pub Dt:
01/11/2007
Title:
APPARATUS AND METHOD FOR SELECTED SITE BACKSIDE UNDERLAYING OF Si, GaAs, Gax Aly Asz OF SOI TECHNOLOGIES FOR SCANNING PROBE MICROSCOPY AND ATOMIC FORCE PROBING CHARACTERIZATION
56
Patent #:
7475372
Issue Dt:
01/06/2009
Application #:
11160701
Filing Dt:
07/06/2005
Publication #:
US20070011630
Pub Dt:
01/11/2007
Title:
METHODS FOR COMPUTING MILLER-FACTOR USING COUPLED PEAK NOISE
57
Patent #:
7972919
Issue Dt:
07/05/2011
Application #:
11160956
Filing Dt:
07/18/2005
Publication #:
US20070013031
Pub Dt:
01/18/2007
Title:
VERTICAL PNP TRANSISTOR AND METHOD OF MAKING SAME
58
Patent #:
7268428
Issue Dt:
09/11/2007
Application #:
11160997
Filing Dt:
07/19/2005
Publication #:
US20070045819
Pub Dt:
03/01/2007
Title:
THERMAL PASTE CONTAINMENT FOR SEMICONDUCTOR MODULES
59
Patent #:
7358551
Issue Dt:
04/15/2008
Application #:
11161066
Filing Dt:
07/21/2005
Publication #:
US20070018205
Pub Dt:
01/25/2007
Title:
STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN PFETS WITH EMBEDDED SIGE SOURCE/DRAIN REGIONS
60
Patent #:
7838943
Issue Dt:
11/23/2010
Application #:
11161146
Filing Dt:
07/25/2005
Publication #:
US20070021293
Pub Dt:
01/25/2007
Title:
SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT
61
Patent #:
7526743
Issue Dt:
04/28/2009
Application #:
11161159
Filing Dt:
07/25/2005
Publication #:
US20060044932
Pub Dt:
03/02/2006
Title:
METHOD FOR ROUTING DATA PATHS IN A SEMICONDUCTOR CHIP WITH A PLURALITY OF LAYERS
62
Patent #:
7629192
Issue Dt:
12/08/2009
Application #:
11161181
Filing Dt:
10/13/2005
Publication #:
US20070085156
Pub Dt:
04/19/2007
Title:
PASSIVE ELECTRICALLY TESTABLE ACCELERATION AND VOLTAGE MEASUREMENT DEVICES
63
Patent #:
7352607
Issue Dt:
04/01/2008
Application #:
11161183
Filing Dt:
07/26/2005
Publication #:
US20070025138
Pub Dt:
02/01/2007
Title:
NON-VOLATILE SWITCHING AND MEMORY DEVICES USING VERTICAL NANOTUBES
64
Patent #:
7288802
Issue Dt:
10/30/2007
Application #:
11161213
Filing Dt:
07/27/2005
Publication #:
US20070023756
Pub Dt:
02/01/2007
Title:
VIRTUAL BODY-CONTACTED TRIGATE
65
Patent #:
7170772
Issue Dt:
01/30/2007
Application #:
11161321
Filing Dt:
07/29/2005
Publication #:
US20070035981
Pub Dt:
02/15/2007
Title:
APPARATUS AND METHOD FOR DYNAMIC CONTROL OF DOUBLE GATE DEVICES
66
Patent #:
7873961
Issue Dt:
01/18/2011
Application #:
11161330
Filing Dt:
07/29/2005
Publication #:
US20070028151
Pub Dt:
02/01/2007
Title:
SUPERVISORY OPERATING SYSTEM FOR RUNNING MULTIPLE CHILD OPERATING SYSTEMS SIMULTANEOUSLY AND OPTIMIZING RESOURCE USAGE
67
Patent #:
7535105
Issue Dt:
05/19/2009
Application #:
11161414
Filing Dt:
08/02/2005
Publication #:
US20070029646
Pub Dt:
02/08/2007
Title:
INTER-CHIP ESD PROTECTION STRUCTURE FOR HIGH SPEED AND HIGH FREQUENCY DEVICES
68
Patent #:
7399696
Issue Dt:
07/15/2008
Application #:
11161415
Filing Dt:
08/02/2005
Publication #:
US20070032030
Pub Dt:
02/08/2007
Title:
METHOD FOR HIGH PERFORMANCE INDUCTOR FABRICATION USING A TRIPLE DAMASCENE PROCESS WITH COPPER BEOL
69
Patent #:
7585764
Issue Dt:
09/08/2009
Application #:
11161599
Filing Dt:
08/09/2005
Publication #:
US20070037403
Pub Dt:
02/15/2007
Title:
VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME
70
Patent #:
7473523
Issue Dt:
01/06/2009
Application #:
11161624
Filing Dt:
08/10/2005
Publication #:
US20070037098
Pub Dt:
02/15/2007
Title:
SYSTEMS AND METHODS FOR MODIFYING FEATURES IN A SEMI-CONDUCTOR DEVICE
71
Patent #:
7136317
Issue Dt:
11/14/2006
Application #:
11161628
Filing Dt:
08/10/2005
Title:
DRAM WITH SELF-RESETTING DATA PATH FOR REDUCED POWER CONSUMPTION
72
Patent #:
7351348
Issue Dt:
04/01/2008
Application #:
11161630
Filing Dt:
08/10/2005
Publication #:
US20070034605
Pub Dt:
02/15/2007
Title:
EVAPORATION CONTROL USING COATING
73
Patent #:
7437277
Issue Dt:
10/14/2008
Application #:
11161651
Filing Dt:
08/11/2005
Publication #:
US20070038416
Pub Dt:
02/15/2007
Title:
MODEL INDEPENDENT SIMULATION
74
Patent #:
7485540
Issue Dt:
02/03/2009
Application #:
11161832
Filing Dt:
08/18/2005
Publication #:
US20070040239
Pub Dt:
02/22/2007
Title:
INTEGRATED BEOL THIN FILM RESISTOR
75
Patent #:
8294505
Issue Dt:
10/23/2012
Application #:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
HOISTING APPARATUS
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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