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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/01/2008
Application #:
11460013
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
05/29/2008
Title:
SELF-ALIGNMENT SCHEME FOR A HETEROJUNCTION BIPOLAR TRANSISTOR
2
Patent #:
Issue Dt:
12/11/2007
Application #:
11460464
Filing Dt:
07/27/2006
Title:
APPARATUS AND METHOD FOR IMPROVING SENSING MARGIN OF ELECTRICALLY PROGRAMMABLE FUSES
3
Patent #:
Issue Dt:
01/20/2009
Application #:
11460537
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
02/01/2007
Title:
MULTIPLE VOLTAGE INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR
4
Patent #:
Issue Dt:
10/04/2011
Application #:
11460751
Filing Dt:
07/28/2006
Publication #:
Pub Dt:
01/31/2008
Title:
SCAN TESTING IN SINGLE-CHIP MULTICORE SYSTEMS
5
Patent #:
Issue Dt:
02/10/2009
Application #:
11461137
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
INTERCONNECT STRUCTURE AND PROCESS OF MAKING THE SAME
6
Patent #:
Issue Dt:
11/25/2008
Application #:
11461217
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
METHOD OF IMPROVING GRATING TEST PATTERN FOR LITHOGRAPHY MONITORING AND CONTROLING
7
Patent #:
Issue Dt:
08/19/2014
Application #:
11461428
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
MEMORY CELL SYSTEM WITH MULTIPLE NITRIDE LAYERS
8
Patent #:
Issue Dt:
07/08/2008
Application #:
11461469
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD FOR PERFORMING VERIFICATION OF LOGIC CIRCUITS
9
Patent #:
Issue Dt:
01/06/2009
Application #:
11461623
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
11/23/2006
Title:
DENDRITE GROWTH CONTROL CIRCUIT
10
Patent #:
Issue Dt:
11/10/2009
Application #:
11461657
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
05/29/2008
Title:
METHOD, SYSTEM, AND PROGRAM PRODUCT FOR MANAGING DATA DECAY
11
Patent #:
Issue Dt:
12/30/2008
Application #:
11461857
Filing Dt:
08/02/2006
Publication #:
Pub Dt:
02/07/2008
Title:
METHOD OF MATCHING LAYOUT SHAPES PATTERNS IN AN INTEGRATED CIRCUIT USING WALSH PATTERNS.
12
Patent #:
Issue Dt:
07/29/2008
Application #:
11462124
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
05/29/2008
Title:
PREVENTION OF BACKSIDE CRACKS IN SEMICONDUCTOR CHIPS OR WAFERS USING BACKSIDE FILM OR BACKSIDE WET ETCH
13
Patent #:
Issue Dt:
01/06/2009
Application #:
11462508
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT DESIGN CLOSURE FOR SELECTIVE VOLTAGE BINNING
14
Patent #:
Issue Dt:
12/07/2010
Application #:
11462648
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
11/30/2006
Title:
HIGH PERFORMANCE STRAINED CMOS DEVICES
15
Patent #:
Issue Dt:
05/27/2008
Application #:
11463039
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
08/23/2007
Title:
GATE STACKS
16
Patent #:
Issue Dt:
07/29/2008
Application #:
11463269
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
02/14/2008
Title:
APPARATUS, SYSTEM, AND METHOD FOR INCREMENTAL ENCODING CONVERSION OF XML DATA USING JAVA
17
Patent #:
Issue Dt:
02/24/2009
Application #:
11463447
Filing Dt:
08/09/2006
Publication #:
Pub Dt:
12/28/2006
Title:
BACK END INTERCONNECT WITH A SHAPED INTERFACE
18
Patent #:
Issue Dt:
01/20/2009
Application #:
11463958
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/14/2008
Title:
METHODS AND APPARATUS FOR BOOLEAN EQUIVALENCY CHECKING IN THE PRESENCE OF VOTING LOGIC
19
Patent #:
Issue Dt:
10/28/2008
Application #:
11464009
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
04/05/2007
Title:
FACILITATING SIMULATION OF A MODEL WITHIN A DISTRIBUTED ENVIRONMENT
20
Patent #:
Issue Dt:
10/21/2008
Application #:
11464090
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD FOR FABRICATING STRESS ENHANCED MOS CIRCUITS
21
Patent #:
Issue Dt:
09/25/2007
Application #:
11464959
Filing Dt:
08/16/2006
Publication #:
Pub Dt:
12/14/2006
Title:
COMPLIANT PASSIVATED EDGE SEAL FOR LOW-K INTERCONNECT STRUCTURES
22
Patent #:
Issue Dt:
07/20/2010
Application #:
11465030
Filing Dt:
08/16/2006
Publication #:
Pub Dt:
12/14/2006
Title:
SELECTIVE NITRIDATION OF GATE OXIDES
23
Patent #:
Issue Dt:
04/19/2011
Application #:
11465473
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
SYSTEM AND METHOD OF AUTOMATED WIRE AND VIA LAYOUT OPTIMIZATION DESCRIPTION
24
Patent #:
Issue Dt:
06/09/2009
Application #:
11465592
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
05/03/2007
Title:
TECHNIQUE FOR STRAIN ENGINEERING IN SI-BASED TRANSISTORS BY USING EMBEDDED SEMICONDUCTOR LAYERS INCLUDING ATOMS WITH HIGH COVALENT RADIUS
25
Patent #:
Issue Dt:
07/06/2010
Application #:
11465639
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
SYSTEM AND METHOD FOR SWITCHING DIGITAL CIRCUIT CLOCK NET DRIVER WITHOUT LOSING CLOCK PULSES
26
Patent #:
Issue Dt:
09/07/2010
Application #:
11465663
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
12/14/2006
Title:
METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
27
Patent #:
Issue Dt:
02/03/2009
Application #:
11466120
Filing Dt:
08/22/2006
Publication #:
Pub Dt:
12/07/2006
Title:
METHOD, SYSTEM AND STORAGE MEDIUM FOR DETERMINING CIRCUIT PLACEMENT
28
Patent #:
Issue Dt:
07/15/2008
Application #:
11466572
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
05/03/2007
Title:
EMBEDDED STRAIN LAYER IN THIN SOI TRANSISTORS AND A METHOD OF FORMING THE SAME
29
Patent #:
Issue Dt:
02/26/2008
Application #:
11466754
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
12/14/2006
Title:
SINGLE SUPPLY LEVEL CONVERTER
30
Patent #:
Issue Dt:
07/01/2008
Application #:
11467294
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
02/28/2008
Title:
HEAT-SHIELDED LOW POWER PCM-BASED REPROGRAMMABLE EFUSE DEVICE
31
Patent #:
Issue Dt:
12/09/2008
Application #:
11467446
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
12/21/2006
Title:
METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
32
Patent #:
Issue Dt:
05/01/2012
Application #:
11467493
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
05/29/2008
Title:
VERIFICATION OF A PROGRAM PARTITIONED ACCORDING TO THE CONTROL FLOW INFORMATION OF THE PROGRAM
33
Patent #:
Issue Dt:
05/13/2008
Application #:
11467593
Filing Dt:
08/28/2006
Publication #:
Pub Dt:
01/04/2007
Title:
IMPROVED HDP-BASED ILD CAPPING LAYER
34
Patent #:
Issue Dt:
07/14/2009
Application #:
11467712
Filing Dt:
08/28/2006
Publication #:
Pub Dt:
02/28/2008
Title:
EMBEDDED INTERCONNECTS, AND METHODS FOR FORMING SAME
35
Patent #:
Issue Dt:
08/19/2008
Application #:
11468030
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
12/28/2006
Title:
YIELD IMPROVEMENT IN SILICON-GERMANIUM EPITAXIAL GROWTH
36
Patent #:
Issue Dt:
10/19/2010
Application #:
11468068
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
DEVICE STRUCTURES INCLUDING BACKSIDE CONTACTS, AND METHODS FOR FORMING SAME
37
Patent #:
Issue Dt:
11/04/2008
Application #:
11468078
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD, SYSTEM, AND PROGRAM PRODUCT FOR AUTOMATED VERIFICATION OF GATING LOGIC USING FORMAL VERIFICATION
38
Patent #:
Issue Dt:
03/22/2011
Application #:
11468089
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
FLUIDIC TEST APPARATUS AND METHOD
39
Patent #:
Issue Dt:
03/31/2009
Application #:
11468102
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
BRIDGE FOR SEMICONDUCTOR INTERNAL NODE
40
Patent #:
Issue Dt:
12/09/2008
Application #:
11468402
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD AND STRUCTURE FOR IMPROVING DEVICE PERFORMANCE VARIATION IN DUAL STRESS LINER TECHNOLOGY
41
Patent #:
Issue Dt:
07/01/2008
Application #:
11468512
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
03/06/2008
Title:
DEMULTIPLEXERS USING TRANSISTORS FOR ACCESSING MEMORY CELL ARRAYS
42
Patent #:
Issue Dt:
08/05/2008
Application #:
11468938
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
01/18/2007
Title:
DEVICE FOR PROBE CARD POWER BUS VOLTAGE DROP REDUCTION
43
Patent #:
Issue Dt:
10/21/2008
Application #:
11469039
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
04/12/2007
Title:
SOI DEVICE WITH DIFFERENT CRYSTALLOGRAPHIC ORIENTATIONS
44
Patent #:
Issue Dt:
05/13/2008
Application #:
11469206
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
03/06/2008
Title:
TRANSISTOR GATE SHAPE METROLOGY USING MULTIPLE DATA SOURCES
45
Patent #:
Issue Dt:
07/22/2008
Application #:
11469423
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
04/05/2007
Title:
PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP
46
Patent #:
Issue Dt:
02/01/2011
Application #:
11469578
Filing Dt:
09/01/2006
Publication #:
Pub Dt:
03/20/2008
Title:
STATIC PULSED BUS CIRCUIT AND METHOD HAVING DYNAMIC POWER SUPPLY RAIL SELECTION
47
Patent #:
Issue Dt:
11/03/2009
Application #:
11470024
Filing Dt:
09/05/2006
Publication #:
Pub Dt:
05/31/2007
Title:
TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS
48
Patent #:
Issue Dt:
08/05/2008
Application #:
11470349
Filing Dt:
09/06/2006
Publication #:
Pub Dt:
03/06/2008
Title:
LOW RESISTANCE CONTACT STRUCTURE AND FABRICATION THEREOF
49
Patent #:
Issue Dt:
10/28/2008
Application #:
11470434
Filing Dt:
09/06/2006
Publication #:
Pub Dt:
05/29/2008
Title:
IC CHIP PACKAGE HAVING FORCE-ADJUSTABLE MEMBER BETWEEN STIFFENER AND PRINTED CIRCUIT BOARD
50
Patent #:
Issue Dt:
10/19/2010
Application #:
11473338
Filing Dt:
06/23/2006
Publication #:
Pub Dt:
01/10/2008
Title:
GRADED SPIN-ON ORGANIC ANTIREFLECTIVE COATING FOR PHOTOLITHOGRAPHY
51
Patent #:
Issue Dt:
12/02/2008
Application #:
11473757
Filing Dt:
06/23/2006
Publication #:
Pub Dt:
10/26/2006
Title:
ULTRA THIN BODY FULLY-DEPLETED SOI MOSFETS
52
Patent #:
Issue Dt:
10/12/2010
Application #:
11474678
Filing Dt:
06/26/2006
Publication #:
Pub Dt:
12/27/2007
Title:
METHOD FOR HIGH DENSITY DATA STORAGE AND READ-BACK
53
Patent #:
Issue Dt:
11/11/2008
Application #:
11475675
Filing Dt:
06/26/2006
Publication #:
Pub Dt:
12/27/2007
Title:
INTEGRATED CIRCUIT DESIGN SYSTEM
54
Patent #:
Issue Dt:
04/21/2009
Application #:
11477664
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/18/2007
Title:
METHOD OF PREPARING AN EXTENED CONJUGATED MOLECULAR ASSEMBLY
55
Patent #:
Issue Dt:
05/19/2009
Application #:
11478201
Filing Dt:
06/29/2006
Publication #:
Pub Dt:
01/11/2007
Title:
SEEDLESS WIREBOND PAD PLATING
56
Patent #:
Issue Dt:
06/08/2010
Application #:
11478695
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
APPARATUS AND METHOD FOR WIRELESS NETWORK PARAMETER LOGGING AND REPORTING WITHIN A PORTABLE DEVICE HAVING WIRELESS COMMUNICATION FUNCTIONALITY
57
Patent #:
Issue Dt:
04/27/2010
Application #:
11478901
Filing Dt:
06/30/2006
Title:
INTEGRATED CIRCUIT HAVING AFTER MARKET MODIFIABLE PERFORMANCE
58
Patent #:
NONE
Issue Dt:
Application #:
11479323
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
Method of providing a customer with increased integrated circuit performance
59
Patent #:
Issue Dt:
05/11/2010
Application #:
11479485
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
METHOD AND APPARATUS FOR AUTOMATIC UNCERTAINTY-BASED MANAGEMENT FEEDBACK CONTROLLER
60
Patent #:
Issue Dt:
01/06/2009
Application #:
11481120
Filing Dt:
07/05/2006
Publication #:
Pub Dt:
11/09/2006
Title:
CONCURRENT FIN-FET AND THICK BODY DEVICE FABRICATION
61
Patent #:
Issue Dt:
10/13/2009
Application #:
11481514
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/30/2006
Title:
TRENCH TYPE BURIED ON-CHIP PRECISION PROGRAMMABLE RESISTOR
62
Patent #:
Issue Dt:
01/01/2008
Application #:
11481525
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
63
Patent #:
Issue Dt:
10/28/2008
Application #:
11481532
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
11/09/2006
Title:
NITRIDE-ENCAPSULATED FET (NNCFET)
64
Patent #:
Issue Dt:
05/19/2009
Application #:
11482454
Filing Dt:
07/07/2006
Publication #:
Pub Dt:
01/10/2008
Title:
CPU MODE-BASED CACHE ALLOCATION FOR IMAGE DATA
65
Patent #:
Issue Dt:
07/19/2011
Application #:
11482688
Filing Dt:
07/07/2006
Publication #:
Pub Dt:
12/28/2006
Title:
METHOD OF FORMING A HIGH IMPEDANCE ANTIFUSE
66
Patent #:
NONE
Issue Dt:
Application #:
11484295
Filing Dt:
07/11/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SRAM cells including self-stabilizing transistor structures
67
Patent #:
Issue Dt:
05/15/2007
Application #:
11485390
Filing Dt:
07/13/2006
Title:
INTEGRATED CMOS SPECTRUM ANALYZER FOR ON-CHIP DIAGNOSTICS USING DIGITAL AUTOCORRELATION OF COARSELY QUANTIZED SIGNALS
68
Patent #:
Issue Dt:
05/12/2009
Application #:
11488242
Filing Dt:
07/18/2006
Publication #:
Pub Dt:
01/24/2008
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES HAVING HIGH-Q WAFER BACKSIDE INDUCTORS AND METHODS OF FABRICATING SAME
69
Patent #:
Issue Dt:
08/10/2010
Application #:
11490248
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
07/08/2010
Title:
COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF
70
Patent #:
NONE
Issue Dt:
Application #:
11490338
Filing Dt:
07/20/2006
Publication #:
Pub Dt:
01/24/2008
Title:
Equality comparator using propagates and generates
71
Patent #:
Issue Dt:
03/25/2008
Application #:
11491216
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
12/28/2006
Title:
PACKAGING RELIABILITY SUPER CHIPS
72
Patent #:
Issue Dt:
03/24/2009
Application #:
11491635
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
11/16/2006
Title:
SYSTEM AND METHOD FOR IDENTIFYING EMPTY LOCATIONS IN A SCRAMBLED MEMORY
73
Patent #:
Issue Dt:
07/10/2007
Application #:
11491701
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
11/16/2006
Title:
HIGH SPEED LATCH CIRCUITS USING GATED DIODES
74
Patent #:
Issue Dt:
07/22/2008
Application #:
11492271
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
12/07/2006
Title:
STRAINED SILICON CMOS ON HYBRID CRYSTAL ORIENTATIONS
75
Patent #:
Issue Dt:
09/08/2009
Application #:
11492276
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
11/16/2006
Title:
BILAYER FILM INCLUDING AN UNDERLAYER HAVING VERTICAL ACID TRANSPORT PROPERTIES
76
Patent #:
Issue Dt:
10/23/2007
Application #:
11492455
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
11/23/2006
Title:
METHOD OF FABRICATING STRAINED CHANNEL FIELD EFFECT TRANSISTOR PAIR HAVING UNDERLAPPED DUAL LINERS
77
Patent #:
Issue Dt:
10/16/2007
Application #:
11492456
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
11/23/2006
Title:
METHOD OF FORMING CONTACT FOR DUAL LINER PRODUCT
78
Patent #:
Issue Dt:
08/16/2011
Application #:
11494195
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
07/07/2011
Title:
TECHNIQUES FOR USE OF NANOTECHNOLOGY IN PHOTOVOLTAICS
79
Patent #:
Issue Dt:
10/21/2008
Application #:
11495335
Filing Dt:
07/28/2006
Publication #:
Pub Dt:
01/31/2008
Title:
DISPENSER SYSTEM FOR ATOMIC BEAM ASSISTED METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
80
Patent #:
Issue Dt:
12/30/2008
Application #:
11495336
Filing Dt:
07/28/2006
Publication #:
Pub Dt:
02/22/2007
Title:
SYSTEM AND METHODS FOR QUANTITATIVELY EVALUATING COMPLEXITY OF COMPUTING SYSTEM CONFIGURATION
81
Patent #:
Issue Dt:
04/22/2008
Application #:
11495518
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
02/01/2007
Title:
METHOD OF FABRICATING SEMICONDUCTOR SIDE WALL FIN
82
Patent #:
Issue Dt:
01/29/2008
Application #:
11496153
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
01/31/2008
Title:
PIN GRID ARRAY ZERO INSERTION FORCE CONNECTORS CONFIGURABLE FOR SUPPORTING LARGE PIN COUNTS
83
Patent #:
Issue Dt:
02/15/2011
Application #:
11496383
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
12/30/2010
Title:
ULTRA-SENSITIVE DETECTION TECHNIQUES
84
Patent #:
Issue Dt:
11/25/2008
Application #:
11496542
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
11/30/2006
Title:
LOW TEMPERATURE MELT-PROCESSING OF ORGANIC-INORGANIC HYBRID
85
Patent #:
Issue Dt:
09/02/2008
Application #:
11498009
Filing Dt:
08/01/2006
Publication #:
Pub Dt:
11/30/2006
Title:
POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES
86
Patent #:
Issue Dt:
04/14/2009
Application #:
11498689
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
02/07/2008
Title:
VERSATILE SI-BASED PACKAGING WITH INTEGRATED PASSIVE COMPONENTS FOR MMWAVE APPLICATIONS
87
Patent #:
Issue Dt:
08/04/2009
Application #:
11499132
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
07/02/2009
Title:
DIELECTRIC NANOSTRUCTURE AND METHOD FOR ITS MANUFACTURE
88
Patent #:
Issue Dt:
07/22/2008
Application #:
11499220
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
06/28/2007
Title:
STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER
89
Patent #:
Issue Dt:
05/24/2011
Application #:
11501186
Filing Dt:
08/07/2006
Publication #:
Pub Dt:
12/07/2006
Title:
FLUORINATED VINYL ETHERS, COPOLYMERS THEREOF, AND USE IN LITHOGRAPHIC PHOTORESIST COMPOSITIONS
90
Patent #:
NONE
Issue Dt:
Application #:
11502380
Filing Dt:
08/10/2006
Publication #:
Pub Dt:
02/14/2008
Title:
Multipath soldered thermal interface between a chip and its heat sink
91
Patent #:
Issue Dt:
03/31/2009
Application #:
11503200
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
12/07/2006
Title:
SYSTEM AND METHOD FOR INCREMENTAL STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS
92
Patent #:
Issue Dt:
12/16/2008
Application #:
11503356
Filing Dt:
08/10/2006
Publication #:
Pub Dt:
12/21/2006
Title:
FLUORINATED VINYL ETHERS, COPOLYMERS THEREOF, AND USE IN LITHOGRAPHIC PHOTORESIST COMPOSITIONS
93
Patent #:
Issue Dt:
06/02/2009
Application #:
11503390
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/15/2007
Title:
CONTROLLING AN I/O MMU
94
Patent #:
Issue Dt:
06/29/2010
Application #:
11503700
Filing Dt:
08/14/2006
Publication #:
Pub Dt:
02/14/2008
Title:
SYSTEM AND METHOD FOR LIMITING PROCESSOR PERFORMANCE
95
Patent #:
Issue Dt:
10/14/2008
Application #:
11506227
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
TRILAYER RESIST SCHEME FOR GATE ETCHING APPLICATIONS
96
Patent #:
Issue Dt:
11/17/2009
Application #:
11506827
Filing Dt:
08/21/2006
Publication #:
Pub Dt:
05/03/2007
Title:
HYDRAZINE-FREE SOLUTION DEPOSITION OF CHALCOGENIDE FILMS
97
Patent #:
Issue Dt:
09/16/2008
Application #:
11507308
Filing Dt:
08/21/2006
Publication #:
Pub Dt:
02/21/2008
Title:
LOW LATENCY COUNTER EVENT INDICATION
98
Patent #:
NONE
Issue Dt:
Application #:
11508494
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
03/01/2007
Title:
Method for creating critical section code using a software wrapper for proactive synchronization within a computer system
99
Patent #:
Issue Dt:
01/20/2009
Application #:
11511680
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
THIN FILM PHASE CHANGE MEMORY CELL FORMED ON SILICON-ON-INSULATOR SUBSTRATE
100
Patent #:
Issue Dt:
04/23/2013
Application #:
11512000
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
03/06/2008
Title:
ASYMMETRIC TRANSISTOR
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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