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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/15/2010
Application #:
11776118
Filing Dt:
07/11/2007
Publication #:
Pub Dt:
01/15/2009
Title:
FINFET SRAM WITH ASYMMETRIC GATE AND METHOD OF MANUFACTURE THEREOF
2
Patent #:
Issue Dt:
12/29/2009
Application #:
11776155
Filing Dt:
07/11/2007
Publication #:
Pub Dt:
06/05/2008
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
3
Patent #:
Issue Dt:
01/13/2009
Application #:
11776710
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
01/15/2009
Title:
PROCESS FOR FINFET SPACER FORMATION
4
Patent #:
Issue Dt:
12/21/2010
Application #:
11776738
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
11/08/2007
Title:
STRUCTURE AND METHOD FOR LATCHUP SUPPRESSION
5
Patent #:
Issue Dt:
09/13/2011
Application #:
11776810
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
01/15/2009
Title:
DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA
6
Patent #:
Issue Dt:
02/22/2011
Application #:
11776986
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
01/15/2009
Title:
MECHANISM FOR USING PERFORMANCE COUNTERS TO IDENTIFY REASONS AND DELAY TIMES FOR INSTRUCTIONS THAT ARE STALLED DURING RETIREMENT
7
Patent #:
Issue Dt:
06/16/2009
Application #:
11777329
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
APPARATUS AND METHOD FOR DETERMINING THE SLEW RATE OF A SIGNAL PRODUCED BY AN INTEGRATED CIRCUIT
8
Patent #:
Issue Dt:
02/08/2011
Application #:
11777837
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
THERMALLY PUMPED LIQUID/GAS HEAT EXCHANGER FOR COOLING HEAT-GENERATING DEVICES
9
Patent #:
Issue Dt:
03/29/2011
Application #:
11778185
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
01/22/2009
Title:
ASYMMETRIC FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD
10
Patent #:
Issue Dt:
06/08/2010
Application #:
11778209
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
01/22/2009
Title:
GRAPHENE-BASED TRANSISTOR
11
Patent #:
Issue Dt:
04/06/2010
Application #:
11778217
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
01/22/2009
Title:
FIN-TYPE FIELD EFFECT TRANSISTOR STRUCTURE WITH MERGED SOURCE/DRAIN SILICIDE AND METHOD OF FORMING THE STRUCTURE
12
Patent #:
Issue Dt:
04/29/2014
Application #:
11778238
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
01/17/2008
Title:
METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC
13
Patent #:
Issue Dt:
08/31/2010
Application #:
11778644
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
05/29/2008
Title:
AUTONOMIC PARITY EXCHANGE
14
Patent #:
Issue Dt:
05/18/2010
Application #:
11778852
Filing Dt:
07/17/2007
Publication #:
Pub Dt:
01/22/2009
Title:
INVERSE SELF-ALIGNED SPACER LITHOGRAPHY
15
Patent #:
Issue Dt:
10/12/2010
Application #:
11778876
Filing Dt:
07/17/2007
Publication #:
Pub Dt:
01/22/2009
Title:
INTEGRATED WAFER PROCESSING SYSTEM FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS
16
Patent #:
Issue Dt:
02/18/2014
Application #:
11778930
Filing Dt:
07/17/2007
Publication #:
Pub Dt:
07/31/2008
Title:
METHOD FOR FORMING SILICON/GERMANIUM CONTAINING DRAIN/SOURCE REGIONS IN TRANSISTORS WITH REDUCED SILICON/GERMANIUM LOSS
17
Patent #:
Issue Dt:
04/19/2011
Application #:
11780283
Filing Dt:
07/19/2007
Publication #:
Pub Dt:
01/22/2009
Title:
SPECULATIVE MEMORY PREFETCH
18
Patent #:
Issue Dt:
03/15/2011
Application #:
11780519
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
THIN GATE ELECTRODE CMOS DEVICES AND METHODS OF FABRICATING SAME
19
Patent #:
Issue Dt:
09/13/2011
Application #:
11780530
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT
20
Patent #:
Issue Dt:
10/19/2010
Application #:
11780712
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/31/2008
Title:
ARCHITECTURAL LEVEL THROUGHPUT BASED POWER MODELING METHODOLOGY AND APPARATUS FOR PERVASIVELY CLOCK-GATED PROCESSOR CORES
21
Patent #:
Issue Dt:
10/11/2011
Application #:
11781363
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
01/29/2009
Title:
MODELING HOMOGENEOUS PARALLELISM
22
Patent #:
Issue Dt:
07/15/2008
Application #:
11781370
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
11/15/2007
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
23
Patent #:
Issue Dt:
10/11/2011
Application #:
11781833
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
12/13/2007
Title:
METHODS OF CREATING A DICTIONARY FOR DATA COMPRESSION
24
Patent #:
Issue Dt:
04/28/2009
Application #:
11781850
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
12/13/2007
Title:
CABLE HAVING TRANSLUCENT, SEMI-TRANSPARENT OR TRANSPARENT ESD DISSIPATIVE LAYER AND/OR METALLIC LAYER
25
Patent #:
Issue Dt:
07/06/2010
Application #:
11782071
Filing Dt:
07/24/2007
Publication #:
Pub Dt:
01/29/2009
Title:
HALF-SELECT COMPLIANT MEMORY CELL PRECHARGE CIRCUIT
26
Patent #:
Issue Dt:
12/28/2010
Application #:
11782079
Filing Dt:
07/24/2007
Publication #:
Pub Dt:
01/29/2009
Title:
PARTIALLY GATED FINFET WITH GATE DIELECTRIC ON ONLY ONE SIDEWALL
27
Patent #:
Issue Dt:
04/27/2010
Application #:
11782734
Filing Dt:
07/25/2007
Publication #:
Pub Dt:
07/03/2008
Title:
TEST STRUCTURE FOR ESTIMATING ELECTROMIGRATION EFFECTS WITH INCREASED ROBUSTNESS WITH RESPECT TO BARRIER DEFECTS IN VIAS
28
Patent #:
NONE
Issue Dt:
Application #:
11782987
Filing Dt:
07/25/2007
Publication #:
Pub Dt:
07/31/2008
Title:
METHOD OF FORMING A METAL LAYER OVER A PATTERNED DIELECTRIC BY ELECTROLESS DEPOSITION USING A SELECTIVELY PROVIDED ACTIVATION LAYER
29
Patent #:
Issue Dt:
10/19/2010
Application #:
11788215
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/23/2008
Title:
TOKEN BASED POWER CONTROL MECHANISM
30
Patent #:
Issue Dt:
06/23/2009
Application #:
11789902
Filing Dt:
04/25/2007
Publication #:
Pub Dt:
08/30/2007
Title:
FLUORINATED SILSESQUIOXANE POLYMERS AND USE THEREOF IN LITHOGRAPHIC PHOTORESIST COMPOSITIONS
31
Patent #:
Issue Dt:
02/12/2013
Application #:
11796073
Filing Dt:
04/26/2007
Publication #:
Pub Dt:
10/30/2008
Title:
MEMORY DEVICE WITH IMPROVED PERFORMANCE
32
Patent #:
Issue Dt:
06/17/2008
Application #:
11799261
Filing Dt:
04/10/2007
Publication #:
Pub Dt:
09/20/2007
Title:
INTEGRATION OF STRAINED GE INTO ADVANCED CMOS TECHNOLOGY
33
Patent #:
Issue Dt:
11/26/2013
Application #:
11811418
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
METHOD FOR DEPOSITING A CONDUCTIVE CAPPING LAYER ON METAL LINES
34
Patent #:
Issue Dt:
01/04/2011
Application #:
11819748
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
09/04/2008
Title:
SYSTEM AND METHOD FOR SYSTEM-ON-CHIP INTERCONNECT VERIFICATION
35
Patent #:
Issue Dt:
03/25/2008
Application #:
11820713
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
10/25/2007
Title:
METHOD OF FORMING SILICON-ON-INSULATOR WAFER HAVING REENTRANT SHAPE DIELECTRIC TRENCHES
36
Patent #:
Issue Dt:
07/01/2008
Application #:
11820862
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
11/08/2007
Title:
NEGATIVE RESISTS BASED ON ACID-CATALYZED ELIMINATION OF POLAR MOLECULES
37
Patent #:
Issue Dt:
02/01/2011
Application #:
11828382
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
METHOD AND APPARATUS FOR HANDLING EXCESS DATA DURING MEMORY ACCESS
38
Patent #:
Issue Dt:
03/31/2009
Application #:
11828390
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR GENERATING RANDOM JITTER
39
Patent #:
Issue Dt:
01/13/2009
Application #:
11828666
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/31/2008
Title:
OPTICAL SPOT GEOMETRIC PARAMETER DETERMINATION USING CALIBRATION TARGETS
40
Patent #:
Issue Dt:
07/20/2010
Application #:
11828705
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR DYNAMICALLY SELECTING COMPILED INSTRUCTIONS
41
Patent #:
Issue Dt:
04/19/2011
Application #:
11829187
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/24/2008
Title:
ENABLING MEMORY REDUNDANCY DURING TESTING
42
Patent #:
Issue Dt:
10/20/2009
Application #:
11830116
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/05/2009
Title:
SHRINK TEST MODE TO IDENTIFY NTH ORDER SPEED PATHS
43
Patent #:
Issue Dt:
02/24/2009
Application #:
11830200
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
01/24/2008
Title:
APPARATUS AND METHODS FOR INTEGRALLY PACKAGING OPTOELECTRONIC DEVICES, IC CHIPS AND OPTICAL TRANSMISSION LINES
44
Patent #:
Issue Dt:
04/19/2011
Application #:
11830213
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
12/25/2008
Title:
ELECTROLYTIC DEVICE BASED ON A SOLUTION-PROCESSED ELECTROLYTE
45
Patent #:
Issue Dt:
12/02/2008
Application #:
11830221
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/07/2008
Title:
CIRCUITS AND METHODS FOR IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER WAVE FREQUENCIES
46
Patent #:
Issue Dt:
02/19/2013
Application #:
11830239
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
01/17/2013
Title:
APPARATUS AND METHODS FOR PACKAGING ANTENNAS WITH INTEGRATED CIRCUIT CHIPS FOR MILLIMETER WAVE APPLICATIONS
47
Patent #:
Issue Dt:
02/07/2012
Application #:
11830316
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/05/2009
Title:
FIELD EFFECT TRANSISTOR HAVING AN ASYMMETRIC GATE ELECTRODE
48
Patent #:
Issue Dt:
11/17/2009
Application #:
11830328
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/05/2009
Title:
FINFET FLASH MEMORY DEVICE WITH AN EXTENDED FLOATING BACK GATE
49
Patent #:
Issue Dt:
09/09/2008
Application #:
11830464
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
11/15/2007
Title:
STRAINED SILICON DIRECTLY-ON-INSULATOR SUBSTRATE WITH HYBRID CRYSTALLINE ORIENTATION AND DIFFERENT STRESS LEVELS
50
Patent #:
Issue Dt:
09/16/2008
Application #:
11830489
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
11/22/2007
Title:
STRUCTURE AND METHOD OF FABRICATING A HYBRID SUBSTRATE FOR HIGH-PERFORMANCE HYBRID-ORIENTATION SILICON-ON-INSULATOR CMOS DEVICES
51
Patent #:
Issue Dt:
05/26/2009
Application #:
11830872
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
11/22/2007
Title:
DOUBLE GATE ISOLATION
52
Patent #:
Issue Dt:
06/14/2011
Application #:
11831005
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING SAME
53
Patent #:
Issue Dt:
04/12/2011
Application #:
11831099
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
LAYER PATTERNING USING DOUBLE EXPOSURE PROCESSES IN A SINGLE PHOTORESIST LAYER
54
Patent #:
Issue Dt:
10/04/2011
Application #:
11831119
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
PLACING VIRTUAL MACHINE MONITOR (VMM) CODE IN GUEST CONTEXT TO SPEED MEMORY MAPPED INPUT/OUTPUT VIRTUALIZATION
55
Patent #:
Issue Dt:
02/07/2012
Application #:
11831137
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
01/24/2008
Title:
METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING)
56
Patent #:
Issue Dt:
08/09/2011
Application #:
11831138
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
MICROELECTRONIC STRUCTURE INCLUDING DUAL DAMASCENE STRUCTURE AND HIGH CONTRAST ALIGNMENT MARK
57
Patent #:
Issue Dt:
07/28/2009
Application #:
11831149
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
INTERCONNECT STRUCTURE WITH GRAIN GROWTH PROMOTION LAYER AND METHOD FOR FORMING THE SAME
58
Patent #:
Issue Dt:
03/22/2011
Application #:
11832220
Filing Dt:
08/01/2007
Publication #:
Pub Dt:
12/20/2007
Title:
DRAM ACCESS COMMAND QUEUING
59
Patent #:
Issue Dt:
03/29/2011
Application #:
11832453
Filing Dt:
08/01/2007
Publication #:
Pub Dt:
01/24/2008
Title:
ENHANCING A POWER DISTRIBUTION SYSTEM IN A CERAMIC INTEGRATED CIRCUIT PACKAGE
60
Patent #:
Issue Dt:
03/08/2011
Application #:
11833112
Filing Dt:
08/02/2007
Publication #:
Pub Dt:
02/05/2009
Title:
SMALL AREA, ROBUST SILICON VIA STRUCTURE AND PROCESS
61
Patent #:
Issue Dt:
09/25/2012
Application #:
11833274
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
03/06/2008
Title:
DATA STORAGE SYSTEMS
62
Patent #:
Issue Dt:
06/28/2011
Application #:
11833321
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/05/2009
Title:
PROGRAMMABLE VIA DEVICES IN BACK END OF LINE LEVEL
63
Patent #:
Issue Dt:
04/26/2011
Application #:
11833538
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/05/2009
Title:
MULTIPLE SOURCE-SINGLE DRAIN FIELD EFFECT SEMICONDUCTOR DEVICE AND CIRCUIT
64
Patent #:
Issue Dt:
05/10/2011
Application #:
11834110
Filing Dt:
08/06/2007
Publication #:
Pub Dt:
02/12/2009
Title:
DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
65
Patent #:
Issue Dt:
07/06/2010
Application #:
11834552
Filing Dt:
08/06/2007
Publication #:
Pub Dt:
02/12/2009
Title:
HEAT SINK WITH THERMALLY COMPLIANT BEAMS
66
Patent #:
Issue Dt:
12/21/2010
Application #:
11834752
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
BIDIRECTIONAL AND EXPANDABLE HEAT FLOW MEASUREMENT TOOL FOR UNITS OF AIR COOLED ELECTRICAL EQUIPMENT
67
Patent #:
Issue Dt:
10/19/2010
Application #:
11834956
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
68
Patent #:
Issue Dt:
06/28/2011
Application #:
11834961
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
69
Patent #:
Issue Dt:
08/09/2011
Application #:
11834971
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
APPARATUS AND METHOD OF ELECTROLYTIC REMOVAL OF METALS FROM A WAFER SURFACE
70
Patent #:
Issue Dt:
11/09/2010
Application #:
11834979
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
MULTIPLE EXPOSURE TECHNIQUE USING OPC TO CORRECT DISTORTION
71
Patent #:
Issue Dt:
12/22/2009
Application #:
11835167
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
01/24/2008
Title:
VERTICAL NANOTUBE FIELD EFFECT TRANSISTOR
72
Patent #:
Issue Dt:
09/21/2010
Application #:
11835182
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHODS FOR MANUFACTURING A FINFET USING A CONVENTIONAL WAFER AND APPARATUS MANUFACTURED THEREFROM
73
Patent #:
Issue Dt:
02/01/2011
Application #:
11835310
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
SIMPLE LOW POWER CIRCUIT STRUCTURE WITH METAL GATE AND HIGH-K DIELECTRIC
74
Patent #:
Issue Dt:
06/23/2009
Application #:
11835800
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
ELECTRICAL FUSE WITH A THINNED FUSELINK MIDDLE PORTION
75
Patent #:
Issue Dt:
06/22/2010
Application #:
11836259
Filing Dt:
08/09/2007
Publication #:
Pub Dt:
01/03/2008
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
76
Patent #:
Issue Dt:
06/07/2011
Application #:
11836842
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
11/29/2007
Title:
AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS OF A MATRIX
77
Patent #:
Issue Dt:
01/26/2010
Application #:
11837057
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
02/12/2009
Title:
EXTREMELY-THIN SILICON-ON-INSULATOR TRANSISTOR WITH RAISED SOURCE/DRAIN
78
Patent #:
Issue Dt:
11/08/2011
Application #:
11837785
Filing Dt:
08/13/2007
Publication #:
Pub Dt:
02/19/2009
Title:
SYSTEM AND METHOD FOR PROVIDING ERROR CORRECTION AND DETECTION IN A MEMORY SYSTEM
79
Patent #:
Issue Dt:
02/22/2011
Application #:
11838507
Filing Dt:
08/14/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MICROELECTRONIC LITHOGRAPHIC ALIGNMENT USING HIGH CONTRAST ALIGNMENT MARK
80
Patent #:
Issue Dt:
07/13/2010
Application #:
11838663
Filing Dt:
08/14/2007
Publication #:
Pub Dt:
02/19/2009
Title:
METHOD AND APPARATUS FOR FABRICATING SUB-LITHOGRAPHY DATA TRACKS FOR USE IN MAGNETIC SHIFT REGISTER MEMORY DEVICES
81
Patent #:
Issue Dt:
06/17/2008
Application #:
11838931
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
11/29/2007
Title:
CAPACITOR BELOW THE BURIED OXIDE OF SOI CMOS TECHNOLOGIES FOR PROTECTION AGAINST SOFT ERRORS
82
Patent #:
Issue Dt:
03/31/2009
Application #:
11838939
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
01/24/2008
Title:
FORMATION OF METAL-INSULATOR-METAL CAPACITOR SIMULTANEOUSLY WITH ALUMINUM METAL WIRING LEVEL USING A HARDMASK
83
Patent #:
Issue Dt:
10/04/2011
Application #:
11839106
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
11/29/2007
Title:
VARIED IMPURITY PROFILE REGION FORMATION FOR VARYING BREAKDOWN VOLTAGE OF DEVICES
84
Patent #:
Issue Dt:
09/06/2011
Application #:
11839585
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
TRENCH ISOLATION AND METHOD OF FABRICATING TRENCH ISOLATION
85
Patent #:
Issue Dt:
10/13/2009
Application #:
11839611
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
LEVEL SHIFTER CIRCUIT WITH PRE-CHARGE/PRE-DISCHARGE
86
Patent #:
Issue Dt:
02/17/2009
Application #:
11839714
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
METHOD FOR REPORTING THE STATUS OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
87
Patent #:
Issue Dt:
11/16/2010
Application #:
11839749
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
TOOL FOR REPORTING THE STATUS AND DRILL-DOWN OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
88
Patent #:
Issue Dt:
03/29/2011
Application #:
11839767
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
04/24/2008
Title:
METHOD OF FORMING DAMASCENE FILAMENT WIRES
89
Patent #:
Issue Dt:
05/03/2011
Application #:
11839934
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
RESIST STRIPPING METHODS USING BACKFILLING MATERIAL LAYER
90
Patent #:
Issue Dt:
07/08/2008
Application #:
11840029
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
12/06/2007
Title:
HETERO-INTEGRATED STRAINED SILICON N- AND P- MOSFETS
91
Patent #:
Issue Dt:
07/19/2011
Application #:
11841161
Filing Dt:
08/20/2007
Publication #:
Pub Dt:
02/26/2009
Title:
MOS STRUCTURES THAT EXHIBIT LOWER CONTACT RESISTANCE AND METHODS FOR FABRICATING THE SAME
92
Patent #:
Issue Dt:
05/26/2009
Application #:
11841163
Filing Dt:
08/20/2007
Publication #:
Pub Dt:
12/06/2007
Title:
METHOD FOR FACILITATING FORWARDING OF DATA PACKETS THROUGH A NODE OF A DATA TRANSFER NETWORK USING MULTIPLE TYPES OF FORWARDING TABLES
93
Patent #:
Issue Dt:
03/22/2011
Application #:
11841179
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
METHOD AND APPARATUS FOR CLOCK CYCLE STEALING
94
Patent #:
Issue Dt:
11/08/2011
Application #:
11842206
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
02/26/2009
Title:
MULTICORE PROCESSOR HAVING STORAGE FOR CORE-SPECIFIC OPERATIONAL DATA
95
Patent #:
Issue Dt:
06/22/2010
Application #:
11842437
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
02/26/2009
Title:
SELF-ALIGNED SUPER STRESSED PFET
96
Patent #:
Issue Dt:
06/07/2011
Application #:
11842515
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
02/26/2009
Title:
METHODS FOR NORMALIZING ERROR IN PHOTOLITHOGRAPHIC PROCESSES
97
Patent #:
Issue Dt:
04/15/2008
Application #:
11842533
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
12/13/2007
Title:
METHOD AND APPARATUS FOR CHARACTERISTIC IMPEDANCE DISCONTINUITY REDUCTION IN HIGH-SPEED FLEXIBLE CIRCUIT APPLICATIONS
98
Patent #:
Issue Dt:
08/23/2011
Application #:
11843434
Filing Dt:
08/22/2007
Publication #:
Pub Dt:
02/26/2009
Title:
OPTIMAL SOLUTION TO CONTROL DATA CHANNELS
99
Patent #:
Issue Dt:
01/10/2012
Application #:
11843784
Filing Dt:
08/23/2007
Title:
CONNECTIVITY MANAGER TO MANAGE CONNECTIVITY SERVICES
100
Patent #:
Issue Dt:
09/07/2010
Application #:
11843791
Filing Dt:
08/23/2007
Publication #:
Pub Dt:
02/26/2009
Title:
DETECTION AND CORRECTION OF DROPPED WRITE ERRORS IN A DATA STORAGE SYSTEM
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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