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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 75 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
7880194
Issue Dt:
02/01/2011
Application #:
12106539
Filing Dt:
04/21/2008
Publication #:
US20090189731
Pub Dt:
07/30/2009
Title:
CROSS POINT SWITCH USING PHASE CHANGE MATERIAL
2
Patent #:
7902625
Issue Dt:
03/08/2011
Application #:
12106557
Filing Dt:
04/21/2008
Publication #:
US20090260669
Pub Dt:
10/22/2009
Title:
METAL-GATE THERMOCOUPLE
3
Patent #:
9059000
Issue Dt:
06/16/2015
Application #:
12106586
Filing Dt:
04/21/2008
Publication #:
US20080261128
Pub Dt:
10/23/2008
Title:
Methods and structures for protecting one area while processing another area on a chip
4
Patent #:
8111480
Issue Dt:
02/07/2012
Application #:
12106983
Filing Dt:
04/21/2008
Publication #:
US20080218904
Pub Dt:
09/11/2008
Title:
ELECTRONIC COMPONENT AND TAPE HEAD HAVING A CLOSURE
5
Patent #:
7865861
Issue Dt:
01/04/2011
Application #:
12107158
Filing Dt:
04/22/2008
Publication #:
US20080195993
Pub Dt:
08/14/2008
Title:
METHOD OF GENERATING WIRING ROUTES WITH MATCHING DELAY IN THE PRESENCE OF PROCESS VARIATION
6
Patent #:
NONE
Issue Dt:
Application #:
12107293
Filing Dt:
04/22/2008
Publication #:
US20090108415
Pub Dt:
04/30/2009
Title:
INCREASING ETCH SELECTIVITY DURING THE PATTERNING OF A CONTACT STRUCTURE OF A SEMICONDUCTOR DEVICE
7
Patent #:
7989358
Issue Dt:
08/02/2011
Application #:
12107303
Filing Dt:
04/22/2008
Publication #:
US20080191322
Pub Dt:
08/14/2008
Title:
PREVENTION OF BACKSIDE CRACKS IN SEMICONDUCTOR CHIPS OR WAFERS USING BACKSIDE FILM OR BACKSIDE WET ETCH
8
Patent #:
7849428
Issue Dt:
12/07/2010
Application #:
12107940
Filing Dt:
04/23/2008
Publication #:
US20080288901
Pub Dt:
11/20/2008
Title:
FORMALLY DERIVING A MINIMAL CLOCK-GATING SCHEME
9
Patent #:
7833907
Issue Dt:
11/16/2010
Application #:
12107980
Filing Dt:
04/23/2008
Publication #:
US20090267192
Pub Dt:
10/29/2009
Title:
CMP METHODS AVOIDING EDGE EROSION AND RELATED WAFER
10
Patent #:
8154130
Issue Dt:
04/10/2012
Application #:
12107992
Filing Dt:
04/23/2008
Publication #:
US20080220606
Pub Dt:
09/11/2008
Title:
SELF-ALIGNED METAL TO FORM CONTACTS TO GE CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY
11
Patent #:
7871935
Issue Dt:
01/18/2011
Application #:
12108119
Filing Dt:
04/23/2008
Publication #:
US20090269929
Pub Dt:
10/29/2009
Title:
NON-PLASMA CAPPING LAYER FOR INTERCONNECT APPLICATIONS
12
Patent #:
8015518
Issue Dt:
09/06/2011
Application #:
12108165
Filing Dt:
04/23/2008
Publication #:
US20090154037
Pub Dt:
06/18/2009
Title:
DESIGN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION FOR BIPOLAR SEMICONDUCTOR CIRCUITRY
13
Patent #:
7514290
Issue Dt:
04/07/2009
Application #:
12108512
Filing Dt:
04/24/2008
Title:
CHIP-TO-WAFER INTEGRATION TECHNOLOGY FOR THREE-DIMENSIONAL CHIP STACKING
14
Patent #:
7823115
Issue Dt:
10/26/2010
Application #:
12108629
Filing Dt:
04/24/2008
Publication #:
US20080201683
Pub Dt:
08/21/2008
Title:
METHOD OF GENERATING WIRING ROUTES WITH MATCHING DELAY IN THE PRESENCE OF PROCESS VARIATION
15
Patent #:
7977179
Issue Dt:
07/12/2011
Application #:
12108992
Filing Dt:
04/24/2008
Publication #:
US20090108295
Pub Dt:
04/30/2009
Title:
DOPANT PROFILE TUNING FOR MOS DEVICES BY ADAPTING A SPACER WIDTH PRIOR TO IMPLANTATION
16
Patent #:
7932136
Issue Dt:
04/26/2011
Application #:
12109025
Filing Dt:
04/24/2008
Publication #:
US20090267149
Pub Dt:
10/29/2009
Title:
SOURCE/DRAIN JUNCTION FOR HIGH PERFORMANCE MOSFET FORMED BY SELECTIVE EPI PROCESS
17
Patent #:
7875550
Issue Dt:
01/25/2011
Application #:
12110465
Filing Dt:
04/28/2008
Publication #:
US20080233743
Pub Dt:
09/25/2008
Title:
METHOD AND STRUCTURE FOR SELF-ALIGNED DEVICE CONTACTS
18
Patent #:
8008764
Issue Dt:
08/30/2011
Application #:
12110579
Filing Dt:
04/28/2008
Publication #:
US20090267238
Pub Dt:
10/29/2009
Title:
BRIDGES FOR INTERCONNECTING INTERPOSERS IN MULTI-CHIP INTEGRATED CIRCUITS
19
Patent #:
7816760
Issue Dt:
10/19/2010
Application #:
12110633
Filing Dt:
06/20/2008
Publication #:
US20080246112
Pub Dt:
10/09/2008
Title:
SEMICONDUCTOR STRUCTURE INCLUDING LAMINATED ISOLATION REGION
20
Patent #:
8027797
Issue Dt:
09/27/2011
Application #:
12110639
Filing Dt:
04/28/2008
Publication #:
US20090271134
Pub Dt:
10/29/2009
Title:
METHODS AND APPARATUS FOR DETERMINING A SWITCHING HISTORY TIME CONSTANT IN AN INTEGRATED CIRCUIT DEVICE
21
Patent #:
8203873
Issue Dt:
06/19/2012
Application #:
12110644
Filing Dt:
04/28/2008
Publication #:
US20080232160
Pub Dt:
09/25/2008
Title:
RECTIFYING ELEMENT FOR A CROSSPOINT BASED MEMORY ARRAY ARCHITECTURE
22
Patent #:
7756667
Issue Dt:
07/13/2010
Application #:
12110698
Filing Dt:
04/28/2008
Publication #:
US20080281551
Pub Dt:
11/13/2008
Title:
APPARATUS FOR THREE-DIMENSIONAL MEASUREMENTS OF PHYSICAL CHARACTERISTICS WITHIN A DATA CENTER
23
Patent #:
7739073
Issue Dt:
06/15/2010
Application #:
12110732
Filing Dt:
04/28/2008
Publication #:
US20080239539
Pub Dt:
10/02/2008
Title:
METHOD AND APPARATUS FOR THREE-DIMENSIONAL MEASUREMENTS OF PHYSICAL CHARACTERISTICS WITHIN A DATA CENTER
24
Patent #:
8028257
Issue Dt:
09/27/2011
Application #:
12110765
Filing Dt:
04/28/2008
Publication #:
US20080215783
Pub Dt:
09/04/2008
Title:
STRUCTURE FOR DATA BUS BANDWIDTH SCHEDULING IN AN FBDIMM MEMORY SYSTEM OPERATING IN VARIABLE LATENCY MODE
25
Patent #:
7836356
Issue Dt:
11/16/2010
Application #:
12110851
Filing Dt:
04/28/2008
Publication #:
US20090271664
Pub Dt:
10/29/2009
Title:
METHOD FOR MONITORING DEPENDENT METRIC STREAMS FOR ANOMALIES
26
Patent #:
7482180
Issue Dt:
01/27/2009
Application #:
12111196
Filing Dt:
04/29/2008
Title:
METHOD FOR DETERMINING THE IMPACT OF LAYER THICKNESSES ON LAMINATE WARPAGE
27
Patent #:
7877716
Issue Dt:
01/25/2011
Application #:
12111529
Filing Dt:
04/29/2008
Publication #:
US20080201681
Pub Dt:
08/21/2008
Title:
COMPUTER PROGRAM PRODUCTS FOR DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE
28
Patent #:
7930663
Issue Dt:
04/19/2011
Application #:
12111609
Filing Dt:
04/29/2008
Publication #:
US20080201675
Pub Dt:
08/21/2008
Title:
STRUCTURE FOR INTEGRATED CIRCUIT FOR MEASURING SET-UP AND HOLD TIMES FOR A LATCH ELEMENT
29
Patent #:
7958482
Issue Dt:
06/07/2011
Application #:
12112329
Filing Dt:
04/30/2008
Publication #:
US20090276748
Pub Dt:
11/05/2009
Title:
STITCHED CIRCUITRY REGION BOUNDARY INDENTIFICATION FOR STITCHED IC CHIP LAYOUT
30
Patent #:
8006211
Issue Dt:
08/23/2011
Application #:
12112336
Filing Dt:
04/30/2008
Publication #:
US20090276739
Pub Dt:
11/05/2009
Title:
IC CHIP AND DESIGN STRUCTURE INCLUDING STITCHED CIRCUITRY REGION BOUNDARY IDENTIFICATION
31
Patent #:
7952944
Issue Dt:
05/31/2011
Application #:
12112391
Filing Dt:
04/30/2008
Publication #:
US20090273960
Pub Dt:
11/05/2009
Title:
SYSTEM FOR PROVIDING ON-DIE TERMINATION OF A CONTROL SIGNAL BUS
32
Patent #:
7793067
Issue Dt:
09/07/2010
Application #:
12112611
Filing Dt:
04/30/2008
Publication #:
US20080209130
Pub Dt:
08/28/2008
Title:
TRANSLATION DATA PREFETCH IN AN IOMMU
33
Patent #:
8598569
Issue Dt:
12/03/2013
Application #:
12113064
Filing Dt:
04/30/2008
Publication #:
US20090272967
Pub Dt:
11/05/2009
Title:
PENTACENE-CARBON NANOTUBE COMPOSITE, METHOD OF FORMING THE COMPOSITE, AND SEMICONDUCTOR DEVICE INCLUDING THE COMPOSITE
34
Patent #:
8809182
Issue Dt:
08/19/2014
Application #:
12113230
Filing Dt:
05/01/2008
Publication #:
US20090273081
Pub Dt:
11/05/2009
Title:
PAD CUSHION STRUCTURE AND METHOD OF FABRICATION FOR PB-FREE C4 INTEGRATED CIRCUIT CHIP JOINING
35
Patent #:
7844933
Issue Dt:
11/30/2010
Application #:
12113288
Filing Dt:
05/01/2008
Publication #:
US20090276743
Pub Dt:
11/05/2009
Title:
METHODS OF OPTIMIZING TIMING OF SIGNALS IN AN INTEGRATED CIRCUIT DESIGN USING PROXY SLACK VALUES
36
Patent #:
7895547
Issue Dt:
02/22/2011
Application #:
12113374
Filing Dt:
05/01/2008
Publication #:
US20090276736
Pub Dt:
11/05/2009
Title:
TEST PATTERN BASED PROCESS MODEL CALIBRATION
37
Patent #:
7966723
Issue Dt:
06/28/2011
Application #:
12113457
Filing Dt:
05/01/2008
Publication #:
US20080212290
Pub Dt:
09/04/2008
Title:
METHOD FOR FACILITATING ACCESS TO ELECTRONIC COMPONENTS
38
Patent #:
7863143
Issue Dt:
01/04/2011
Application #:
12113462
Filing Dt:
05/01/2008
Publication #:
US20090273040
Pub Dt:
11/05/2009
Title:
HIGH PERFORMANCE SCHOTTKY-BARRIER-SOURCE ASYMMETRIC MOSFETS
39
Patent #:
7887978
Issue Dt:
02/15/2011
Application #:
12113559
Filing Dt:
05/01/2008
Publication #:
US20090274981
Pub Dt:
11/05/2009
Title:
METHOD OF DETECTING REPEATING DEFECTS IN LITHOGRAPHY MASKS ON THE BASIS OF TEST SUBSTRATES EXPOSED UNDER VARYING CONDITIONS
40
Patent #:
8010815
Issue Dt:
08/30/2011
Application #:
12113663
Filing Dt:
05/01/2008
Publication #:
US20090276649
Pub Dt:
11/05/2009
Title:
COMPUTATIONAL DEVICE POWER-SAVINGS
41
Patent #:
8028195
Issue Dt:
09/27/2011
Application #:
12114070
Filing Dt:
05/02/2008
Publication #:
US20090153172
Pub Dt:
06/18/2009
Title:
STRUCTURE FOR INDICATING STATUS OF AN ON-CHIP POWER SUPPLY SYSTEM
42
Patent #:
7564118
Issue Dt:
07/21/2009
Application #:
12114145
Filing Dt:
05/02/2008
Publication #:
US20080230891
Pub Dt:
09/25/2008
Title:
CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
43
Patent #:
7478301
Issue Dt:
01/13/2009
Application #:
12114198
Filing Dt:
05/02/2008
Publication #:
US20080209289
Pub Dt:
08/28/2008
Title:
PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
44
Patent #:
8015525
Issue Dt:
09/06/2011
Application #:
12114203
Filing Dt:
05/02/2008
Publication #:
US20080201676
Pub Dt:
08/21/2008
Title:
SYSTEM AND METHOD FOR ACCOMMODATING NON-GAUSSIAN AND NON-LINEAR SOURCES OF VARIATION IN STATISTICAL STATIC TIMING ANALYSIS
45
Patent #:
7598097
Issue Dt:
10/06/2009
Application #:
12114636
Filing Dt:
05/02/2008
Publication #:
US20080241369
Pub Dt:
10/02/2008
Title:
METHOD OF FABRICATING A MAGNETIC SHIFT REGISTER
46
Patent #:
7873891
Issue Dt:
01/18/2011
Application #:
12114853
Filing Dt:
05/05/2008
Publication #:
US20080203980
Pub Dt:
08/28/2008
Title:
PROGRAMMABLE VOLTAGE DIVIDER
47
Patent #:
7829926
Issue Dt:
11/09/2010
Application #:
12114857
Filing Dt:
05/05/2008
Publication #:
US20080203438
Pub Dt:
08/28/2008
Title:
DEMULTIPLEXERS USING TRANSISTORS FOR ACCESSING MEMORY CELL ARRAYS
48
Patent #:
7522000
Issue Dt:
04/21/2009
Application #:
12114984
Filing Dt:
05/05/2008
Publication #:
US20080204137
Pub Dt:
08/28/2008
Title:
DESIGN STRUCTURE FOR A SERIAL LINK OUTPUT STAGE DIFFERENTIAL AMPLIFIER
49
Patent #:
8017514
Issue Dt:
09/13/2011
Application #:
12115056
Filing Dt:
05/05/2008
Publication #:
US20090273084
Pub Dt:
11/05/2009
Title:
OPTICALLY TRANSPARENT WIRES FOR SECURE CIRCUITS AND METHODS OF MAKING SAME
50
Patent #:
7890294
Issue Dt:
02/15/2011
Application #:
12115166
Filing Dt:
05/05/2008
Publication #:
US20090327185
Pub Dt:
12/31/2009
Title:
SYSTEMS FOR STRUCTURAL CLUSTERING OF TIME SEQUENCES
51
Patent #:
8051248
Issue Dt:
11/01/2011
Application #:
12115355
Filing Dt:
05/05/2008
Publication #:
US20090276573
Pub Dt:
11/05/2009
Title:
TRANSIENT TRANSACTIONAL CACHE
52
Patent #:
7732336
Issue Dt:
06/08/2010
Application #:
12115473
Filing Dt:
05/05/2008
Publication #:
US20080213952
Pub Dt:
09/04/2008
Title:
SHALLOW TRENCH ISOLATION PROCESS AND STRUCTURE WITH MINIMIZED STRAINED SILICON CONSUMPTION
53
Patent #:
8004841
Issue Dt:
08/23/2011
Application #:
12115618
Filing Dt:
05/06/2008
Publication #:
US20090277616
Pub Dt:
11/12/2009
Title:
METHOD AND APPARATUS OF WATER COOLING SEVERAL PARALLEL CIRCUIT CARDS EACH CONTAINING SEVERAL CHIP PACKAGES
54
Patent #:
7704854
Issue Dt:
04/27/2010
Application #:
12115690
Filing Dt:
05/06/2008
Publication #:
US20090280619
Pub Dt:
11/12/2009
Title:
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING CONDUCTIVE LINER FOR RAD HARD TOTAL DOSE IMMUNITY
55
Patent #:
7855428
Issue Dt:
12/21/2010
Application #:
12115699
Filing Dt:
05/06/2008
Publication #:
US20090278226
Pub Dt:
11/12/2009
Title:
CONDUCTIVE LINER AT AN INTERFACE BETWEEN A SHALLOW TRENCH ISOLATION STRUCTURE AND A BURIED OXIDE LAYER
56
Patent #:
7943486
Issue Dt:
05/17/2011
Application #:
12115731
Filing Dt:
05/06/2008
Publication #:
US20080206958
Pub Dt:
08/28/2008
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
57
Patent #:
7692447
Issue Dt:
04/06/2010
Application #:
12115933
Filing Dt:
05/06/2008
Publication #:
US20080284466
Pub Dt:
11/20/2008
Title:
DRIVER CIRCUIT
58
Patent #:
8438001
Issue Dt:
05/07/2013
Application #:
12116248
Filing Dt:
05/07/2008
Publication #:
US20090281750
Pub Dt:
11/12/2009
Title:
METHOD AND APPARATUS FOR IMPROVING NOISE ANALYSIS PERFORMANCE
59
Patent #:
8191245
Issue Dt:
06/05/2012
Application #:
12116317
Filing Dt:
05/07/2008
Publication #:
US20080235942
Pub Dt:
10/02/2008
Title:
METHOD OF FORMING A LAND GRID ARRAY (LGA) INTERPOSER
60
Patent #:
7478291
Issue Dt:
01/13/2009
Application #:
12116345
Filing Dt:
05/07/2008
Publication #:
US20080209256
Pub Dt:
08/28/2008
Title:
MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERATING CONDITION AS ARRAY
61
Patent #:
8178908
Issue Dt:
05/15/2012
Application #:
12116470
Filing Dt:
05/07/2008
Publication #:
US20090278207
Pub Dt:
11/12/2009
Title:
AN ELECTRICAL CONTACT STRUCTURE HAVING MULTIPLE METAL INTERCONNECT LEVELS STAGGERING ONE ANOTHER.
62
Patent #:
7550359
Issue Dt:
06/23/2009
Application #:
12116626
Filing Dt:
05/07/2008
Title:
METHODS INVOLVING SILICON-ON-INSULATOR TRENCH MEMORY WITH IMPLANTED PLATE
63
Patent #:
8037594
Issue Dt:
10/18/2011
Application #:
12116655
Filing Dt:
05/07/2008
Publication #:
US20080303021
Pub Dt:
12/11/2008
Title:
METHOD OF FORMING A FLIP-CHIP PACKAGE
64
Patent #:
7986543
Issue Dt:
07/26/2011
Application #:
12116771
Filing Dt:
05/07/2008
Publication #:
US20080209126
Pub Dt:
08/28/2008
Title:
METHOD FOR ACHIEVING VERY HIGH BANDWIDTH BETWEEN THE LEVELS OF A CACHE HIERARCHY IN 3-DIMENSIONAL STRUCTURES, AND A 3-DIMENSIONAL STRUCTURE RESULTING THEREFROM
65
Patent #:
7882455
Issue Dt:
02/01/2011
Application #:
12117784
Filing Dt:
05/09/2008
Publication #:
US20090282375
Pub Dt:
11/12/2009
Title:
CIRCUIT AND METHOD USING DISTRIBUTED PHASE CHANGE ELEMENTS FOR ACROSS-CHIP TEMPERATURE PROFILING
66
Patent #:
7883277
Issue Dt:
02/08/2011
Application #:
12117803
Filing Dt:
05/09/2008
Publication #:
US20080205817
Pub Dt:
08/28/2008
Title:
INTERCONNECTING (MAPPING) A TWO-DIMENSIONAL OPTOELECTRONIC (OE) DEVICE ARRAY TO A ONE-DIMENSIONAL WAVEGUIDE ARRAY
67
Patent #:
7870531
Issue Dt:
01/11/2011
Application #:
12117841
Filing Dt:
05/09/2008
Publication #:
US20080216037
Pub Dt:
09/04/2008
Title:
SYSTEM FOR USING PARTITIONED MASKS TO BUILD A CHIP
68
Patent #:
7505308
Issue Dt:
03/17/2009
Application #:
12118441
Filing Dt:
05/09/2008
Title:
SYSTEMS INVOLVING SPIN-TRANSFER MAGNETIC RANDOM ACCESS MEMORY
69
Patent #:
7492631
Issue Dt:
02/17/2009
Application #:
12118496
Filing Dt:
05/09/2008
Title:
METHODS INVOLVING RESETTING SPIN-TORQUE MAGNETIC RANDOM ACCESS MEMORY
70
Patent #:
7741165
Issue Dt:
06/22/2010
Application #:
12118776
Filing Dt:
05/12/2008
Publication #:
US20080248635
Pub Dt:
10/09/2008
Title:
POLYCRYSTALLINE SIGE JUNCTIONS FOR ADVANCED DEVICES
71
Patent #:
7669018
Issue Dt:
02/23/2010
Application #:
12118818
Filing Dt:
05/12/2008
Publication #:
US20080215820
Pub Dt:
09/04/2008
Title:
METHOD AND APPARATUS FOR FILTERING MEMORY WRITE SNOOP ACTIVITY IN A DISTRIBUTED SHARED MEMORY COMPUTER
72
Patent #:
7821099
Issue Dt:
10/26/2010
Application #:
12118875
Filing Dt:
05/12/2008
Publication #:
US20080251846
Pub Dt:
10/16/2008
Title:
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Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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