|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12137628
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
METHOD AND SYSTEM PRODUCT FOR IMPLEMENTING UNCERTAINTY IN INTEGRATED CIRCUIT DESIGNS WITH PROGRAMMABLE LOGIC
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
12137743
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
CHEMICAL TRIM OF PHOTORESIST LINES BY MEANS OF A TUNED OVERCOAT MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
12137953
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
APPARATUS OF CAPACITY LEARNING FOR COMPUTER SYSTEMS AND APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2011
|
Application #:
|
12138099
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
WRITE FILTER CACHE METHOD AND APPARATUS FOR PROTECTING THE MICROPROCESSOR CORE FROM SOFT ERRORS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
12138482
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
SOLDER CONNECTOR STRUCTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12138532
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
DETECTING X STATE TRANSITIONS AND STORING COMPRESSED DEBUG INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12138536
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
TRENCH CAPACITORS AND MEMORY CELLS USING TRENCH CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12138871
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
STATIC TIMING SLACKS ANALYSIS AND MODIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
12139080
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
DEFECT REDUCTION BY OXIDATION OF SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12139476
|
Filing Dt:
|
06/15/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
HIGHLY SPECIALIZED SCENARIOS IN RANDOM TEST GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12139483
|
Filing Dt:
|
06/15/2008
|
Publication #:
|
|
Pub Dt:
|
07/16/2009
| | | | |
Title:
|
METHOD, SYSTEM, AND PROGRAM PRODUCT FOR AUTOMATED VERIFICATION OF GATING LOGIC USING FORMAL VERIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2011
|
Application #:
|
12139524
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
PIXEL SENSOR CELL, METHODS AND DESIGN STRUCTURE INCLUDING OPTICALLY TRANSPARENT GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12139564
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
NETWORK BASED ENERGY PREFERENCE SERVICE FOR MANAGING ELECTRIC VEHICLE CHARGING PREFERENCES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
12139574
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
ELECTRIC VEHICLE CHARGING TRANSACTION INTERFACE FOR MANAGING ELECTRIC VEHICLE CHARGING TRANSACTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2013
|
Application #:
|
12139704
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
INTERCONNECT STRUCTURE FOR ELECTROMIGRATION ENHANCEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
12139716
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12139722
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
MULTI-EXPOSURE LITHOGRAPHY EMPLOYING DIFFERENTIALLY SENSITIVE PHOTORESIST LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12139803
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
REDUCING EFFECTIVE DIELECTRIC CONSTANT IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
12139928
|
Filing Dt:
|
06/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
SELF-LEARNING OF THE OPTIMAL POWER OR PERFORMANCE OPERATING POINT OF A COMPUTER CHIP BASED ON INSTANTANEOUS FEEDBACK OF PRESENT OPERATING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
12140535
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
PHASE LOCKED LOOP APPARATUS WITH ADJUSTABLE PHASE SHIFT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
12140561
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
METHODS AND APPARATUS FOR READ/WRITE CONTROL AND BIT SELECTION WITH FALSE READ SUPPRESSION IN AN SRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
12140600
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
METHOD OF CREATING DEFECT FREE HIGH GE CONTENT (> 25%) SIGE-ON-INSULATOR (SGOI) SUBSTRATES USING WAFER BONDING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
12140714
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
METHOD FOR DEFEATING REVERSE ENGINEERING OF INTEGRATED CIRCUITS BY OPTICAL MEANS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
12141276
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
METHOD AND STRUCTURE FOR SOI BODY CONTACT FET WITH REDUCED PARASITIC CAPACITANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12141311
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
12141453
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
USER SELECTED GRID FOR LOGICALLY REPRESENTING AN ELECTRONIC CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
12141556
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
COUPLING ELEMENT ALIGNMENT USING WAVEGUIDE FIDUCIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12141960
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
APPARATUS FOR PROVIDING ERROR CORRECTION CAPABILITY TO LONGITUDINAL POSITION DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12141962
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
APPARATUS FOR PROVIDING ERROR CORRECTION CAPABILITY TO LONGITUDINAL POSITION DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
12142000
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
PROGRAM PRODUCT FOR PROVIDING A CONFIGURATION SPECIFICATION LANGUAGE SUPPORTING INCOMPLETELY SPECIFIED CONFIGURATION ENTITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
12142123
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
DIGITAL PHASE AND FREQUENCY DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
12142325
|
Filing Dt:
|
06/19/2008
|
Title:
|
SYSTEMS AND METHODS FOR ENUMERATIVE ENCODING AND DECODING OF MAXIMUM-TRANSITION-RUN CODES AND PRML (G,I,M) CODES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2010
|
Application #:
|
12142849
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
SECTIONAL FIELD EFFECT DEVICES AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12142870
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
METHOD OF FORMING A METAL SILICIDE LAYER, DEVICES INCORPORATING METAL SILICIDE LAYERS AND DESIGN STRUCTURES FOR THE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12142997
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
PLANAR ARRAY CONTACT MEMORY CARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
12143213
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
METHODS FOR FABRICATING A SEMICONDUCTOR STRUCTURE USING A MANDREL AND SEMICONDUCTOR STRUCTURES FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12143917
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12143918
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
MULTILAYERED CAP BARRIER IN MICROELECTRONIC INTERCONNECT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2010
|
Application #:
|
12143940
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
PISTON RESET APPARATUS FOR A MULTICHIP MODULE AND METHOD FOR RESETTING PISTONS IN THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
12144071
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
METHOD FOR FORMING AN ON-CHIP HIGH FREQUENCY ELECTRO-STATIC DISCHARGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12144095
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
DESIGN STRUCTURE FOR AN ON-CHIP HIGH FREQUENCY ELECTRO-STATIC DISCHARGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
12144139
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
METHOD OF FORMING A DUAL GATED FINFET GAIN CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12144229
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
ADOPTING FEATURE OF BURIED ELECTRICALLY CONDUCTIVE LAYER IN DIELECTRICS FOR ELECTRICAL ANTI-FUSE APPLICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
12144272
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
SUBSTRATE SOLUTION FOR BACK GATE CONTROLLED SRAM WITH COEXISTING LOGIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12144682
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
DESIGN STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12144684
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
DESIGN STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
12144703
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
DESIGN STRUCTURE AND APPARATUS FOR A ROBUST EMBEDDED INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
12144998
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
VERTICAL BIPOLAR TRANSISTOR WITH A MAJORITY CARRIER ACCUMULATION LAYER AS A SUBCOLLECTOR FOR SOI BICMOS WITH REDUCED BURIED OXIDE THICKNESS FOR LOW-SUBSTRATE BIAS OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
12145024
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
STRUCTURE AND METHOD OF FABRICATING A HYBRID SUBSTRATE FOR HIGH-PERFORMANCE HYBRID-ORIENTATION SILICON-ON-INSULATOR CMOS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12145163
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
SILICIDE INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
12145502
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
BALANCING POWER PLANE PIN CURRENTS AND IMPROVING STRENGTH IN A PRINTED WIRING BOARD USING COLLINEAR SLOTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
12145715
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
REDUCED POWER CONSUMPTION LIMITED-SWITCH DYNAMIC LOGIC (LSDL) CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12146128
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
WRITE OPERATIONS FOR PHASE-CHANGE-MATERIAL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12146555
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
BEOL WIRING STRUCTURES THAT INCLUDE AN ON-CHIP INDUCTOR AND AN ON-CHIP CAPACITOR, AND DESIGN STRUCTURES FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12146560
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
BAND GAP MODULATED OPTICAL SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12146575
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
BAND GAP MODULATED OPTICAL SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
12146601
|
Filing Dt:
|
06/26/2008
|
Title:
|
CIRCULAR GRATING RESONATOR WITH INTEGRATED ELECTRO-OPTICAL MODULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
12146728
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
STRUCTURES, FABRICATION METHODS, DESIGN STRUCTURES FOR STRAINED FIN FIELD EFFECT TRANSISTORS (FINFETS)
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2012
|
Application #:
|
12146757
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
PLASTIC LAND GRID ARRAY (PLGA) MODULE AND PRINTED WIRING BOARD (PWB) WITH ENHANCED CONTACT METALLURGY CONSTRUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12146777
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
HIGH PERFORMANCE READ BYPASS TEST FOR SRAM CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
12146798
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
SOLDER INTERCONNECTION ARRAY WITH OPTIMAL MECHANICAL INTEGRITY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
12146852
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
TECHNIQUES FOR THERMAL MODELING OF DATA CENTERS TO IMPROVE ENERGY EFFICIENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12147685
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SMI MEMORY READ DATA CAPTURE MARGIN CHARACTERIZATION CIRCUITS AND METHODS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12148020
|
Filing Dt:
|
04/16/2008
|
Publication #:
|
|
Pub Dt:
|
10/22/2009
| | | | |
Title:
|
Giant magnetoresistance (GMR) memory device
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12154003
|
Filing Dt:
|
05/19/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
IMMERSION OPTICAL LITHOGRAPHY SYSTEM HAVING PROTECTIVE OPTICAL COATING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12163318
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
07/30/2009
| | | | |
Title:
|
CHARGE-BASED CIRCUIT ANALYSIS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12164152
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
QUAD FLAT NO-LEAD CHIP CARRIER WITH STANDOFF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
12164447
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
PRODUCTION OF INTEGRATED CIRCUIT CHIP PACKAGES PROHIBITING FORMATION OF MICRO SOLDER BALLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12164478
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
Title:
|
HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
12164576
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
Title:
|
METHOD OF OBTAINING ENHANCED LOCALIZED THERMAL INTERFACE REGIONS BY PARTICLE STACKING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
12164580
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
CMOS COMPATIBLE INTEGRATED DIELECTRIC OPTICAL WAVEGUIDE COUPLER AND FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
12164599
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
NONLITHOGRAPHIC METHOD TO PRODUCE SELF-ALIGNED MASK, ARTICLES PRODUCED BY SAME AND COMPOSITIONS FOR SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12164603
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
Title:
|
SYSTEM FOR MONITORING MULTI-ORDERABLE MEASUREMENT DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12164647
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
SELECTIVELY COATED SELF-ALIGNED MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12164690
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
02/05/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR FABRICATING A CARBON NANOTUBE TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2010
|
Application #:
|
12164781
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
USING CONSTRAINTS IN DESIGN VERIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
12165009
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR ONLINE SAMPLE INTERVAL DETERMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
12165134
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
SYSTEM AND METHOD FOR SENSOR REPLICATION FOR ENSEMBLE AVERAGING IN MICRO-ELECTROMECHANICAL SYSTEM (MEMS)
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
12165355
|
Filing Dt:
|
06/30/2008
|
Title:
|
ERROR DETECTION ENHANCEMENT IN A MICROPROCESSOR THROUGH THE USE OF A SECOND DEPENDENCY MATRIX
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
12165530
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
HIGH DENSITY CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12165725
|
Filing Dt:
|
07/01/2008
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
METHOD AND TEST STRUCTURE FOR MONITORING CMP PROCESSES IN METALLIZATION LAYERS OF SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
12166285
|
Filing Dt:
|
07/01/2008
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
ULTRA THIN CHANNEL (UTC) MOSFET STRUCTURE FORMED ON BOX REGIONS HAVING DIFFERENT DEPTHS AND DIFFERENT THICKNESSES BENEATH THE UTC AND SOURCEDRAIN REGIONS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12166311
|
Filing Dt:
|
07/01/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12166362
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
12166373
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
TOOL FOR FILLING VIAS IN A GREENSHEET
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
12166523
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
SOLDER STANDOFFS FOR INJECTION MOLDING OF SOLDER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
12166550
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
12166571
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
ACCESS TABLE LOOKUP FOR BUS BRIDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
12166623
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
PASSIVE ELECTRICALLY TESTABLE ACCELERATION AND VOLTAGE MEASUREMENT DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
12166773
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
PLANAR ARRAY CONTACT MEMORY CARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
12166934
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
PHASE CHANGE MEMORY PROGRAMMING METHOD WITHOUT RESET OVER-WRITE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12166958
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
SPUTTERING TARGET FIXTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12167686
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12167808
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
IN-DIE FOCUS MONITORING WITH BINARY MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
12167817
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
LOW TEMPERATURE MELT-PROCESSING OF ORGANIC-INORGANIC HYBRID
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12167823
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
MEMORY DEVICE AND METHOD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12167947
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
Method, System and Computer Program for Operational-Risk Modeling
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12168153
|
Filing Dt:
|
07/06/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
SLEW CONSTRAINED MINIMUM COST BUFFERING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12168310
|
Filing Dt:
|
07/07/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROJECTION LITHOGRAPHY WITH IMMERSED IMAGE-ALIGNED DIFFRACTIVE ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
12168328
|
Filing Dt:
|
07/07/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES HAVING CHARACTERISTICS SUITABLE FOR MASS PRODUCTION
|
|