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Reel/Frame:056987/0001   Pages: 1045
Recorded: 05/12/2021
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18026
Page 87 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
8676559
Issue Dt:
03/18/2014
Application #:
12566509
Filing Dt:
09/24/2009
Publication #:
US20110071800
Pub Dt:
03/24/2011
Title:
SYSTEM AND METHOD FOR PROVIDING EFFICIENT SCHEMATIC REVIEW
2
Patent #:
8193062
Issue Dt:
06/05/2012
Application #:
12566717
Filing Dt:
09/25/2009
Publication #:
US20110073958
Pub Dt:
03/31/2011
Title:
ASYMMETRIC SILICON-ON-INSULATOR SRAM CELL
3
Patent #:
8339893
Issue Dt:
12/25/2012
Application #:
12566862
Filing Dt:
09/25/2009
Publication #:
US20110075504
Pub Dt:
03/31/2011
Title:
DUAL BETA RATIO SRAM
4
Patent #:
8242030
Issue Dt:
08/14/2012
Application #:
12566870
Filing Dt:
09/25/2009
Publication #:
US20110073834
Pub Dt:
03/31/2011
Title:
ACTIVATION OF GRAPHENE BUFFER LAYERS ON SILICON CARBIDE BY ULTRA LOW TEMPERATURE OXIDATION
5
Patent #:
7947158
Issue Dt:
05/24/2011
Application #:
12567279
Filing Dt:
09/25/2009
Publication #:
US20100024724
Pub Dt:
02/04/2010
Title:
APPARATUS AND METHOD FOR REMOVING BUBBLES FROM A PROCESS LIQUID
6
Patent #:
8178400
Issue Dt:
05/15/2012
Application #:
12567963
Filing Dt:
09/28/2009
Publication #:
US20110073909
Pub Dt:
03/31/2011
Title:
REPLACEMENT SPACER FOR TUNNEL FETS
7
Patent #:
8230276
Issue Dt:
07/24/2012
Application #:
12568035
Filing Dt:
09/28/2009
Publication #:
US20110078392
Pub Dt:
03/31/2011
Title:
WRITING TO MEMORY USING ADAPTIVE WRITE TECHNIQUES
8
Patent #:
8234001
Issue Dt:
07/31/2012
Application #:
12568083
Filing Dt:
09/28/2009
Publication #:
US20110077765
Pub Dt:
03/31/2011
Title:
TOOL COMMONALITY AND STRATIFICATION ANALYSIS TO ENHANCE A PRODUCTION PROCESS
9
Patent #:
8236661
Issue Dt:
08/07/2012
Application #:
12568287
Filing Dt:
09/28/2009
Publication #:
US20110073961
Pub Dt:
03/31/2011
Title:
SELF-ALIGNED WELL IMPLANT FOR IMPROVING SHORT CHANNEL EFFECTS CONTROL, PARASITIC CAPACITANCE, AND JUNCTION LEAKAGE
10
Patent #:
8239794
Issue Dt:
08/07/2012
Application #:
12568985
Filing Dt:
09/29/2009
Publication #:
US20110077882
Pub Dt:
03/31/2011
Title:
SYSTEM AND METHOD FOR ESTIMATING LEAKAGE CURRENT OF AN ELECTRONIC CIRCUIT
11
Patent #:
8202783
Issue Dt:
06/19/2012
Application #:
12569200
Filing Dt:
09/29/2009
Publication #:
US20110074044
Pub Dt:
03/31/2011
Title:
PATTERNABLE LOW-K DIELECTRIC INTERCONNECT STRUCTURE WITH A GRADED CAP LAYER AND METHOD OF FABRICATION
12
Patent #:
8680872
Issue Dt:
03/25/2014
Application #:
12569294
Filing Dt:
09/29/2009
Publication #:
US20110074436
Pub Dt:
03/31/2011
Title:
IDENTIFICATION OF FALSE POSITIVES IN HIGH IMPEDANCE FAULT DETECTION
13
Patent #:
8423328
Issue Dt:
04/16/2013
Application #:
12570195
Filing Dt:
09/30/2009
Publication #:
US20110077916
Pub Dt:
03/31/2011
Title:
METHOD OF DISTRIBUTING A RANDOM VARIABLE USING STATISTICALLY CORRECT SPATIAL INTERPOLATION CONTINUOUSLY WITH SPATIALLY INHOMOGENEOUS STATISTICAL CORRELATION VERSUS DISTANCE, STANDARD DEVIATION, AND MEAN
14
Patent #:
8145944
Issue Dt:
03/27/2012
Application #:
12570333
Filing Dt:
09/30/2009
Publication #:
US20110078499
Pub Dt:
03/31/2011
Title:
BUSINESS PROCESS ERROR HANDLING THROUGH PROCESS INSTANCE BACKUP AND RECOVERY
15
Patent #:
8084822
Issue Dt:
12/27/2011
Application #:
12570384
Filing Dt:
09/30/2009
Publication #:
US20110073951
Pub Dt:
03/31/2011
Title:
ENHANCED STRESS-RETENTION FIN-FET DEVICES AND METHODS OF FABRICATING ENHANCED STRESS RETENTION FIN-FET DEVICES
16
Patent #:
8239804
Issue Dt:
08/07/2012
Application #:
12570418
Filing Dt:
09/30/2009
Publication #:
US20110078642
Pub Dt:
03/31/2011
Title:
METHOD FOR CALCULATING CAPACITANCE GRADIENTS IN VLSI LAYOUTS USING A SHAPE PROCESSING ENGINE
17
Patent #:
8337627
Issue Dt:
12/25/2012
Application #:
12571477
Filing Dt:
10/01/2009
Publication #:
US20110079255
Pub Dt:
04/07/2011
Title:
CLEANING EXHAUST SCREENS IN A MANUFACTURING PROCESS
18
Patent #:
8230378
Issue Dt:
07/24/2012
Application #:
12572297
Filing Dt:
10/02/2009
Publication #:
US20100023913
Pub Dt:
01/28/2010
Title:
METHOD FOR IC WIRING YIELD OPTIMIZATION, INCLUDING WIRE WIDENING DURING AND AFTER ROUTING
19
Patent #:
8993428
Issue Dt:
03/31/2015
Application #:
12573188
Filing Dt:
10/05/2009
Publication #:
US20110079827
Pub Dt:
04/07/2011
Title:
STRUCTURE AND METHOD TO CREATE A DAMASCENE LOCAL INTERCONNECT DURING METAL GATE DEPOSITION
20
Patent #:
7867897
Issue Dt:
01/11/2011
Application #:
12573407
Filing Dt:
10/05/2009
Publication #:
US20100021656
Pub Dt:
01/28/2010
Title:
LOW LEAKAGE METAL-CONTAINING CAP PROCESS USING OXIDATION
21
Patent #:
8546252
Issue Dt:
10/01/2013
Application #:
12573440
Filing Dt:
10/05/2009
Publication #:
US20110079828
Pub Dt:
04/07/2011
Title:
METAL GATE FET HAVING REDUCED THRESHOLD VOLTAGE ROLL-OFF
22
Patent #:
7927895
Issue Dt:
04/19/2011
Application #:
12574118
Filing Dt:
10/06/2009
Publication #:
US20110080180
Pub Dt:
04/07/2011
Title:
VARYING CAPACITANCE VOLTAGE CONTRAST STRUCTURES TO DETERMINE DEFECT RESISTANCE
23
Patent #:
8377631
Issue Dt:
02/19/2013
Application #:
12574171
Filing Dt:
10/06/2009
Publication #:
US20110079579
Pub Dt:
04/07/2011
Title:
PLANARIZATION OVER TOPOGRAPHY WITH MOLECULAR GLASS MATERIALS
24
Patent #:
8946028
Issue Dt:
02/03/2015
Application #:
12574296
Filing Dt:
10/06/2009
Publication #:
US20110079855
Pub Dt:
04/07/2011
Title:
MERGED FINFETS AND METHOD OF MANUFACTURING THE SAME
25
Patent #:
7943458
Issue Dt:
05/17/2011
Application #:
12574318
Filing Dt:
10/06/2009
Publication #:
US20110081754
Pub Dt:
04/07/2011
Title:
METHODS FOR OBTAINING GATE STACKS WITH TUNABLE THRESHOLD VOLTAGE AND SCALING
26
Patent #:
8125048
Issue Dt:
02/28/2012
Application #:
12574926
Filing Dt:
10/07/2009
Publication #:
US20110079874
Pub Dt:
04/07/2011
Title:
ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
27
Patent #:
NONE
Issue Dt:
Application #:
12575003
Filing Dt:
10/07/2009
Publication #:
US20100112468
Pub Dt:
05/06/2010
Title:
SELF-CORRECTING SUBSTRATE SUPPORT SYSTEM FOR FOCUS CONTROL IN EXPOSURE SYSTEMS
28
Patent #:
8367430
Issue Dt:
02/05/2013
Application #:
12575068
Filing Dt:
10/07/2009
Publication #:
US20110079779
Pub Dt:
04/07/2011
Title:
SHAPE CHARACTERIZATION WITH ELLIPTIC FOURIER DESCRIPTOR FOR CONTACT OR ANY CLOSED STRUCTURES ON THE CHIP
29
Patent #:
8101486
Issue Dt:
01/24/2012
Application #:
12575344
Filing Dt:
10/07/2009
Publication #:
US20110081764
Pub Dt:
04/07/2011
Title:
METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL
30
Patent #:
8389663
Issue Dt:
03/05/2013
Application #:
12575515
Filing Dt:
10/08/2009
Publication #:
US20110083887
Pub Dt:
04/14/2011
Title:
PHOTO-PATTERNABLE DIELECTRIC MATERIALS CURABLE TO POROUS DIELECTRIC MATERIALS, FORMULATIONS, PRECURSORS AND METHODS OF USE THEREOF
31
Patent #:
8138523
Issue Dt:
03/20/2012
Application #:
12575962
Filing Dt:
10/08/2009
Publication #:
US20110084315
Pub Dt:
04/14/2011
Title:
SEMICONDUCTOR DEVICE HAVING SILICON ON STRESSED LINER (SOL)
32
Patent #:
8408262
Issue Dt:
04/02/2013
Application #:
12575968
Filing Dt:
10/08/2009
Publication #:
US20110083786
Pub Dt:
04/14/2011
Title:
ADAPTIVE CHUCK FOR PLANAR BONDING BETWEEN SUBSTRATES
33
Patent #:
8143135
Issue Dt:
03/27/2012
Application #:
12575989
Filing Dt:
10/08/2009
Publication #:
US20110084360
Pub Dt:
04/14/2011
Title:
EMBEDDED SERIES DEEP TRENCH CAPACITORS AND METHODS OF MANUFACTURE
34
Patent #:
8538129
Issue Dt:
09/17/2013
Application #:
12576597
Filing Dt:
10/09/2009
Publication #:
US20110085723
Pub Dt:
04/14/2011
Title:
MASK PROGRAM DEFECT TEST
35
Patent #:
8030144
Issue Dt:
10/04/2011
Application #:
12576987
Filing Dt:
10/09/2009
Publication #:
US20110084336
Pub Dt:
04/14/2011
Title:
SEMICONDUCTOR DEVICE WITH STRESSED FIN SECTIONS, AND RELATED FABRICATION METHODS
36
Patent #:
8288657
Issue Dt:
10/16/2012
Application #:
12577259
Filing Dt:
10/12/2009
Publication #:
US20110083888
Pub Dt:
04/14/2011
Title:
NOISE COUPLING REDUCTION AND IMPEDANCE DISCONTINUITY CONTROL IN HIGH-SPEED CERAMIC MODULES
37
Patent #:
8082464
Issue Dt:
12/20/2011
Application #:
12578372
Filing Dt:
10/13/2009
Publication #:
US20110087919
Pub Dt:
04/14/2011
Title:
MANAGING AVAILABILITY OF A COMPONENT HAVING A CLOSED ADDRESS SPACE
38
Patent #:
8495427
Issue Dt:
07/23/2013
Application #:
12578975
Filing Dt:
10/14/2009
Publication #:
US20110087927
Pub Dt:
04/14/2011
Title:
DETECTING DEFECTS IN DEPLOYED SYSTEMS
39
Patent #:
8538740
Issue Dt:
09/17/2013
Application #:
12579124
Filing Dt:
10/14/2009
Publication #:
US20110087469
Pub Dt:
04/14/2011
Title:
REAL-TIME PERFORMANCE MODELING OF SOFTWARE SYSTEMS WITH MULTI-CLASS WORKLOAD
40
Patent #:
NONE
Issue Dt:
Application #:
12579159
Filing Dt:
10/14/2009
Publication #:
US20110088008
Pub Dt:
04/14/2011
Title:
METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR
41
Patent #:
8241927
Issue Dt:
08/14/2012
Application #:
12579216
Filing Dt:
10/14/2009
Publication #:
US20110086445
Pub Dt:
04/14/2011
Title:
METHODS RELATING TO CAPACITIVE MONITORING OF LAYER CHARACTERISTICS DURING BACK END-OF-THE-LINE PROCESSING
42
Patent #:
8296256
Issue Dt:
10/23/2012
Application #:
12579442
Filing Dt:
10/15/2009
Publication #:
US20110093431
Pub Dt:
04/21/2011
Title:
SAT-BASED SYNTHESIS OF A CLOCK GATING FUNCTION
43
Patent #:
NONE
Issue Dt:
Application #:
12579507
Filing Dt:
10/15/2009
Publication #:
US20100110402
Pub Dt:
05/06/2010
Title:
FOCUS CORRECTION IN LITHOGRAPHY TOOLS VIA LENS ABERRATION CONTROL
44
Patent #:
8268679
Issue Dt:
09/18/2012
Application #:
12579654
Filing Dt:
10/15/2009
Publication #:
US20100107403
Pub Dt:
05/06/2010
Title:
SEMICONDUCTOR DEVICE COMPRISING EFUSES OF ENHANCED PROGRAMMING EFFICIENCY
45
Patent #:
8327302
Issue Dt:
12/04/2012
Application #:
12580330
Filing Dt:
10/16/2009
Publication #:
US20110093825
Pub Dt:
04/21/2011
Title:
TECHNIQUES FOR ANALYSIS OF LOGIC DESIGNS WITH TRANSIENT LOGIC
46
Patent #:
8423341
Issue Dt:
04/16/2013
Application #:
12581208
Filing Dt:
10/19/2009
Publication #:
US20110093242
Pub Dt:
04/21/2011
Title:
METHOD AND SYSTEM FOR CONSTRUCTING CORNER MODELS FOR MULTIPLE PERFORMANCE TARGETS
47
Patent #:
8198396
Issue Dt:
06/12/2012
Application #:
12583030
Filing Dt:
08/12/2009
Publication #:
US20090304908
Pub Dt:
12/10/2009
Title:
METHODS OF FABRICATING PLASTICIZED, ANTIPLASTICIZED AND CRYSTALLINE CONDUCTING POLYMERS AND PRECURSORS THEREOF
48
Patent #:
NONE
Issue Dt:
Application #:
12583108
Filing Dt:
08/13/2009
Publication #:
US20090302474
Pub Dt:
12/10/2009
Title:
Atomic laminates for diffucion barrier applications
49
Patent #:
8298459
Issue Dt:
10/30/2012
Application #:
12603567
Filing Dt:
10/21/2009
Publication #:
US20110089589
Pub Dt:
04/21/2011
Title:
SPIN-MOUNTED FABRICATION OF INJECTION MOLDED MICRO-OPTICS
50
Patent #:
8102599
Issue Dt:
01/24/2012
Application #:
12603569
Filing Dt:
10/21/2009
Publication #:
US20110090570
Pub Dt:
04/21/2011
Title:
FABRICATION OF OPTICAL FILTERS INTEGRATED WITH INJECTION MOLDED MICROLENSES
51
Patent #:
9018024
Issue Dt:
04/28/2015
Application #:
12603668
Filing Dt:
10/22/2009
Publication #:
US20110095393
Pub Dt:
04/28/2011
Title:
CREATING EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) HAVING SUBSTANTIALLY UNIFORM THICKNESS
52
Patent #:
8124427
Issue Dt:
02/28/2012
Application #:
12603671
Filing Dt:
10/22/2009
Publication #:
US20110097824
Pub Dt:
04/28/2011
Title:
METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON- INSULATOR (ETSOI) LAYER HAVING A UNIFORM THICKNESS
53
Patent #:
8301290
Issue Dt:
10/30/2012
Application #:
12603679
Filing Dt:
10/22/2009
Publication #:
US20110098838
Pub Dt:
04/28/2011
Title:
SYSTEM AND METHOD FOR CORRECTING SYSTEMATIC PARAMETRIC VARIATIONS ON INTEGRATED CIRCUIT CHIPS IN ORDER TO MINIMIZE CIRCUIT LIMITED YIELD LOSS
54
Patent #:
8110483
Issue Dt:
02/07/2012
Application #:
12603737
Filing Dt:
10/22/2009
Publication #:
US20110095366
Pub Dt:
04/28/2011
Title:
FORMING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER
55
Patent #:
8207027
Issue Dt:
06/26/2012
Application #:
12603838
Filing Dt:
10/22/2009
Publication #:
US20100041198
Pub Dt:
02/18/2010
Title:
TRIPLE GATE AND DOUBLE GATE FINFETS WITH DIFFERENT VERTICAL DIMENSION FINS
56
Patent #:
7932143
Issue Dt:
04/26/2011
Application #:
12604281
Filing Dt:
10/22/2009
Publication #:
US20110095341
Pub Dt:
04/28/2011
Title:
METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS
57
Patent #:
7954021
Issue Dt:
05/31/2011
Application #:
12604614
Filing Dt:
10/23/2009
Publication #:
US20110099419
Pub Dt:
04/28/2011
Title:
SOLID STATE DRIVE WITH FLASH SPARING
58
Patent #:
8883610
Issue Dt:
11/11/2014
Application #:
12604703
Filing Dt:
10/23/2009
Publication #:
US20100133648
Pub Dt:
06/03/2010
Title:
MICROSTRUCTURE DEVICE INCLUDING A METALLIZATION STRUCTURE WITH SELF-ALIGNED AIR GAPS BETWEEN CLOSELY SPACED METAL LINES
59
Patent #:
8614492
Issue Dt:
12/24/2013
Application #:
12605523
Filing Dt:
10/26/2009
Publication #:
US20110095267
Pub Dt:
04/28/2011
Title:
NANOWIRE STRESS SENSORS, STRESS SENSOR INTEGRATED CIRCUITS, AND DESIGN STRUCTURES FOR A STRESS SENSOR INTEGRATED CIRCUIT
60
Patent #:
8605254
Issue Dt:
12/10/2013
Application #:
12605732
Filing Dt:
10/26/2009
Publication #:
US20110096313
Pub Dt:
04/28/2011
Title:
Constrained Optimization Of Lithographic Source Intensities Under Contingent Requirements
61
Patent #:
8035141
Issue Dt:
10/11/2011
Application #:
12607104
Filing Dt:
10/28/2009
Publication #:
US20110095343
Pub Dt:
04/28/2011
Title:
BI-LAYER NFET EMBEDDED STRESSOR ELEMENT AND INTEGRATION TO ENHANCE DRIVE CURRENT
62
Patent #:
8120058
Issue Dt:
02/21/2012
Application #:
12607116
Filing Dt:
10/28/2009
Publication #:
US20110095333
Pub Dt:
04/28/2011
Title:
HIGH-DRIVE CURRENT MOSFET
63
Patent #:
8307994
Issue Dt:
11/13/2012
Application #:
12607258
Filing Dt:
10/28/2009
Publication #:
US20110094884
Pub Dt:
04/28/2011
Title:
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
64
Patent #:
8159060
Issue Dt:
04/17/2012
Application #:
12608368
Filing Dt:
10/29/2009
Publication #:
US20110101537
Pub Dt:
05/05/2011
Title:
HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION
65
Patent #:
7961996
Issue Dt:
06/14/2011
Application #:
12608518
Filing Dt:
10/29/2009
Publication #:
US20100046883
Pub Dt:
02/25/2010
Title:
COUPLING DEVICE FOR USE IN OPTICAL WAVEGUIDES
66
Patent #:
8340939
Issue Dt:
12/25/2012
Application #:
12610090
Filing Dt:
10/30/2009
Publication #:
US20110106483
Pub Dt:
05/05/2011
Title:
METHOD AND APPARATUS FOR SELECTING PATHS FOR USE IN AT-SPEED TESTING
67
Patent #:
8781792
Issue Dt:
07/15/2014
Application #:
12610291
Filing Dt:
10/31/2009
Publication #:
US20110106497
Pub Dt:
05/05/2011
Title:
Yield Computation and Optimization for Selective Voltage Binning
68
Patent #:
7932134
Issue Dt:
04/26/2011
Application #:
12610563
Filing Dt:
11/02/2009
Publication #:
US20100047972
Pub Dt:
02/25/2010
Title:
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE
69
Patent #:
8614435
Issue Dt:
12/24/2013
Application #:
12611421
Filing Dt:
11/03/2009
Publication #:
US20110101308
Pub Dt:
05/05/2011
Title:
UTILIZATION OF ORGANIC BUFFER LAYER TO FABRICATE HIGH PERFORMANCE CARBON NANOELECTRONIC DEVICES
70
Patent #:
8210741
Issue Dt:
07/03/2012
Application #:
12611519
Filing Dt:
11/03/2009
Publication #:
US20100046574
Pub Dt:
02/25/2010
Title:
APPARATUS FOR THERMAL CHARACTERIZATION UNDER NON-UNIFORM HEAT LOAD
71
Patent #:
8689180
Issue Dt:
04/01/2014
Application #:
12611561
Filing Dt:
11/03/2009
Publication #:
US20110107297
Pub Dt:
05/05/2011
Title:
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Title:
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Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
440 STONE BREAK ROAD EXTENSION
MALTA, NEW YORK 12020
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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