|
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Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08907452
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Filing Dt:
|
08/08/1997
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Title:
|
SEMICONDUCTOR DEVICE WITH SELF-ALIGNED INSULATOR
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|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08908593
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Filing Dt:
|
08/08/1997
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Title:
|
APPARATUS AND METHOD IN A NETWORK SWITCH FOR DYNAMICALLY ALLOCATING BANDWIDTH IN ETHERNET WORKGROUP SWITCHES
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|
|
Patent #:
|
|
Issue Dt:
|
03/21/2000
|
Application #:
|
08909463
|
Filing Dt:
|
08/11/1997
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Title:
|
INTEGRATED CIRCUIT PACKAGE VERIFICATION
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|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
08909911
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Filing Dt:
|
08/12/1997
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Title:
|
MAPPING WORDS, PHRASES USING SEQUENTIAL-PATTERN TO FIND USER SPECIFIC TRENDS IN A TEXT DATABASE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08911174
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Filing Dt:
|
08/14/1997
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Title:
|
COMPUTER SYSTEM BUFFERS FOR PROVIDING CONCURRENCY BETWEEN CPU ACCESSES LOCAL BUS ACCESSES AND MEMORY ACCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08911744
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Filing Dt:
|
08/15/1997
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Title:
|
METHODS OF MAKING AND USING A CHEMICAL-MECHANICAL POLISHING SLURRY THAT REDUCES WAFER DEFECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
08914234
|
Filing Dt:
|
08/19/1997
|
Title:
|
APPARATUS AND METHOD FOR GENERATING A PAUSE FRAME IN A BUFFERED DISTRIBUTOR BASED ON LENGTHS OF DATA PACKETS DISTRIBUTED ACCORDING TO A ROUND ROBIN REPEATER ARBITRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
08914262
|
Filing Dt:
|
08/19/1997
|
Title:
|
CHIP TEMPERATURE MONITOR USING DELAY LINES
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|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08914263
|
Filing Dt:
|
08/19/1997
|
Title:
|
CHIP TEMPERATURE PROTECTION USING DELAY LINES
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|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08914511
|
Filing Dt:
|
08/19/1997
|
Title:
|
APPARATUS AND METHOD FOR AUTOMATICALLY ACCESSING A DYNAMIC RAM FOR SYSTEM MANAGEMENT INTERRUPT HANDLING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
|
Application #:
|
08915555
|
Filing Dt:
|
08/21/1997
|
Title:
|
METHOD OF AND APPARATUS FOR TRANSFERRING AND INTERPRETING A DATA PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
08915556
|
Filing Dt:
|
08/21/1997
|
Title:
|
COMMUNICATION PROCESSING METHOD USING A BUFFER ARRAY AS A VIRTUALLY CIRCULAR BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
08915631
|
Filing Dt:
|
08/21/1997
|
Title:
|
COMPUTER ARCHITECTURE USING PACKET SWITCHES FOR INTERNAL DATA TRANSFER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
08915691
|
Filing Dt:
|
08/21/1997
|
Title:
|
METHOD FOR CHECKING DATA ERRORS IN DATA COMMUNICATION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
08915695
|
Filing Dt:
|
08/21/1997
|
Title:
|
METHOD OF COMMUNICATION FOR A COMPUTER USING PACKET SWITCHES FOR INTERNAL DATA TRANSFER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
08915738
|
Filing Dt:
|
08/21/1997
|
Title:
|
MULTIPLE PROCESSORS IN A ROW FOR PROTOCOL ACCELERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2000
|
Application #:
|
08915766
|
Filing Dt:
|
08/21/1997
|
Title:
|
PC WIRELESS COMMUNICATIONS UTILIZING AN EMBEDDED ANTENNA COMPRISING A PLURALITY OF RADIATING AND RECEIVING ELEMENTS RESPONSIVE TO STEERING CIRCUITRY TO FORM A DIRECT ANTENNA BEAM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08915892
|
Filing Dt:
|
08/21/1997
|
Title:
|
SYSTEM AND METHOD FOR TRANSMITTING DATA UPON AND ADDRESS PORTION OF A COMPUTER SYSTEM BUS DURING PERIODS OF MAXIMUM UTILIZATION OF A DATA PORTION OF THE BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
08915989
|
Filing Dt:
|
08/21/1997
|
Title:
|
METHOD OF CONTROLLING THE SPREAD OF AN ADHESIVE ON A CIRCUITIZED ORGANIC SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
08916894
|
Filing Dt:
|
08/22/1997
|
Title:
|
NEUTRON DETECTING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08918062
|
Filing Dt:
|
08/25/1997
|
Title:
|
SYSTEM FOR ENHANCING THE PERFORMANCE OF A CIRCUIT BY REDUCING THE CHANNEL LENGTH OF ONE OR MORE TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08918202
|
Filing Dt:
|
08/25/1997
|
Title:
|
METHOD OF MAKING AN ASYMMETRICAL IGFET AND PROVIDING A FIELD DIELECTRIC BETWEEN ACTIVE REGIONS OF A SEMICONDUCTOR SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2002
|
Application #:
|
08919101
|
Filing Dt:
|
08/28/1997
|
Title:
|
APPARATUS AND METHOD FOR SELECTIVELY SUPPLYING DATA PACKETS BETWEEN MEDIA DOMAINS IN A NETWORK REPEATER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
08919993
|
Filing Dt:
|
08/28/1997
|
Title:
|
OPTICAL METROLOGY TOOL AND METHOD OF USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
08920182
|
Filing Dt:
|
08/25/1997
|
Title:
|
AN ACTIVE PIXEL SENSOR CELL AND METHOD OF USING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
08921003
|
Filing Dt:
|
08/29/1997
|
Title:
|
ANNEALING OF SILICON OXYNITRIDE AND SILICON NITRIDE FILMS TO ELIMINATE HIGH TEMPERATURE CHARGE LOSS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/1999
|
Application #:
|
08921078
|
Filing Dt:
|
08/29/1997
|
Title:
|
SYSTEM FOR DYNAMICALLY RECONFIGURING SUBBUSSES OF DATA BUS ACCORDING TO SYSTEM NEEDS BASED ON MONITORING EACH OF THE INFORMATION CHANNELS MAKE UP DATA BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08923181
|
Filing Dt:
|
09/04/1997
|
Title:
|
SEMICONDUCTOR FABRICATION EMPLOYING IMPLANTATION OF EXCESS ATOMS AT THE EDGES OF A TRENCH ISOLATION STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
08923184
|
Filing Dt:
|
09/04/1997
|
Title:
|
SEMICONDUCTOR FABRICATION EMPLOYING BARRIER ATOMS INCORPORATED AT THE EDGES OF A TRENCH ISOLATION STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08923492
|
Filing Dt:
|
09/05/1997
|
Title:
|
MEASUREMENT SYSTEM FOR DETECTING CHEMICAL SPECIES WITHIN A SEMICONDUCTOR PROCESSING DEVICE CHAMBER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08924130
|
Filing Dt:
|
09/05/1997
|
Title:
|
IN-SITU DEPOSITION OF STOP LAYER AND DIELECTRIC LAYER DURING FORMATION OF LOCAL INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08924131
|
Filing Dt:
|
09/05/1997
|
Title:
|
BORDERLESS VIAS WITH CVD BARRIER LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08924569
|
Filing Dt:
|
09/05/1997
|
Title:
|
METHODS AND ARRANGEMENTS FOR DETERMINING AN ENDPOINT FOR AN IN-SITU LOCAL INTERCONNECT ETCHING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08924639
|
Filing Dt:
|
09/05/1997
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE CONTAINING SHALLOW LDD JUNCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08926131
|
Filing Dt:
|
09/09/1997
|
Title:
|
BEST CAN DO MATCHING OF ASSETS WITH DEMAND IN MICROELECTRONICS MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08926583
|
Filing Dt:
|
09/04/1997
|
Title:
|
METHOD OF FABRICATING TOPSIDE STRUCTURE OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
08926729
|
Filing Dt:
|
09/10/1997
|
Title:
|
COMPUTER SYSTEM HAVING A MULTIMEDIA BUS AND COMPRISING A CENTRALIZED I/O PROCESSOR WHICH PERFORMS INTELLIGENT BYTE SLICING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08927158
|
Filing Dt:
|
09/11/1997
|
Title:
|
HIERARCHICAL COLUMN SELECT LINE ARCHITECTURE FOR MULTI-BANK DRAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08927160
|
Filing Dt:
|
09/11/1997
|
Title:
|
METHOD OF STRUCTURING A MULTI-BANK DRAM INTO A HIERARCHICAL COLUMN SELECT LINE ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08927337
|
Filing Dt:
|
09/11/1997
|
Title:
|
CONTEXT-DEPENDENT MEMORY-MAPPED REGISTERS FOR TRANSPARENT EXPANSION OF A REGISTER FILE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08927905
|
Filing Dt:
|
09/10/1997
|
Title:
|
SYSTEM AND METHOD FOR TRANSFERRING PERIODIC DATA STREAMS ON A MULTIMEDIA BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
08928308
|
Filing Dt:
|
09/12/1997
|
Title:
|
PHOTORESIST COMPOSITION AND PROCESS FOR ITS USE
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|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08928495
|
Filing Dt:
|
09/12/1997
|
Title:
|
COMPOSITION CONTAINING A POLYMER AND CONDUCTIVE FILLER AND USE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2000
|
Application #:
|
08928607
|
Filing Dt:
|
02/23/1998
|
Title:
|
SELF ALIGNED METHOD FOR DIFFERENTIAL OXIDATION RATE AT SHALLOW TRENCH ISOLATION EDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08928619
|
Filing Dt:
|
09/12/1997
|
Title:
|
RESISTANCE TO GATE DIELECTRIC BREAKDOWN AT THE EDGES OF SHALLOW TRENCH ISOLATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08929197
|
Filing Dt:
|
09/08/1997
|
Title:
|
TRANSISTOR FABRICATION EMPLOYING FORMATION OF SILICIDE ACROSS SOURCE AND DRAIN REGIONS PRIOR TO FORMATION OF THE GATE CONDUCTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2000
|
Application #:
|
08929865
|
Filing Dt:
|
09/15/1997
|
Title:
|
METHOD OF MANUFACTURING AN ISOLATION REGION IN A SEMICONDUCTOR DEVICE USING A FLOWABLE OXIDE-GENERATING MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08931558
|
Filing Dt:
|
09/16/1997
|
Title:
|
WEIGHTED RANDOM PATTERN BUILT-IN SELF-TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08934261
|
Filing Dt:
|
09/19/1997
|
Title:
|
SERIAL BUS FOR TRANSMITTING INTERRUPT INFORMATION IN A MULTIPROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08934509
|
Filing Dt:
|
09/19/1997
|
Title:
|
HIGH PERFORMANCE ASYMMETRICAL MOSFET STRUCTURE AND METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08935531
|
Filing Dt:
|
09/23/1997
|
Title:
|
CACHE STRUCTURE HAVING A REDUCED TAG COMPARISON TO ENABLE DATA TRANSFER FROM SAID CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2001
|
Application #:
|
08936030
|
Filing Dt:
|
09/27/1997
|
Title:
|
OPTICAL COLOR TRACER IDENTIFIER IN METAL PASTE THAT BLEED TO GREENSHEET
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
08936276
|
Filing Dt:
|
09/24/1997
|
Title:
|
CREATION OF AN ETCH HARDMASK BY SPIN-ON TECHNIQUE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08937411
|
Filing Dt:
|
09/25/1997
|
Title:
|
SNAP TOGETHER PCMCIA CARDS WITH LASER TACK WELDED SEAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08937526
|
Filing Dt:
|
09/25/1997
|
Title:
|
FORMATION OF A BOTTLE SHAPED TRENCH
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
08937634
|
Filing Dt:
|
09/25/1997
|
Title:
|
METHOD AND SYSTEM FOR PATTERNING TO ENHANCE PERFORMANCE OF A METAL LAYER OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08937676
|
Filing Dt:
|
09/25/1997
|
Title:
|
FOUR TRANSISTOR SRAM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2000
|
Application #:
|
08937915
|
Filing Dt:
|
09/25/1997
|
Title:
|
METHOD FOR REDUCING ELECTROMIGRATION IN A COPPER INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08938062
|
Filing Dt:
|
09/26/1997
|
Title:
|
REGISTER-BASED REDUNDANCY CIRCUIT AND METHOD FOR BUILT-IN SELF-REPAIR IN A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08938074
|
Filing Dt:
|
09/26/1997
|
Title:
|
SEMICONDUCTOR MEMORY HAVING SPACE-EFFICIENT LAYOUT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08938077
|
Filing Dt:
|
09/26/1997
|
Title:
|
SELF-TIMED DIFFERENTIAL COMPARATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08938196
|
Filing Dt:
|
09/26/1997
|
Title:
|
BUFFER LAYER FOR IMPROVING CONTROL OF LAYER THICKNESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08938205
|
Filing Dt:
|
09/26/1997
|
Title:
|
CROSS CLOCK DOMAIN CLOCKING FOR A SYSTEM USING TWO CLOCK FREQUENCIES WHERE ONE FREQUENCY IS FRACTIONAL MULTIPLE OF THE OTHER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08938392
|
Filing Dt:
|
09/26/1997
|
Title:
|
TEMPERATURE SENSOR INTEGRAL WITH MICROPROCESSOR AND METHODS OF USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08938590
|
Filing Dt:
|
09/26/1997
|
Title:
|
DUAL COMPARATOR CIRCUIT AND METHOD FOR SELECTING BETWEEN NORMAL AND REDUNDANT DECODE LOGIC IN A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08938659
|
Filing Dt:
|
09/26/1997
|
Title:
|
TIMING ANALYSIS METHOD FOR PLLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08938676
|
Filing Dt:
|
09/26/1997
|
Title:
|
METHOD FOR USE IN SIMULATION OF AN SOI DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08938718
|
Filing Dt:
|
09/26/1997
|
Title:
|
MEMORY INTERFACE CIRCUIT INCLUDING BYPASS DATA FORWARDING WITH ESSENTIALLY NO DELAY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08938734
|
Filing Dt:
|
09/26/1997
|
Title:
|
SCANNABLE SENSE AMPLIFIER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
08938754
|
Filing Dt:
|
09/26/1997
|
Title:
|
ELECTRICALLY PROGRAMMABLE ANTI-FUSE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08939016
|
Filing Dt:
|
09/26/1997
|
Title:
|
APPLICATION-SPECIFIC SRAM MEMORY CELL FOR LOW VOLTAGE, HIGH SPEED OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
08939017
|
Filing Dt:
|
09/26/1997
|
Title:
|
INTEGRATED CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08939066
|
Filing Dt:
|
09/29/1997
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A LOW PERMITTIVITY DIELECTRIC LAYER AND CONTAMINATION DUE TO EXPOSURE TO WATER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08940237
|
Filing Dt:
|
09/30/1997
|
Title:
|
REDUCED PARASITIC LEAKAGE IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
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Issue Dt:
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11/16/1999
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Application #:
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08940247
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Filing Dt:
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09/30/1997
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Title:
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METHOD AND SYSTEM FOR PROVIDING AN INTERCONNECT LAYOUT TO REDUCE DELAYS IN LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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08940722
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Filing Dt:
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09/30/1997
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Title:
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MEASUREMENT METHOD FOR LINEWIDTH METROLOGY
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08942453
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Filing Dt:
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10/01/1997
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Title:
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NON-BLOCKING DRAIN METHOD AND APPARATUS USED TO REORGANIZE DATA IN A DATABASE
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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08942998
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Filing Dt:
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10/02/1997
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Title:
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MULTIPLE SPACER FORMATION/REMOVAL TECHNIQUE FOR FORMING A GRADED JUNCTION
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08943469
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Filing Dt:
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10/03/1997
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Title:
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HIGH PERFORMANCE SUPRESCALAR ALIGNMENT UNIT
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Patent #:
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Issue Dt:
|
02/02/1999
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Application #:
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08943658
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Filing Dt:
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10/03/1997
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Title:
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APPARATUS FOR CONVERTING DATA BETWEEN DIFFERENT ENDIAN FORMATS AND SYSTEM AND METHOD EMPLOYING SAME
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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08944377
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Filing Dt:
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10/06/1997
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Title:
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METHOD OF INTEGRATING LDD IMPLANTATION FOR CMOS DEVICE FABRICATION
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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08946041
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Filing Dt:
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10/06/1997
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Title:
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SEMICONDUCTOR DEVICE HAVING A GROUP OF HIGH PERFORMANCE TRANSISTORS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/23/1999
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Application #:
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08947225
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Filing Dt:
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10/08/1997
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Title:
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SUPERSCALAR MICROPROCESSOR WHICH DELAYS UPDATE OF BRANCH PREDICTION INFORMATION IN RESPONSE TO BRANCH MISPREDICTION UNTIL A SUBSEQUENT IDLE CLOCK
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08947283
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Filing Dt:
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10/07/1997
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Title:
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NANO-STRUCTURE MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08947521
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Filing Dt:
|
10/02/1997
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Title:
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MASK GENERATION TECHNIQUE FOR PRODUCING AN INTEGRATED CIRCUIT WITH OPTIMAL POLYSILICON INTERCONNECT LAYOUT FOR ACHIEVING GLOBAL PLANARIZATION
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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08947995
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Filing Dt:
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10/09/1997
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Title:
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BALL GRID ARRAY MODULE
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Patent #:
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|
Issue Dt:
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12/31/2002
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Application #:
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08948210
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Filing Dt:
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10/09/1997
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Title:
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A SYSTEM AND METHOD FOR TRANSFERRING INFORMATION OVER A COMPUTER NETWORK
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Patent #:
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|
Issue Dt:
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02/09/1999
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Application #:
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08948639
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Filing Dt:
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10/10/1997
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Title:
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COMPUTER SYSTEM AND METHOD FOR TRANSFERRING COMMANDS AND DATA TO A DEDICATED MULTIMEDIA ENGINE
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08949889
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Filing Dt:
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10/14/1997
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Title:
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SEMICONDUCTOR FABRICATION EMPLOYING A TRANSISTOR GATE COUPLED TO A LOCALIZED SUBSTRATE
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Patent #:
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|
Issue Dt:
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12/26/2000
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Application #:
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08949897
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Filing Dt:
|
10/14/1997
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Title:
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TRACE CACHE FOR A MICROPROCESSOR-BASED DEVICE
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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08950513
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Filing Dt:
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10/22/1997
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Title:
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DATA TRANSFER WITH HIGHLY GRANULAR CACHEABILITY CONTROL BETWEEN MEMORY AND A SCRATCHPAD AREA
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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08950691
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Filing Dt:
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10/15/1997
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Title:
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CHIP CRACK STOP
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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08950717
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Filing Dt:
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10/15/1997
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Title:
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METHOD FOR MAKING TRANSISTOR HAVING REDUCED SERIES RESISTANCE AND METHOD FOR PRODUCING THE SAME
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Patent #:
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Issue Dt:
|
02/02/1999
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Application #:
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08951592
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Filing Dt:
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10/16/1997
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Title:
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BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED METAL LAYERS
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08951827
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Filing Dt:
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10/16/1997
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Title:
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BULK AND STRAINED SILICON ON INSULATOR USING LOCAL SELECTIVE OXIDATION
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Patent #:
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Issue Dt:
|
08/03/1999
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Application #:
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08955287
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Filing Dt:
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10/21/1997
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Title:
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FLOATING POINT NAN COMPARISON
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Patent #:
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Issue Dt:
|
07/17/2001
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Application #:
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08955327
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Filing Dt:
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10/20/1997
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Title:
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PC PARALLEL PORT STRUCTURE PARTITIONED BETWEEN TWO INTEGRATED CIRCUITS INTERCONNECTED BY A SERIAL BUS
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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08956825
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Filing Dt:
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10/23/1997
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Title:
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PIECE-WISE PROCESSING OF VERY LARGE SEMICONDUCTOR DESIGNS
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Patent #:
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Issue Dt:
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06/01/1999
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Application #:
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08957085
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Filing Dt:
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10/24/1997
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Title:
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MULTI-CHIP SUPERSCALAR MICROPROCESSOR MODULE
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|
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Patent #:
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Issue Dt:
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01/12/1999
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Application #:
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08957090
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Filing Dt:
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10/24/1997
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Title:
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SEMICONDUCTOR FABRICATION EMPLOYING SELF-ALIGNED SIDEWALL SPACERS LATERALLY ADJACENT TO A TRANSISTOR GATE
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