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Reel/Frame:058002/0470   Pages: 437
Recorded: 11/03/2020
Attorney Dkt #:127110/12
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST.
Total properties: 4704
Page 21 of 48
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1
Patent #:
Issue Dt:
08/30/2005
Application #:
10676612
Filing Dt:
10/01/2003
Title:
ORGANIC MEMORY CELL FORMATION ON AG SUBSTRATE
2
Patent #:
Issue Dt:
12/27/2005
Application #:
10677031
Filing Dt:
10/01/2003
Title:
MEMORY DEVICE AND METHOD
3
Patent #:
Issue Dt:
02/08/2005
Application #:
10677042
Filing Dt:
10/01/2003
Title:
SELF ASSEMBLY OF CONDUCTING POLYMER FOR FORMATION OF POLYMER MEMORY CELL
4
Patent #:
Issue Dt:
12/06/2005
Application #:
10677073
Filing Dt:
10/01/2003
Title:
MEMORY DEVICE AND METHOD
5
Patent #:
Issue Dt:
11/22/2005
Application #:
10677790
Filing Dt:
10/02/2003
Publication #:
Pub Dt:
04/07/2005
Title:
MEMORY DEVICE AND METHOD USING POSITIVE GATE STRESS TO RECOVER OVERERASED CELL
6
Patent #:
Issue Dt:
05/24/2005
Application #:
10678446
Filing Dt:
10/03/2003
Title:
EFFICIENT AND ACCURATE SENSING CIRCUIT AND TECHNIQUE FOR LOW VOLTAGE FLASH MEMORY DEVICES
7
Patent #:
Issue Dt:
11/08/2005
Application #:
10679179
Filing Dt:
10/03/2003
Title:
CIRCUIT AND TECHNIQUE FOR ACCURATELY SENSING LOW VOLTAGE FLASH MEMORY DEVICES
8
Patent #:
Issue Dt:
10/25/2005
Application #:
10679774
Filing Dt:
10/06/2003
Title:
FLASH MEMORY DEVICE AND METHOD OF FABRICATION THEREOF INCLUDING A BOTTOM OXIDE LAYER WITH TWO REGIONS WITH DIFFERENT CONCENTRATIONS OF NITROGEN
9
Patent #:
Issue Dt:
05/10/2005
Application #:
10681306
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/22/2004
Title:
CURRENT PULSE RECEIVING CIRCUIT
10
Patent #:
Issue Dt:
11/08/2005
Application #:
10683631
Filing Dt:
10/10/2003
Title:
RECESSED CHANNEL
11
Patent #:
Issue Dt:
11/15/2005
Application #:
10683649
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/14/2005
Title:
RECESS CHANNEL FLASH ARCHITECTURE FOR REDUCED SHORT CHANNEL EFFECT
12
Patent #:
Issue Dt:
06/07/2005
Application #:
10684890
Filing Dt:
10/14/2003
Title:
NON VOLATILE CHARGE TRAPPING DIELECTRIC MEMORY CELL STRUCTURE WITH GATE HOLE INJECTION ERASE
13
Patent #:
Issue Dt:
06/28/2005
Application #:
10685044
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
04/14/2005
Title:
MEMORY CELL ARRAY WITH STAGGERED LOCAL INTER-CONNECT STRUCTURE
14
Patent #:
Issue Dt:
06/21/2005
Application #:
10696234
Filing Dt:
10/28/2003
Title:
METHOD FOR FORMING A DIELECTRIC SPACER IN A NON-VOLATILE MEMORY DEVICE
15
Patent #:
Issue Dt:
06/06/2006
Application #:
10699155
Filing Dt:
10/31/2003
Title:
MAGNETIC MEMORY ARRAY CONFIGURATION
16
Patent #:
Issue Dt:
03/21/2006
Application #:
10699903
Filing Dt:
11/03/2003
Publication #:
Pub Dt:
05/05/2005
Title:
SIDEWALL FORMATION FOR HIGH DENSITY POLYMER MEMORY ELEMENT ARRAY
17
Patent #:
Issue Dt:
10/18/2005
Application #:
10700021
Filing Dt:
11/03/2003
Title:
MEMORY ELEMENT FORMATION WITH PHOTOSENSITIVE POLYMER DIELECTRIC
18
Patent #:
Issue Dt:
07/12/2005
Application #:
10700454
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
05/27/2004
Title:
FREQUENCY MEASUREMENT CIRCUIT
19
Patent #:
Issue Dt:
03/22/2005
Application #:
10701780
Filing Dt:
11/05/2003
Title:
METHOD AND STRUCTURE FOR PROTECTING NROM DEVICES FROM INDUCED CHARGE DAMAGE DURING DEVICE FABRICATION
20
Patent #:
Issue Dt:
11/29/2005
Application #:
10703860
Filing Dt:
11/07/2003
Title:
METHOD AND SYSTEM FOR TESTING ARTICLES OF MANUFACTURE
21
Patent #:
Issue Dt:
03/13/2007
Application #:
10705881
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
05/20/2004
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
22
Patent #:
Issue Dt:
09/06/2005
Application #:
10706664
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/10/2004
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
23
Patent #:
Issue Dt:
11/22/2005
Application #:
10708379
Filing Dt:
02/27/2004
Publication #:
Pub Dt:
09/01/2005
Title:
METHOD AND APPARATUS FOR IMPROVING CYCLE TIME IN A QUAD DATA RATE SRAM DEVICE
24
Patent #:
Issue Dt:
08/23/2005
Application #:
10716209
Filing Dt:
11/18/2003
Title:
TIGHTLY SPACED GATE FORMATION THROUGH DAMASCENE PROCESS
25
Patent #:
Issue Dt:
05/17/2005
Application #:
10716230
Filing Dt:
11/18/2003
Title:
DUAL CELL MEMORY DEVICE HAVING A TOP DIELECTRIC STACK
26
Patent #:
Issue Dt:
09/27/2005
Application #:
10717622
Filing Dt:
11/21/2003
Publication #:
Pub Dt:
05/27/2004
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE STORING TWO-BIT INFORMATION
27
Patent #:
Issue Dt:
01/24/2006
Application #:
10718707
Filing Dt:
11/24/2003
Title:
METHODS FOR FORMING NITROGEN-RICH REGIONS IN NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
28
Patent #:
Issue Dt:
02/13/2007
Application #:
10719108
Filing Dt:
11/21/2003
Publication #:
Pub Dt:
05/26/2005
Title:
IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
29
Patent #:
Issue Dt:
09/27/2005
Application #:
10721643
Filing Dt:
11/24/2003
Title:
READING FLASH MEMORY
30
Patent #:
Issue Dt:
08/23/2005
Application #:
10726508
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/09/2005
Title:
FLASH MEMORY DEVICE
31
Patent #:
Issue Dt:
01/03/2006
Application #:
10726829
Filing Dt:
12/03/2003
Title:
POST CMP PRECURSOR TREATMENT
32
Patent #:
Issue Dt:
03/14/2006
Application #:
10726868
Filing Dt:
12/03/2003
Title:
DIELECTRIC PATTERN FORMATION FOR ORGANIC ELECTRONIC DEVICES
33
Patent #:
Issue Dt:
01/11/2005
Application #:
10728510
Filing Dt:
12/05/2003
Title:
NEUTRON DETECTING DEVICE
34
Patent #:
Issue Dt:
11/08/2005
Application #:
10729732
Filing Dt:
12/05/2003
Title:
HARD MASK SPACER FOR SUBLITHOGRAPHIC BITLINE
35
Patent #:
Issue Dt:
09/27/2005
Application #:
10731494
Filing Dt:
12/09/2003
Title:
PROCESS FOR FABRICATION OF SPACER LAYER WITH REDUCED HYDROGEN CONTENT IN SEMICONDUCTOR DEVICE
36
Patent #:
Issue Dt:
10/18/2005
Application #:
10731659
Filing Dt:
12/09/2003
Title:
PROCESS FOR FABRICATION OF NITRIDE LAYER WITH REDUCED HYDROGEN CONTENT IN ONO STRUCTURE IN SEMICONDUCTOR DEVICE
37
Patent #:
Issue Dt:
10/30/2007
Application #:
10738322
Filing Dt:
12/16/2003
Title:
FLASH MEMORY WITH BURIED BIT LINES
38
Patent #:
Issue Dt:
12/21/2004
Application #:
10739674
Filing Dt:
12/18/2003
Title:
METHOD TO ELIMINATE INVERSE NARROW WIDTH EFFECT IN SMALL GEOMETRY MOS TRANSISTORS
39
Patent #:
Issue Dt:
05/09/2006
Application #:
10740205
Filing Dt:
12/18/2003
Title:
SONOS STRUCTURE INCLUDING A DEUTERATED OXIDE-SILICON INTERFACE AND METHOD FOR MAKING THE SAME
40
Patent #:
Issue Dt:
02/08/2005
Application #:
10742179
Filing Dt:
12/19/2003
Title:
MUTIPORT ARBITRATION USING PHASED LOCKING ARBITERS
41
Patent #:
Issue Dt:
12/13/2005
Application #:
10743188
Filing Dt:
12/23/2003
Publication #:
Pub Dt:
07/15/2004
Title:
SPREAD SPECTRUM CLOCK GENERATION CIRCUIT, JITTER GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE
42
Patent #:
Issue Dt:
07/25/2006
Application #:
10745725
Filing Dt:
12/24/2003
Title:
NON-VOLATILE LATCH WITH MAGNETIC JUNCTIONS
43
Patent #:
Issue Dt:
11/29/2005
Application #:
10747692
Filing Dt:
12/30/2003
Publication #:
Pub Dt:
09/16/2004
Title:
SEMICONDUCTOR MEMORY
44
Patent #:
Issue Dt:
03/29/2005
Application #:
10755430
Filing Dt:
01/12/2004
Title:
NARROW BITLINE USING SAFIER FOR MIRRORBIT
45
Patent #:
Issue Dt:
10/25/2005
Application #:
10755740
Filing Dt:
01/12/2004
Publication #:
Pub Dt:
07/14/2005
Title:
POCKET IMPLANT FOR COMPLEMENTARY BIT DISTURB IMPROVEMENT AND CHARGING IMPROVEMENT OF SONOS MEMORY CELL
46
Patent #:
Issue Dt:
04/04/2006
Application #:
10755979
Filing Dt:
01/12/2004
Title:
SUBSTRATE BIAS FOR PROGRAMMING NON-VOLATILE MEMORY
47
Patent #:
Issue Dt:
03/14/2006
Application #:
10756573
Filing Dt:
01/12/2004
Title:
HIGH VOLTAGE TRANSISTOR SCALING TILT ION IMPLANT METHOD
48
Patent #:
Issue Dt:
05/01/2007
Application #:
10756585
Filing Dt:
01/12/2004
Title:
METHOD AND STRUCTURE FOR CONTROLLING FLOATING BODY EFFECTS
49
Patent #:
Issue Dt:
03/28/2006
Application #:
10758173
Filing Dt:
01/14/2004
Title:
ELECTROSTATIC DISCHARGE PERFORMANCE OF A SILICON STRUCTURE AND EFFICIENT USE OF AREA WITH ELECTROSTATIC DISCHARGE PROTECTIVE DEVICE UNDER THE PAD APPROACH AND ADJUSTMENT OF VIA CONFIGURATION THERETO TO CONTROL DRAIN JUNCTION RESISTANCE
50
Patent #:
Issue Dt:
11/30/2004
Application #:
10759809
Filing Dt:
01/16/2004
Title:
STRUCTURE FOR INCREASING DRIVE CURRENT IN A MEMORY ARRAY AND RELATED METHOD
51
Patent #:
Issue Dt:
04/11/2006
Application #:
10759855
Filing Dt:
01/16/2004
Title:
FLEXIBLE CASCODE AMPLIFIER CIRCUIT WITH HIGH GAIN FOR FLASH MEMORY CELLS
52
Patent #:
Issue Dt:
11/16/2004
Application #:
10762071
Filing Dt:
01/20/2004
Title:
METHOD FOR ERASING A MEMORY SECTOR IN VIRTUAL GROUND ARCHITECTURE WITH REDUCED LEAKAGE CURRENT
53
Patent #:
Issue Dt:
11/27/2007
Application #:
10762445
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
07/28/2005
Title:
STRUCTURE AND METHOD FOR LOW VSS RESISTANCE AND REDUCED DIBL IN A FLOATING GATE MEMORY CELL
54
Patent #:
Issue Dt:
02/27/2007
Application #:
10765072
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
09/23/2004
Title:
DUAL DAMASCENE STRUCTURE AND METHOD OF MAKING
55
Patent #:
Issue Dt:
01/17/2006
Application #:
10768188
Filing Dt:
02/02/2004
Publication #:
Pub Dt:
11/04/2004
Title:
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
56
Patent #:
Issue Dt:
10/25/2005
Application #:
10770010
Filing Dt:
02/03/2004
Title:
NON -VOLATILE MEMORY DEVICE
57
Patent #:
Issue Dt:
03/28/2006
Application #:
10770245
Filing Dt:
02/02/2004
Title:
DISPOSABLE HARD MASK FOR MEMORY BITLINE SCALING
58
Patent #:
Issue Dt:
01/24/2006
Application #:
10770260
Filing Dt:
02/02/2004
Title:
FLASH MEMORY CELL WITH UV PROTECTIVE LAYER
59
Patent #:
Issue Dt:
08/09/2005
Application #:
10770673
Filing Dt:
02/02/2004
Title:
BITLINE HARD MASK SPACER FLOW FOR MEMORY CELL SCALING
60
Patent #:
Issue Dt:
08/01/2006
Application #:
10773816
Filing Dt:
02/06/2004
Title:
VARIABLE IMPEDANCE OUTPUT DRIVER
61
Patent #:
Issue Dt:
06/15/2010
Application #:
10773948
Filing Dt:
02/06/2004
Title:
DEVICE THAT PROVIDES THE FUNCTIONALITY OF DUAL-PORTED MEMORY USING SINGLE-PORTED MEMORY FOR MULTIPLE CLOCK DOMAINS
62
Patent #:
Issue Dt:
06/19/2007
Application #:
10774180
Filing Dt:
02/06/2004
Title:
WIDE FREQUENCY RANGE DLL WITH DYNAMICALLY DETERMINED VCDL/VCO OPERATIONAL STATES
63
Patent #:
Issue Dt:
06/01/2010
Application #:
10775668
Filing Dt:
02/09/2004
Publication #:
Pub Dt:
08/11/2005
Title:
ENCODING SCHEME FOR DATA TRANSFER
64
Patent #:
Issue Dt:
05/30/2006
Application #:
10778504
Filing Dt:
02/13/2004
Title:
METHOD AND CIRCUIT FOR HIGH SPEED TRANSMISSION GATE LOGIC
65
Patent #:
Issue Dt:
09/26/2006
Application #:
10784566
Filing Dt:
02/23/2004
Title:
ADVANCED PROBE CARD AND METHOD OF FABRICATING SAME
66
Patent #:
Issue Dt:
11/29/2005
Application #:
10785599
Filing Dt:
02/24/2004
Title:
POWER SUPPLY DETECTING INPUT RECEIVER CIRCUIT AND METHOD
67
Patent #:
Issue Dt:
03/13/2007
Application #:
10786204
Filing Dt:
02/24/2004
Title:
OVER-VOLTAGE TOLERANT INPUT BUFFER HAVING HOT-PLUG CAPABILITY
68
Patent #:
Issue Dt:
04/03/2007
Application #:
10786440
Filing Dt:
02/25/2004
Publication #:
Pub Dt:
09/09/2004
Title:
MAGNETIC MEMORY CELL JUNCTION AND METHOD FOR FORMING A MAGNETIC MEMORY CELL JUNCTION
69
Patent #:
Issue Dt:
11/18/2008
Application #:
10790016
Filing Dt:
03/02/2004
Publication #:
Pub Dt:
04/14/2005
Title:
MICROCONTROLLER HAVING A SYSTEM RESOURCE PRESCALER THEREON
70
Patent #:
Issue Dt:
08/07/2007
Application #:
10791417
Filing Dt:
03/02/2004
Title:
TESTING FOR OPERATING LIFE OF A MEMORY DEVICE WITH ADDRESS CYCLING USING A GRAY CODE SEQUENCE
71
Patent #:
Issue Dt:
09/26/2006
Application #:
10791657
Filing Dt:
03/02/2004
Title:
GATE ETCH PROCESS
72
Patent #:
Issue Dt:
07/04/2006
Application #:
10792810
Filing Dt:
03/05/2004
Publication #:
Pub Dt:
03/17/2005
Title:
BAND DISTRIBUTION INSPECTING DEVICE AND BAND DISTRIBUTION INSPECTING METHOD
73
Patent #:
Issue Dt:
04/11/2006
Application #:
10795890
Filing Dt:
03/08/2004
Title:
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
74
Patent #:
Issue Dt:
02/14/2006
Application #:
10795924
Filing Dt:
03/08/2004
Title:
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
75
Patent #:
Issue Dt:
03/14/2006
Application #:
10796005
Filing Dt:
03/10/2004
Publication #:
Pub Dt:
04/21/2005
Title:
CLOCK SHIFT CIRCUIT FOR GRADUAL FREQUENCY CHANGE
76
Patent #:
Issue Dt:
07/01/2008
Application #:
10796859
Filing Dt:
03/08/2004
Title:
CIRCUIT AND METHOD FOR IMPLEMENTING A LOW SUPPLY VOLTAGE CURRENT REFERENCE
77
Patent #:
Issue Dt:
01/09/2007
Application #:
10796872
Filing Dt:
03/08/2004
Title:
UNIVERSAL SERIAL BUS INTERFACE TO MASS STORAGE DEVICE
78
Patent #:
Issue Dt:
09/19/2006
Application #:
10796873
Filing Dt:
03/08/2004
Title:
PHASE LOCKED LOOP OPERABLE OVER A WIDE FREQUENCY RANGE
79
Patent #:
Issue Dt:
02/06/2007
Application #:
10797147
Filing Dt:
03/10/2004
Title:
SIGNAL TRANSMISSION AMPLIFIER CIRCUIT
80
Patent #:
Issue Dt:
02/13/2007
Application #:
10798657
Filing Dt:
03/11/2004
Title:
LOW DUTY CYCLE DISTORTION DIFFERENTIAL TO CMOS TRANSLATOR
81
Patent #:
Issue Dt:
09/04/2007
Application #:
10799413
Filing Dt:
03/12/2004
Title:
AVOIDING FIELD OXIDE GOUGING IN SHALLOW TRENCH ISOLATION (STI) REGIONS
82
Patent #:
Issue Dt:
01/02/2007
Application #:
10801432
Filing Dt:
03/16/2004
Title:
SYSTEM FOR READ PATH ACCELERATION
83
Patent #:
Issue Dt:
01/05/2010
Application #:
10802977
Filing Dt:
03/16/2004
Title:
DELAY INVERSELY PROPORTIONAL TO TEMPERATURE TIMER CIRCUIT
84
Patent #:
Issue Dt:
12/12/2006
Application #:
10803011
Filing Dt:
03/17/2004
Publication #:
Pub Dt:
09/22/2005
Title:
LATCH CIRCUIT AND METHOD FOR WRITING AND READING VOLATILE AND NON-VOLATILE DATA TO AND FROM THE LATCH
85
Patent #:
Issue Dt:
05/22/2007
Application #:
10803030
Filing Dt:
03/16/2004
Title:
PROGRAMMABLE MICROCONTROLLER ARCHITECTURE (MIXED ANALOG/DIGITAL)
86
Patent #:
Issue Dt:
03/28/2006
Application #:
10804988
Filing Dt:
03/18/2004
Title:
DELAY CIRCUIT THAT SCALES WITH CLOCK CYCLE TIME
87
Patent #:
Issue Dt:
03/28/2006
Application #:
10806150
Filing Dt:
03/23/2004
Publication #:
Pub Dt:
02/10/2005
Title:
DC/DC CONVERTER
88
Patent #:
Issue Dt:
04/25/2006
Application #:
10807909
Filing Dt:
03/24/2004
Title:
PROTECTION OF INTEGRATED CIRCUIT GATES DURING METALLIZATION PROCESSES
89
Patent #:
Issue Dt:
04/25/2006
Application #:
10808532
Filing Dt:
03/25/2004
Publication #:
Pub Dt:
04/28/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT USING BAND-GAP REFERENCE CIRCUIT
90
Patent #:
Issue Dt:
03/28/2006
Application #:
10808883
Filing Dt:
03/24/2004
Title:
METHOD AND CIRCUIT FOR ADJUSTING A REFERENCE VOLTAGE SIGNAL
91
Patent #:
Issue Dt:
10/16/2007
Application #:
10809134
Filing Dt:
03/24/2004
Title:
MAGNETIC MEMORY ARRAY ARCHITECTURE
92
Patent #:
Issue Dt:
04/18/2006
Application #:
10809238
Filing Dt:
03/24/2004
Title:
RAIL-TO-RAIL INPUT LINEAR VOLTAGE TO CURRENT CONVERTER
93
Patent #:
Issue Dt:
02/28/2006
Application #:
10810038
Filing Dt:
03/26/2004
Title:
MEMORY DEVICE WITH INCREASED DATA THROUGHPUT
94
Patent #:
Issue Dt:
11/04/2008
Application #:
10811361
Filing Dt:
03/25/2004
Title:
SELF-CORRELATING PSEUDO-NOISE PAIRING
95
Patent #:
Issue Dt:
07/25/2006
Application #:
10811431
Filing Dt:
03/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
OPERATIONAL AMPLIFIER, LINE DRIVER, AND LIQUID CRYSTAL DISPLAY DEVICE
96
Patent #:
Issue Dt:
06/27/2006
Application #:
10812703
Filing Dt:
03/30/2004
Title:
RECESSED CHANNEL WITH SEPARATED ONO MEMORY DEVICE
97
Patent #:
Issue Dt:
06/27/2006
Application #:
10815057
Filing Dt:
03/30/2004
Title:
LVDS OUTPUT DRIVER HAVING LOW SUPPLY VOLTAGE CAPABILITY
98
Patent #:
Issue Dt:
03/03/2009
Application #:
10817186
Filing Dt:
04/02/2004
Title:
USING ORGANIC SEMICONDUCTOR MEMORY IN CONJUNCTION WITH A MEMS ACTUATOR FOR AN ULTRA HIGH DENSITY MEMORY
99
Patent #:
Issue Dt:
10/27/2009
Application #:
10817467
Filing Dt:
04/02/2004
Publication #:
Pub Dt:
10/13/2005
Title:
POLYMER DIELECTRICS FOR MEMORY ELEMENT ARRAY INTERCONNECT
100
Patent #:
Issue Dt:
03/28/2006
Application #:
10818112
Filing Dt:
04/05/2004
Publication #:
Pub Dt:
09/30/2004
Title:
UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
Assignors
1
Exec Dt:
03/12/2015
2
Exec Dt:
03/12/2015
Assignee
1
1585 BROADWAY
NEW YORK, NEW YORK 10036
Correspondence name and address
SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
ONE MANHATTAN WEST
MONIQUE L. RIBANDO
NEW YORK, NY 10001-8602

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