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Reel/Frame:058002/0470   Pages: 437
Recorded: 11/03/2020
Attorney Dkt #:127110/12
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST.
Total properties: 4704
Page 23 of 48
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1
Patent #:
Issue Dt:
07/06/2010
Application #:
10911840
Filing Dt:
08/04/2004
Title:
ADAPTIVE USB MASS STORAGE DEVICES THAT REDUCE POWER CONSUMPTION
2
Patent #:
Issue Dt:
01/30/2007
Application #:
10915771
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
MEMORY CELL WITH REDUCED DIBL AND VSS RESISTANCE
3
Patent #:
Issue Dt:
03/24/2009
Application #:
10916167
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
METHOD OF FORMING NARROWLY SPACED FLASH MEMORY CONTACT OPENINGS AND LITHOGRAPHY MASKS
4
Patent #:
Issue Dt:
01/02/2007
Application #:
10917562
Filing Dt:
08/13/2004
Title:
USING THIN UNDOPED TEOS WITH BPTEOS ILD OR BPTEOS ILD ALONE TO IMPROVE CHARGE LOSS AND CONTACT RESISTANCE IN MULTI BIT MEMORY DEVICES
5
Patent #:
Issue Dt:
12/20/2005
Application #:
10919119
Filing Dt:
08/16/2004
Title:
TEST STRUCTURE FOR CHARACTERIZING JUNCTION LEAKAGE CURRENT
6
Patent #:
Issue Dt:
04/03/2007
Application #:
10919572
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
POLYMER MEMORY DEVICE WITH VARIABLE PERIOD OF RETENTION TIME
7
Patent #:
Issue Dt:
03/25/2008
Application #:
10919665
Filing Dt:
08/16/2004
Title:
METHOD AND AN APPARATUS TO IMPROVE PRODUCTION YIELD OF PHASE LOCKED LOOPS
8
Patent #:
Issue Dt:
10/30/2007
Application #:
10919846
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
SYSTEMS AND METHODS FOR ADJUSTING PROGRAMMING THRESHOLDS OF POLYMER MEMORY CELLS
9
Patent #:
Issue Dt:
10/17/2006
Application #:
10919872
Filing Dt:
08/17/2004
Title:
METHOD TO IMPROVE YIELD AND SIMPLIFY OPERATION OF POLYMER MEMORY CELLS
10
Patent #:
Issue Dt:
12/19/2006
Application #:
10923409
Filing Dt:
08/20/2004
Title:
METHOD AND AN APPARATUS TO BIAS A CHARGE PUMP IN A PHASE LOCKED LOOP TO COMPENSATE A VCO GAIN
11
Patent #:
Issue Dt:
02/09/2010
Application #:
10927365
Filing Dt:
08/26/2004
Title:
METHOD OF REDUCING STEP HEIGHT DIFFERENCE BETWEEN DOPED REGIONS OF FIELD OXIDE IN AN INTEGRATED CIRCUIT
12
Patent #:
Issue Dt:
03/27/2007
Application #:
10927583
Filing Dt:
08/26/2004
Title:
MEMORY ARRAY WITH CURRENT LIMITING DEVICE FOR PREVENTING PARTICLE INDUCED LATCH-UP
13
Patent #:
Issue Dt:
04/08/2014
Application #:
10927692
Filing Dt:
08/27/2004
Title:
MEMORY DEVICES CONTAINING A HIGH-K DIELECTRIC LAYER
14
Patent #:
Issue Dt:
02/27/2007
Application #:
10927979
Filing Dt:
08/27/2004
Title:
LOW-VOLTAGE, LOW STATIC PHASE OFFSET DIFFERENTIAL CHARGE PUMP
15
Patent #:
Issue Dt:
12/19/2006
Application #:
10928582
Filing Dt:
08/27/2004
Title:
SONOS MEMORY WITH INVERSION BIT-LINES
16
Patent #:
Issue Dt:
12/02/2008
Application #:
10930856
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT FOR DRIVING LIQUID CRYSTAL PANEL
17
Patent #:
Issue Dt:
08/26/2008
Application #:
10933183
Filing Dt:
09/01/2004
Title:
DIFFERENTIAL ENERGY DIFFERENCE INTEGRATOR
18
Patent #:
Issue Dt:
09/05/2006
Application #:
10933588
Filing Dt:
09/03/2004
Title:
SYSTEM AND METHOD FOR MULTI-BIT FLASH READS USING DUAL DYNAMIC REFERENCES
19
Patent #:
Issue Dt:
04/10/2007
Application #:
10934290
Filing Dt:
09/03/2004
Title:
CIRCUIT FOR TEMPERATURE AND BETA COMPENSATION
20
Patent #:
Issue Dt:
08/11/2009
Application #:
10934828
Filing Dt:
09/02/2004
Title:
SEMICONDUCTOR FORMATION METHOD THAT UTILIZES MULTIPLE ETCH STOP LAYERS
21
Patent #:
Issue Dt:
04/22/2008
Application #:
10934923
Filing Dt:
09/02/2004
Title:
SEMICONDUCTOR CONTACT AND NITRIDE SPACER FORMATION SYSTEM AND METHOD
22
Patent #:
Issue Dt:
09/11/2007
Application #:
10936275
Filing Dt:
09/08/2004
Title:
METHOD FOR REDUCING SOFT ERROR RATES OF MEMORY CELLS
23
Patent #:
Issue Dt:
11/27/2007
Application #:
10939513
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
10/13/2005
Title:
VOLTAGE CONTROLLED OSCILLATOR AND PLL CIRCUIT
24
Patent #:
Issue Dt:
10/31/2006
Application #:
10939773
Filing Dt:
09/13/2004
Title:
METHOD AND STRUCTURE OF MEMORY ELEMENT PLUG WITH CONDUCTIVE TA REMOVED FROM SIDEWALL AT REGION OF MEMORY ELEMENT FILM
25
Patent #:
Issue Dt:
11/14/2006
Application #:
10939775
Filing Dt:
09/13/2004
Title:
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE
26
Patent #:
Issue Dt:
12/12/2006
Application #:
10939897
Filing Dt:
09/13/2004
Title:
METHOD OF FORMING COPPER SULFIDE LAYER OVER SUBSTRATE
27
Patent #:
Issue Dt:
04/10/2007
Application #:
10940161
Filing Dt:
09/13/2004
Title:
VOLTAGE TOLERANT INPUT BUFFER
28
Patent #:
Issue Dt:
04/03/2007
Application #:
10940184
Filing Dt:
09/14/2004
Title:
HIGH PSRR, HIGH ACCURACY, LOW POWER SUPPLY BANDGAP CIRCUIT
29
Patent #:
Issue Dt:
09/04/2007
Application #:
10940475
Filing Dt:
09/14/2004
Title:
METAL PROFILE FOR INCREASED LOCAL MAGNETIC FIELDS IN MRAM DEVICES AND METHOD FOR MAKING THE SAME
30
Patent #:
Issue Dt:
05/08/2007
Application #:
10941753
Filing Dt:
09/15/2004
Title:
LOW VOLTAGE LOGIC CIRCUIT WITH SET AND/OR RESET FUNCTIONALITY
31
Patent #:
Issue Dt:
10/10/2006
Application #:
10942127
Filing Dt:
09/16/2004
Publication #:
Pub Dt:
11/17/2005
Title:
CAPACITANCE DIFFERENCE DETECTING CIRCUIT AND MEMS SENSOR
32
Patent #:
Issue Dt:
08/08/2006
Application #:
10942523
Filing Dt:
09/15/2004
Title:
METHOD AND CIRCUIT FOR PROVIDING A SYSTEM LEVEL RESET FUNCTION FOR AN ELECTRONIC DEVICE
33
Patent #:
Issue Dt:
07/17/2007
Application #:
10943367
Filing Dt:
09/17/2004
Title:
APPARATUS AND METHOD FOR HEADROOM COMPENSATION USING DYNAMIC TRANSCONDUCTANCE ENHANCEMENT
34
Patent #:
Issue Dt:
05/01/2007
Application #:
10943611
Filing Dt:
09/17/2004
Title:
MIXED SIGNAL METHOD AND SYSTEM FOR TUNING A VOLTAGE CONTROLLED OSCILLATOR
35
Patent #:
Issue Dt:
10/17/2006
Application #:
10945709
Filing Dt:
09/20/2004
Title:
METHOD AND AN APPARATUS TO DETECT LOW VOLTAGE
36
Patent #:
Issue Dt:
07/18/2006
Application #:
10945914
Filing Dt:
09/22/2004
Title:
METHODS AND SYSTEMS FOR REDUCING ERASE TIMES IN FLASH MEMORY DEVICES
37
Patent #:
Issue Dt:
05/02/2006
Application #:
10946809
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/23/2006
Title:
READ APPROACH FOR MULTI-LEVEL VIRTUAL GROUND MEMORY
38
Patent #:
Issue Dt:
08/19/2008
Application #:
10946812
Filing Dt:
09/22/2004
Title:
PAGE_ EXE ERASE ALGORITHM FOR FLASH MEMORY
39
Patent #:
Issue Dt:
10/10/2006
Application #:
10947518
Filing Dt:
09/22/2004
Title:
FREQUENCY SYNTHESIZER HAVING A MORE VERSATILE AND EFFICIENT FRACTIONAL-N CONTROL CIRCUIT AND METHOD USING VECTOR VALUES
40
Patent #:
Issue Dt:
10/24/2006
Application #:
10947519
Filing Dt:
09/22/2004
Title:
FREQUENCY SYNTHESIZER HAVING A MORE VERSATILE AND EFFICIENT FRACTIONAL-N CONTROL CIRCUIT AND METHOD
41
Patent #:
Issue Dt:
12/12/2006
Application #:
10947538
Filing Dt:
09/23/2004
Publication #:
Pub Dt:
08/25/2005
Title:
SEMICONDUCTOR DEVICE AND MICROCONTROLLER
42
Patent #:
Issue Dt:
01/29/2008
Application #:
10947563
Filing Dt:
09/22/2004
Title:
METHOD OF SELECTIVE TUNGSTEN DEPOSITION ON A SILICON SURFACE
43
Patent #:
Issue Dt:
09/26/2006
Application #:
10948006
Filing Dt:
09/22/2004
Title:
MULTI-PORT MEMORY CELL AND ACCESS METHOD
44
Patent #:
Issue Dt:
02/13/2007
Application #:
10948524
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
10/27/2005
Title:
LEVEL CONVERSION CIRCUIT
45
Patent #:
Issue Dt:
03/14/2006
Application #:
10948644
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
09/29/2005
Title:
SWITCHING REGULATOR CONTROL CIRCUIT, SWITCHING REGULATOR AND SWITCHING REGULATOR CONTROL METHOD
46
Patent #:
Issue Dt:
04/20/2010
Application #:
10949093
Filing Dt:
09/23/2004
Title:
MAPPING OF NON-ISOCHRONOUS AND ISOCHRONOUS CHANNELS
47
Patent #:
Issue Dt:
05/22/2007
Application #:
10949176
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
04/06/2006
Title:
NONVOLATILE PROGRAMMABLE CRYSTAL OSCILLATOR CIRCUIT
48
Patent #:
Issue Dt:
11/07/2006
Application #:
10949537
Filing Dt:
09/23/2004
Title:
DATA PATH CONFIGURABLE FOR MULTIPLE CLOCKING ARRANGEMENTS
49
Patent #:
Issue Dt:
03/06/2007
Application #:
10949902
Filing Dt:
09/24/2004
Title:
AMPLITUDE CONTROL FOR CRYSTAL OSCILLATOR
50
Patent #:
Issue Dt:
05/13/2008
Application #:
10950332
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
03/31/2005
Title:
OXIDE-NITRIDE STACK GATE DIELECTRIC
51
Patent #:
Issue Dt:
07/04/2006
Application #:
10950362
Filing Dt:
09/24/2004
Title:
METHOD TO REDUCE PEB SENSITIVITY OF RESIST
52
Patent #:
Issue Dt:
04/12/2005
Application #:
10951370
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
03/03/2005
Title:
PHOTOSENSITIVE POLYMERIC MEMORY ELEMENTS
53
Patent #:
Issue Dt:
06/27/2006
Application #:
10951410
Filing Dt:
09/28/2004
Title:
SYSTEM THAT FACILITATES READING MULTI-LEVEL DATA IN NON-VOLATILE MEMORY
54
Patent #:
Issue Dt:
04/20/2010
Application #:
10954754
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
12/15/2005
Title:
CHARGE CONTROL THAT KEEPS CONSTANT INPUT VOLTAGE SUPPLIED TO BATTERY PACK
55
Patent #:
Issue Dt:
10/03/2006
Application #:
10957247
Filing Dt:
10/01/2004
Title:
SO2 TREATMENT OF OXIDIZED CUO FOR COPPER SULFIDE FORMATION OF MEMORY ELEMENT GROWTH
56
Patent #:
Issue Dt:
01/30/2007
Application #:
10962929
Filing Dt:
10/11/2004
Title:
METHOD AND AN APPARATUS TO REDUCE DUTY CYCLE DISTORTION
57
Patent #:
Issue Dt:
10/02/2007
Application #:
10964040
Filing Dt:
10/13/2004
Title:
LEVEL SHIFTING INPUT BUFFER CIRCUIT
58
Patent #:
Issue Dt:
04/11/2006
Application #:
10965445
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
06/23/2005
Title:
REPLICA BIASED VOLTAGE REGULATOR
59
Patent #:
Issue Dt:
03/27/2007
Application #:
10965856
Filing Dt:
10/18/2004
Publication #:
Pub Dt:
12/22/2005
Title:
MOS CAPACITOR DEVICE
60
Patent #:
Issue Dt:
04/17/2007
Application #:
10968414
Filing Dt:
10/19/2004
Title:
NON-VOLATILE MEMORY SYSTEM HAVING A PROGRAMMABLY SELECTABLE BOOT CODE SECTION SIZE
61
Patent #:
Issue Dt:
06/27/2006
Application #:
10968705
Filing Dt:
10/19/2004
Title:
ION PATH POLYMERS FOR ION-MOTION MEMORY
62
Patent #:
Issue Dt:
03/28/2006
Application #:
10968713
Filing Dt:
10/19/2004
Title:
PATTERNING FOR ELONGATED VSS CONTACT FLASH MEMORY
63
Patent #:
Issue Dt:
07/31/2007
Application #:
10973257
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
12/29/2005
Title:
CONTROL CIRCUIT OF DC-DC CONVERTER AND ITS CONTROL METHOD
64
Patent #:
Issue Dt:
11/14/2006
Application #:
10975831
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
12/29/2005
Title:
SEMICONDUCTOR DEVICE HAVING OUTPUT CIRCUIT ADAPTIVELY SUPPRESSING SSO NOISE
65
Patent #:
Issue Dt:
10/06/2009
Application #:
10976760
Filing Dt:
11/01/2004
Title:
FLASH MEMORY DEVICE HAVING INCREASED OVER-ERASE CORRECTION EFFICIENCY AND ROBUSTNESS AGAINST DEVICE VARIATIONS
66
Patent #:
Issue Dt:
07/22/2008
Application #:
10976816
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SYSTEM AND METHOD FOR PROTECTING SEMICONDUCTOR DEVICES
67
Patent #:
Issue Dt:
02/06/2007
Application #:
10978045
Filing Dt:
10/29/2004
Title:
VARIABLE CAPACITANCE CHARGE PUMP SYSTEM AND METHOD
68
Patent #:
Issue Dt:
05/22/2007
Application #:
10978621
Filing Dt:
11/01/2004
Title:
POLYMER MEMORY CELL OPERATION
69
Patent #:
Issue Dt:
05/20/2008
Application #:
10978845
Filing Dt:
11/01/2004
Title:
METHOD OF MAKING AN ORGANIC MEMORY CELL
70
Patent #:
Issue Dt:
11/28/2006
Application #:
10979516
Filing Dt:
11/02/2004
Title:
METHOD OF MAKING A MEMORY CELL
71
Patent #:
Issue Dt:
01/15/2008
Application #:
10981026
Filing Dt:
11/04/2004
Title:
METHOD FOR ISOLATING A FAILURE SITE IN A WORDLINE IN A MEMORY ARRAY
72
Patent #:
Issue Dt:
12/19/2006
Application #:
10981174
Filing Dt:
11/04/2004
Title:
MEMORY CELL WITH PLASMA-GROWN OXIDE SPACER FOR REDUCED DIBL AND VSS RESISTANCE AND INCREASED RELIABILITY
73
Patent #:
Issue Dt:
08/28/2007
Application #:
10981792
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
12/15/2005
Title:
CIRCUIT AND METHOD FOR CONTROLLING DC-DC CONVERTER
74
Patent #:
Issue Dt:
10/10/2006
Application #:
10981795
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
01/26/2006
Title:
CIRCUIT FOR DETECTING DIFFERENCE IN CAPACITANCE
75
Patent #:
Issue Dt:
03/28/2006
Application #:
10981833
Filing Dt:
11/04/2004
Title:
RAMPED SOFT PROGRAMMING FOR CONTROL OF ERASE VOLTAGE DISTRIBUTIONS IN FLASH MEMORY DEVICES
76
Patent #:
Issue Dt:
05/02/2006
Application #:
10982296
Filing Dt:
11/05/2004
Title:
MULTI BIT PROGRAM ALGORITHM
77
Patent #:
Issue Dt:
10/28/2008
Application #:
10983919
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
03/30/2006
Title:
CONTROL OF MEMORY DEVICES POSSESSING VARIABLE RESISTANCE CHARACTERISTICS
78
Patent #:
Issue Dt:
10/03/2006
Application #:
10984065
Filing Dt:
11/09/2004
Publication #:
Pub Dt:
05/11/2006
Title:
CIRCUIT FOR GENERATING A CENTERED REFERENCE VOLTAGE FOR A 1T/1C FERROELECTRIC MEMORY
79
Patent #:
Issue Dt:
06/15/2010
Application #:
10984104
Filing Dt:
11/09/2004
Title:
ADAPTIVE OUTPUT DRIVER
80
Patent #:
Issue Dt:
04/03/2007
Application #:
10985172
Filing Dt:
11/10/2004
Title:
SYSTEMS AND METHODS FOR A MEMORY AND/OR SELECTION ELEMENT FORMED WITHIN A RECESS IN A METAL LINE
81
Patent #:
Issue Dt:
08/01/2006
Application #:
10986652
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
04/28/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
82
Patent #:
Issue Dt:
05/22/2007
Application #:
10987262
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
PROTECTION OF ACTIVE LAYERS OF MEMORY CELLS DURING PROCESSING OF OTHER ELEMENTS
83
Patent #:
Issue Dt:
04/25/2006
Application #:
10990706
Filing Dt:
11/17/2004
Publication #:
Pub Dt:
05/18/2006
Title:
DIODE ARRAY ARCHITECTURE FOR ADDRESSING NANOSCALE RESISTIVE MEMORY ARRAYS
84
Patent #:
Issue Dt:
08/07/2007
Application #:
10993031
Filing Dt:
11/19/2004
Title:
METHODS FOR CLEANING CONTACT OPENINGS TO REDUCE CONTACT RESISTANCE
85
Patent #:
Issue Dt:
02/06/2007
Application #:
10996018
Filing Dt:
11/22/2004
Title:
STACKED DIE MEMORY DEPTH EXPANSION
86
Patent #:
Issue Dt:
02/21/2006
Application #:
10997345
Filing Dt:
11/24/2004
Title:
FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
87
Patent #:
Issue Dt:
11/28/2006
Application #:
11000740
Filing Dt:
12/01/2004
Title:
SELECTIVE POLYMER GROWTH FOR MEMORY CELL FABRICATION
88
Patent #:
Issue Dt:
10/30/2007
Application #:
11000870
Filing Dt:
12/01/2004
Title:
METAL/OXIDE ETCH AFTER POLISH TO PREVENT BRIDGING BETWEEN ADJACENT FEATURES OF A SEMICONDUCTOR STRUCTURE
89
Patent #:
Issue Dt:
06/24/2008
Application #:
11001519
Filing Dt:
12/01/2004
Title:
MEMORY DEVICE WITH A SELECTION ELEMENT AND A CONTROL LINE IN A SUBSTANTIALLY SIMILAR LAYER
90
Patent #:
Issue Dt:
09/18/2007
Application #:
11001940
Filing Dt:
12/01/2004
Title:
METHOD, SYSTEM, AND CIRCUIT FOR PERFORMING A MEMORY RELATED OPERATION
91
Patent #:
Issue Dt:
02/06/2007
Application #:
11001992
Filing Dt:
12/02/2004
Title:
RANGE CONTROLLER CIRCUIT AND METHOD
92
Patent #:
Issue Dt:
10/17/2006
Application #:
11003208
Filing Dt:
12/02/2004
Title:
METHOD FOR ACHIEVING INCREASED CONTROL OVER INTERCONNECT LINE THICKNESS ACROSS A WAFER AND BETWEEN WAFERS
93
Patent #:
Issue Dt:
02/27/2007
Application #:
11003292
Filing Dt:
12/03/2004
Title:
SYSTEM AND METHOD FOR STAGING CONCURRENT ACCESSES TO A MEMORY ADDRESS LOCATION VIA A SINGLE PORT USING A HIGH SPEED SAMPLING CLOCK
94
Patent #:
Issue Dt:
07/15/2008
Application #:
11003528
Filing Dt:
12/03/2004
Title:
HIGH-VOLTAGE TRANSISTOR HAVING A U-SHAPED GATE AND METHOD FOR FORMING SAME
95
Patent #:
Issue Dt:
06/17/2008
Application #:
11003996
Filing Dt:
12/02/2004
Title:
CIRCUIT AND METHOD TO SPEED UP PLL LOCK-TIME AND PROHIBIT FREQUENCY RUNAWAY
96
Patent #:
Issue Dt:
09/12/2006
Application #:
11004564
Filing Dt:
12/03/2004
Title:
REPLICA BIAS REGULATOR WITH SENSE-SWITCHED LOAD REGULATION CONTROL
97
Patent #:
Issue Dt:
03/02/2010
Application #:
11006034
Filing Dt:
12/07/2004
Title:
INPUT OF TEST CONDITIONS AND OUTPUT GENERATION FOR BUILT-IN SELF TEST
98
Patent #:
Issue Dt:
04/14/2009
Application #:
11006934
Filing Dt:
12/07/2004
Title:
METHOD AND APPARATUS FOR USING EMPTY TIME SLOTS FOR SPREAD SPECTRUM ENCODING
99
Patent #:
Issue Dt:
06/12/2012
Application #:
11006944
Filing Dt:
12/07/2004
Title:
METHOD AND APPARATUS FOR DETECTING MOVEMENTS IN AN ELECTRONIC DEVICE
100
Patent #:
Issue Dt:
08/31/2010
Application #:
11006998
Filing Dt:
12/07/2004
Title:
METHOD AND APPARATUS FOR TUNING A RADIO RECEIVER WITH A RADIO TRANSMITTER
Assignors
1
Exec Dt:
03/12/2015
2
Exec Dt:
03/12/2015
Assignee
1
1585 BROADWAY
NEW YORK, NEW YORK 10036
Correspondence name and address
SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
ONE MANHATTAN WEST
MONIQUE L. RIBANDO
NEW YORK, NY 10001-8602

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