skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:058297/0458   Pages: 4
Recorded: 10/19/2021
Attorney Dkt #:CONVERSANT TO MOSAID
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 20
1
Patent #:
7027407
Issue Dt:
04/11/2006
Application #:
09760583
Filing Dt:
01/16/2001
Publication #:
US20010009555
Pub Dt:
07/26/2001
Title:
METHOD AND DEVICE FOR ROBUST FALLBACK IN DATA COMMUNICATION SYSTEMS
2
Patent #:
7176109
Issue Dt:
02/13/2007
Application #:
09816962
Filing Dt:
03/23/2001
Publication #:
US20020135029
Pub Dt:
09/26/2002
Title:
METHOD FOR FORMING RAISED STRUCTURES BY CONTROLLED SELECTIVE EPITAXIAL GROWTH OF FACET USING SPACER
3
Patent #:
6940328
Issue Dt:
09/06/2005
Application #:
10229790
Filing Dt:
08/28/2002
Publication #:
US20040041609
Pub Dt:
03/04/2004
Title:
METHODS AND APPARATUS FOR DUTY CYCLE CONTROL
4
Patent #:
7038945
Issue Dt:
05/02/2006
Application #:
10841785
Filing Dt:
05/07/2004
Publication #:
US20050248990
Pub Dt:
11/10/2005
Title:
FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE
5
Patent #:
7061817
Issue Dt:
06/13/2006
Application #:
10883619
Filing Dt:
06/30/2004
Publication #:
US20060002206
Pub Dt:
01/05/2006
Title:
DATA PATH HAVING GROUNDED PRECHARGE OPERATION AND TEST COMPRESSION CAPABILITY
6
Patent #:
7170806
Issue Dt:
01/30/2007
Application #:
11367467
Filing Dt:
03/03/2006
Publication #:
US20060158944
Pub Dt:
07/20/2006
Title:
DATA PATH HAVING GROUNDED PRECHARGE OPERATION AND TEST COMPRESSION CAPABILITY
7
Patent #:
7120055
Issue Dt:
10/10/2006
Application #:
11367922
Filing Dt:
03/03/2006
Publication #:
US20060146611
Pub Dt:
07/06/2006
Title:
FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE
8
Patent #:
7910177
Issue Dt:
03/22/2011
Application #:
11496093
Filing Dt:
07/31/2006
Publication #:
US20060265100
Pub Dt:
11/23/2006
Title:
SEQUENTIAL PULSE DEPOSITION
9
Patent #:
7280403
Issue Dt:
10/09/2007
Application #:
11522600
Filing Dt:
09/18/2006
Publication #:
US20070014158
Pub Dt:
01/18/2007
Title:
FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE
10
Patent #:
7756268
Issue Dt:
07/13/2010
Application #:
12042576
Filing Dt:
03/05/2008
Publication #:
US20080227333
Pub Dt:
09/18/2008
Title:
OUTLET ADD-ON MODULE
11
Patent #:
7881462
Issue Dt:
02/01/2011
Application #:
12045350
Filing Dt:
03/10/2008
Publication #:
US20080231111
Pub Dt:
09/25/2008
Title:
OUTLET ADD-ON MODULE
12
Patent #:
8549209
Issue Dt:
10/01/2013
Application #:
12508926
Filing Dt:
07/24/2009
Publication #:
US20100115214
Pub Dt:
05/06/2010
Title:
BRIDGING DEVICE HAVING A CONFIGURABLE VIRTUAL PAGE SIZE
13
Patent #:
RE43025
Issue Dt:
12/13/2011
Application #:
12566533
Filing Dt:
09/24/2009
Title:
MIXED COMPOSITION INTERFACE LAYER AND METHOD OF FORMING
14
Patent #:
8400781
Issue Dt:
03/19/2013
Application #:
12757540
Filing Dt:
04/09/2010
Publication #:
US20110050320
Pub Dt:
03/03/2011
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
15
Patent #:
8134406
Issue Dt:
03/13/2012
Application #:
13158862
Filing Dt:
06/13/2011
Publication #:
US20120001684
Pub Dt:
01/05/2012
Title:
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
16
Patent #:
9685536
Issue Dt:
06/20/2017
Application #:
13407855
Filing Dt:
02/29/2012
Publication #:
US20120211824
Pub Dt:
08/23/2012
Title:
A VERTICAL TRANSISTOR HAVING A VERTICAL GATE STRUCTURE HAVING A TOP OR UPPER SURFACE DEFINING A FACET FORMED BETWEEN A VERTICAL SOURCE AND A VERTICAL DRAIN.
17
Patent #:
8711573
Issue Dt:
04/29/2014
Application #:
13777645
Filing Dt:
02/26/2013
Publication #:
US20130169343
Pub Dt:
07/04/2013
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
18
Patent #:
9977731
Issue Dt:
05/22/2018
Application #:
14027858
Filing Dt:
09/16/2013
Publication #:
US20140019705
Pub Dt:
01/16/2014
Title:
BRIDGING DEVICE HAVING A CONFIGURABLE VIRTUAL PAGE SIZE
19
Patent #:
9190369
Issue Dt:
11/17/2015
Application #:
14254865
Filing Dt:
04/16/2014
Publication #:
US20140227829
Pub Dt:
08/14/2014
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
20
Patent #:
9780073
Issue Dt:
10/03/2017
Application #:
14886190
Filing Dt:
10/19/2015
Publication #:
US20160099234
Pub Dt:
04/07/2016
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
Assignor
1
CONVERSANT INTELLECTUAL PROPERTY INC.
Exec Dt:
04/01/2021
Assignee
1
MOSAID TECHNOLOGIES INCORPORATED
515 LEGGET DRIVE
SUITE 100
OTTAWA, CANADA K2K 3G4
Correspondence name and address
CONVERSANT IP MANAGEMENT CORP.
5830 GRANITE PARKWAY #100-247
SUITE 247
PLANO, TX 75024

Search Results as of: 05/11/2024 08:49 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT