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STOCHASTIC SIGNAL DENSITY MODULATION FOR OPTICAL TRANSDUCER CONTROL
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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11599926
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Filing Dt:
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11/14/2006
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Title:
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PROCESS FOR POST CONTACT-ETCH CLEAN
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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11600255
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Filing Dt:
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11/14/2006
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Publication #:
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Pub Dt:
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05/15/2008
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Title:
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CAPACITANCE TO CODE CONVERTER WITH SIGMA-DELTA MODULATOR
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Patent #:
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Issue Dt:
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01/03/2012
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Application #:
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11601465
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Filing Dt:
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11/16/2006
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Title:
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CHARGE ACCUMULATION CAPACITANCE SENSOR WITH LINEAR TRANSFER CHARACTERISTIC
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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11602222
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Filing Dt:
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11/21/2006
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Publication #:
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Pub Dt:
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04/24/2008
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Title:
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MEASURING AND CONTROLLING CURRENT CONSUMPTION AND OUTPUT CURRENT OF CHARGE PUMPS
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Patent #:
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Issue Dt:
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09/08/2009
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Application #:
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11607090
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Filing Dt:
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12/01/2006
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Publication #:
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Pub Dt:
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06/14/2007
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY HAVING VOLTAGE ADJUSTING CIRCUIT
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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11608032
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Filing Dt:
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12/07/2006
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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MEMORY DEVICE PROTECTION LAYER
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11611053
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Filing Dt:
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12/14/2006
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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11612413
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Filing Dt:
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12/18/2006
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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DUAL-BIT MEMORY DEVICE HAVING TRENCH ISOLATION MATERIAL DISPOSED NEAR BIT LINE CONTACT AREAS
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11612863
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Filing Dt:
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12/19/2006
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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11612992
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Filing Dt:
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12/19/2006
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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11613383
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11613513
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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SEMICONDUCTOR MEMORY COMPRISING DUAL CHARGE STORAGE NODES AND METHODS FOR ITS FABRICATION
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Patent #:
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Issue Dt:
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02/14/2012
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Application #:
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11613620
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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NEAR FIELD COMMUNICATION, SECURITY AND NON-VOLATILE MEMORY INTEGRATED SUB-SYSTEM FOR EMBEDDED PORTABLE APPLICATIONS
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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11613627
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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SECURE DATA VERIFICATION VIA BIOMETRIC INPUT
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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11613691
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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05/08/2008
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Title:
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MULTIPLE STAKEHOLDER SECURE MEMORY PARTITIONING AND ACCESS CONTROL
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11614048
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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METHODS FOR FABRICATING A SPLIT CHARGE STORAGE NODE SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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05/21/2013
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Application #:
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11614053
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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11614306
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Filing Dt:
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12/21/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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SOLID-STATE MEMORY-BASED GENERATION AND HANDLING OF SECURITY AUTHENTICATION TOKENS
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11614801
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Filing Dt:
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12/21/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY
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Patent #:
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Issue Dt:
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12/09/2008
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Application #:
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11615280
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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NEGATIVE WORDLINE BIAS FOR REDUCTION OF LEAKAGE CURRENT DURING FLASH MEMORY OPERATION
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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11615365
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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11615489
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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11615583
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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INTEGRATED CIRCUIT WAFER SYSTEM WITH CONTROL STRATEGY
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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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11616085
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Filing Dt:
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12/26/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
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MEMORY DEVICE ETCH METHODS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11616385
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Filing Dt:
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12/27/2006
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Publication #:
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Pub Dt:
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07/03/2008
| | | | |
Title:
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PERSONAL DIGITAL RIGHTS MANAGEMENT AGENT-SERVER
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Patent #:
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Issue Dt:
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02/01/2011
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Application #:
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11616544
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Filing Dt:
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12/27/2006
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Publication #:
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Pub Dt:
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07/03/2008
| | | | |
Title:
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LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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11616718
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Filing Dt:
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12/27/2006
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Publication #:
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Pub Dt:
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07/03/2008
| | | | |
Title:
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DUAL-BIT MEMORY DEVICE HAVING ISOLATION MATERIAL DISPOSED UNDERNEATH A BIT LINE SHARED BY ADJACENT DUAL-BIT MEMORY CELLS
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Patent #:
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Issue Dt:
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07/24/2012
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Application #:
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11625150
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Filing Dt:
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01/19/2007
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Publication #:
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Pub Dt:
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07/24/2008
| | | | |
Title:
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FULLY ASSOCIATIVE BANKING FOR MEMORY
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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11625158
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Filing Dt:
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01/19/2007
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Publication #:
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Pub Dt:
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07/24/2008
| | | | |
Title:
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BYTE MASK COMMAND FOR MEMORIES
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11633800
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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METHODS OF PROGRAMMING AND ERASING RESISTIVE MEMORY DEVICES
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Patent #:
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Issue Dt:
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01/10/2012
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Application #:
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11633844
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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GETTERING/STOP LAYER FOR PREVENTION OF REDUCTION OF INSULATING OXIDE IN METAL-INSULATOR-METAL DEVICE
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Patent #:
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Issue Dt:
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01/03/2012
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Application #:
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11633929
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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11633940
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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METHOD OF PROGRAMMING, ERASING AND REPAIRING A MEMORY DEVICE
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Patent #:
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Issue Dt:
|
05/25/2010
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Application #:
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11634776
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Filing Dt:
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12/06/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
Title:
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METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
|
10/27/2015
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Application #:
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11634777
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Filing Dt:
|
12/06/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
Title:
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Barrier region underlying source/drain regions for dual-bit memory devices
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Patent #:
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Issue Dt:
|
12/02/2014
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Application #:
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11636060
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Filing Dt:
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12/07/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
Title:
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Preventing unintentional activation of a touch-sensor button caused by a presence of conductive liquid on the touch-sensor button
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Patent #:
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Issue Dt:
|
11/11/2008
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Application #:
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11636111
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Filing Dt:
|
12/07/2006
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Publication #:
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Pub Dt:
|
08/02/2007
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
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Patent #:
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Issue Dt:
|
10/26/2010
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Application #:
|
11636116
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Filing Dt:
|
12/06/2006
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Publication #:
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Pub Dt:
|
05/15/2008
| | | | |
Title:
|
REDUCTION OF TEMPERATURE DEPENDENCE OF A REFERENCE VOLTAGE
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|
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Patent #:
|
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Issue Dt:
|
10/13/2015
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Application #:
|
11639666
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Filing Dt:
|
12/15/2006
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Publication #:
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Pub Dt:
|
06/19/2008
| | | | |
Title:
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METHOD FOR FABRICATING MEMORY CELLS HAVING SPLIT CHARGE STORAGE NODES
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|