skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:059581/0435   Pages: 8
Recorded: 04/04/2022
Attorney Dkt #:001443
Conveyance: CERTIFICATE OF CONVERSION & CHANGE OF NAME
Total properties: 65
1
Patent #:
NONE
Issue Dt:
Application #:
14027571
Filing Dt:
09/16/2013
Publication #:
Pub Dt:
03/19/2015
Title:
MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACE
2
Patent #:
Issue Dt:
02/28/2017
Application #:
14533728
Filing Dt:
11/05/2014
Publication #:
Pub Dt:
05/05/2016
Title:
MULTI-LAYER SUBSTRATES SUITABLE FOR INTERCONNECTION BETWEEN CIRCUIT MODULES
3
Patent #:
Issue Dt:
05/30/2017
Application #:
14809036
Filing Dt:
07/24/2015
Publication #:
Pub Dt:
03/10/2016
Title:
MULTICHIP MODULES AND METHODS OF FABRICATION
4
Patent #:
Issue Dt:
11/08/2016
Application #:
14880967
Filing Dt:
10/12/2015
Title:
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
5
Patent #:
Issue Dt:
11/01/2016
Application #:
14935705
Filing Dt:
11/09/2015
Title:
High-Bandwidth Memory Application With Controlled Impedance Loading
6
Patent #:
Issue Dt:
02/20/2018
Application #:
14945292
Filing Dt:
11/18/2015
Publication #:
Pub Dt:
06/16/2016
Title:
IMAGE SENSOR DEVICE
7
Patent #:
Issue Dt:
11/26/2019
Application #:
14993586
Filing Dt:
01/12/2016
Publication #:
Pub Dt:
04/13/2017
Title:
Embedded wire bond wires
8
Patent #:
Issue Dt:
05/29/2018
Application #:
14997774
Filing Dt:
01/18/2016
Publication #:
Pub Dt:
07/06/2017
Title:
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
9
Patent #:
Issue Dt:
11/07/2017
Application #:
15019788
Filing Dt:
02/09/2016
Publication #:
Pub Dt:
04/27/2017
Title:
DRAM Adjacent Row Disturb Mitigation
10
Patent #:
Issue Dt:
04/28/2020
Application #:
15057083
Filing Dt:
02/29/2016
Publication #:
Pub Dt:
08/31/2017
Title:
Correction Die for Wafer/Die Stack
11
Patent #:
Issue Dt:
05/28/2019
Application #:
15147807
Filing Dt:
05/05/2016
Publication #:
Pub Dt:
11/09/2017
Title:
Nanoscale Interconnect Array for Stacked Dies
12
Patent #:
NONE
Issue Dt:
Application #:
15152469
Filing Dt:
05/11/2016
Publication #:
Pub Dt:
06/29/2017
Title:
SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES
13
Patent #:
Issue Dt:
12/04/2018
Application #:
15192549
Filing Dt:
06/24/2016
Publication #:
Pub Dt:
12/28/2017
Title:
STACKED TRANSMISSION LINE
14
Patent #:
Issue Dt:
04/03/2018
Application #:
15237936
Filing Dt:
08/16/2016
Publication #:
Pub Dt:
02/01/2018
Title:
Wire Bonding Method and Apparatus for Electromagnetic Interference Shielding
15
Patent #:
Issue Dt:
07/24/2018
Application #:
15247705
Filing Dt:
08/25/2016
Publication #:
Pub Dt:
03/30/2017
Title:
Ultrathin layer for forming a capacitive interface between joined Integrated Circuit Components
16
Patent #:
Issue Dt:
06/26/2018
Application #:
15286086
Filing Dt:
10/05/2016
Publication #:
Pub Dt:
01/26/2017
Title:
MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACE
17
Patent #:
Issue Dt:
07/17/2018
Application #:
15337323
Filing Dt:
10/28/2016
Publication #:
Pub Dt:
05/11/2017
Title:
HIGH-BANDWIDTH MEMORY APPLICATION WITH CONTROLLED IMPEDANCE LOADING
18
Patent #:
Issue Dt:
11/07/2017
Application #:
15344990
Filing Dt:
11/07/2016
Publication #:
Pub Dt:
04/27/2017
Title:
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
19
Patent #:
Issue Dt:
12/26/2017
Application #:
15354061
Filing Dt:
11/17/2016
Publication #:
Pub Dt:
06/15/2017
Title:
EMBEDDED VIALESS BRIDGES
20
Patent #:
Issue Dt:
07/03/2018
Application #:
15403679
Filing Dt:
01/11/2017
Publication #:
Pub Dt:
05/04/2017
Title:
INTERCONNECTION SUBSTRATES FOR INTERCONNECTION BETWEEN CIRCUIT MODULES, AND METHODS OF MANUFACTURE
21
Patent #:
Issue Dt:
12/25/2018
Application #:
15584961
Filing Dt:
05/02/2017
Publication #:
Pub Dt:
08/17/2017
Title:
Multichip modules and methods of fabrication
22
Patent #:
Issue Dt:
05/15/2018
Application #:
15670382
Filing Dt:
08/07/2017
Publication #:
Pub Dt:
02/08/2018
Title:
Warpage Balancing in Thin Packages
23
Patent #:
Issue Dt:
04/16/2019
Application #:
15803710
Filing Dt:
11/03/2017
Publication #:
Pub Dt:
04/26/2018
Title:
DRAM Adjacent Row Disturb Mitigation
24
Patent #:
Issue Dt:
10/30/2018
Application #:
15804122
Filing Dt:
11/06/2017
Publication #:
Pub Dt:
03/01/2018
Title:
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
25
Patent #:
Issue Dt:
12/24/2019
Application #:
15834658
Filing Dt:
12/07/2017
Publication #:
Pub Dt:
04/05/2018
Title:
SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES
26
Patent #:
Issue Dt:
09/25/2018
Application #:
15845333
Filing Dt:
12/18/2017
Publication #:
Pub Dt:
04/19/2018
Title:
Embedded Vialess Bridges
27
Patent #:
Issue Dt:
04/23/2019
Application #:
15875067
Filing Dt:
01/19/2018
Publication #:
Pub Dt:
05/24/2018
Title:
Image Sensor Device
28
Patent #:
Issue Dt:
05/19/2020
Application #:
15914617
Filing Dt:
03/07/2018
Publication #:
Pub Dt:
07/12/2018
Title:
WIRE BONDING METHOD AND APPARATUS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING
29
Patent #:
Issue Dt:
06/18/2019
Application #:
15959619
Filing Dt:
04/23/2018
Publication #:
Pub Dt:
08/23/2018
Title:
EMBEDDED WIRE BOND WIRES FOR VERTICAL INTEGRATION WITH SEPARATE SURFACE MOUNT AND WIRE BOND MOUNTING SURFACES
30
Patent #:
Issue Dt:
11/19/2019
Application #:
15977905
Filing Dt:
05/11/2018
Publication #:
Pub Dt:
09/13/2018
Title:
Warpage Balancing In Thin Packages
31
Patent #:
Issue Dt:
08/18/2020
Application #:
15980894
Filing Dt:
05/16/2018
Publication #:
Pub Dt:
12/13/2018
Title:
Deformable Electrical Contacts With Conformable Target Pads
32
Patent #:
Issue Dt:
05/14/2019
Application #:
15993271
Filing Dt:
05/30/2018
Title:
Systems and Methods for Flash Stacking
33
Patent #:
Issue Dt:
03/10/2020
Application #:
16017010
Filing Dt:
06/25/2018
Publication #:
Pub Dt:
11/22/2018
Title:
Interconnection Substrates for Interconnection Between Circuit Modules, and Methods of Manufacture
34
Patent #:
Issue Dt:
03/24/2020
Application #:
16020654
Filing Dt:
06/27/2018
Publication #:
Pub Dt:
12/20/2018
Title:
ULTRATHIN LAYER FOR FORMING A CAPACITIVE INTERFACE BETWEEN JOINED INTEGRATED CIRCUIT COMPONENT
35
Patent #:
Issue Dt:
02/11/2020
Application #:
16127110
Filing Dt:
09/10/2018
Publication #:
Pub Dt:
01/24/2019
Title:
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
36
Patent #:
Issue Dt:
07/09/2019
Application #:
16136635
Filing Dt:
09/20/2018
Publication #:
Pub Dt:
01/17/2019
Title:
EMBEDDED VIALESS BRIDGES
37
Patent #:
Issue Dt:
03/23/2021
Application #:
16136776
Filing Dt:
09/20/2018
Publication #:
Pub Dt:
09/05/2019
Title:
STRETCHABLE FILM ASSEMBLY WITH CONDUCTIVE TRACES
38
Patent #:
Issue Dt:
12/07/2021
Application #:
16140995
Filing Dt:
09/25/2018
Publication #:
Pub Dt:
03/28/2019
Title:
INTERCONNECT STRUCTURES AND METHODS FOR FORMING SAME
39
Patent #:
Issue Dt:
06/21/2022
Application #:
16172271
Filing Dt:
10/26/2018
Publication #:
Pub Dt:
02/28/2019
Title:
STACKED TRANSMISSION LINE
40
Patent #:
Issue Dt:
11/26/2019
Application #:
16196313
Filing Dt:
11/20/2018
Publication #:
Pub Dt:
03/21/2019
Title:
MULTICHIP MODULES AND METHODS OF FABRICATION
41
Patent #:
Issue Dt:
10/20/2020
Application #:
16212248
Filing Dt:
12/06/2018
Publication #:
Pub Dt:
04/18/2019
Title:
CAPACITIVE COUPLING IN A DIRECT-BONDED INTERFACE FOR MICROELECTRONIC DEVICES
42
Patent #:
Issue Dt:
10/13/2020
Application #:
16292705
Filing Dt:
03/05/2019
Publication #:
Pub Dt:
09/05/2019
Title:
REMOTE OPTICAL ENGINE FOR VIRTUAL REALITY OR AUGMENTED REALITY HEADSETS
43
Patent #:
Issue Dt:
03/17/2020
Application #:
16368219
Filing Dt:
03/28/2019
Publication #:
Pub Dt:
12/05/2019
Title:
SYSTEMS AND METHODS FOR FLASH STACKING
44
Patent #:
Issue Dt:
11/24/2020
Application #:
16370747
Filing Dt:
03/29/2019
Publication #:
Pub Dt:
07/25/2019
Title:
IMAGE SENSOR DEVICE
45
Patent #:
Issue Dt:
03/24/2020
Application #:
16378921
Filing Dt:
04/09/2019
Publication #:
Pub Dt:
08/01/2019
Title:
NANOSCALE INTERCONNECT ARRAY FOR STACKED DIES
46
Patent #:
Issue Dt:
07/26/2022
Application #:
16397569
Filing Dt:
04/29/2019
Publication #:
Pub Dt:
10/31/2019
Title:
MULTI-DIE MODULE WITH LOW POWER OPERATION
47
Patent #:
Issue Dt:
07/20/2021
Application #:
16513489
Filing Dt:
07/16/2019
Publication #:
Pub Dt:
11/14/2019
Title:
IMAGE SENSOR DEVICE
48
Patent #:
Issue Dt:
03/01/2022
Application #:
16678342
Filing Dt:
11/08/2019
Publication #:
Pub Dt:
12/10/2020
Title:
Network On Layer Enabled Architectures
49
Patent #:
Issue Dt:
09/07/2021
Application #:
16687498
Filing Dt:
11/18/2019
Publication #:
Pub Dt:
03/19/2020
Title:
SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES
50
Patent #:
Issue Dt:
10/04/2022
Application #:
16715524
Filing Dt:
12/16/2019
Publication #:
Pub Dt:
04/16/2020
Title:
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
51
Patent #:
Issue Dt:
04/27/2021
Application #:
16814175
Filing Dt:
03/10/2020
Publication #:
Pub Dt:
07/02/2020
Title:
SYSTEMS AND METHODS FOR FLASH STACKING
52
Patent #:
Issue Dt:
03/14/2023
Application #:
16823391
Filing Dt:
03/19/2020
Publication #:
Pub Dt:
07/09/2020
Title:
CORRECTION DIE FOR WAFER/DIE STACK
53
Patent #:
Issue Dt:
05/17/2022
Application #:
16833445
Filing Dt:
03/27/2020
Publication #:
Pub Dt:
07/16/2020
Title:
WIRE BONDING METHOD AND APPARATUS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING
54
Patent #:
Issue Dt:
03/08/2022
Application #:
16842199
Filing Dt:
04/07/2020
Publication #:
Pub Dt:
12/10/2020
Title:
Symbiotic Network On Layers
55
Patent #:
Issue Dt:
10/31/2023
Application #:
16868701
Filing Dt:
05/07/2020
Publication #:
Pub Dt:
11/11/2021
Title:
ACTIVE BRIDGING APPARATUS
56
Patent #:
NONE
Issue Dt:
Application #:
16905766
Filing Dt:
06/18/2020
Publication #:
Pub Dt:
12/24/2020
Title:
CONNECTING MULTIPLE CHIPS USING AN INTERCONNECT DEVICE
57
Patent #:
Issue Dt:
04/06/2021
Application #:
17019080
Filing Dt:
09/11/2020
Publication #:
Pub Dt:
12/31/2020
Title:
REMOTE OPTICAL ENGINE FOR VIRTUAL REALITY OR AUGMENTED REALITY HEADSETS
58
Patent #:
Issue Dt:
11/08/2022
Application #:
17074401
Filing Dt:
10/19/2020
Publication #:
Pub Dt:
02/04/2021
Title:
CAPACITIVE COUPLING IN A DIRECT-BONDED INTERFACE FOR MICROELECTRONIC DEVICES
59
Patent #:
Issue Dt:
03/07/2023
Application #:
17098299
Filing Dt:
11/13/2020
Publication #:
Pub Dt:
05/20/2021
Title:
3D MEMORY CIRCUIT
60
Patent #:
NONE
Issue Dt:
Application #:
17182016
Filing Dt:
02/22/2021
Publication #:
Pub Dt:
06/17/2021
Title:
STRETCHABLE FILM ASSEMBLY WITH CONDUCTIVE TRACES
61
Patent #:
NONE
Issue Dt:
Application #:
17217749
Filing Dt:
03/30/2021
Publication #:
Pub Dt:
07/22/2021
Title:
SYSTEMS AND METHODS FOR FLASH STACKING
62
Patent #:
Issue Dt:
03/19/2024
Application #:
17353103
Filing Dt:
06/21/2021
Publication #:
Pub Dt:
11/25/2021
Title:
IMAGE SENSOR DEVICE
63
Patent #:
NONE
Issue Dt:
Application #:
17517247
Filing Dt:
11/02/2021
Publication #:
Pub Dt:
04/28/2022
Title:
INTERCONNECT STRUCTURES AND METHODS FOR FORMING SAME
64
Patent #:
NONE
Issue Dt:
Application #:
17577944
Filing Dt:
01/18/2022
Publication #:
Pub Dt:
05/05/2022
Title:
Network On Layer Enabled Architectures
65
Patent #:
Issue Dt:
11/21/2023
Application #:
17583872
Filing Dt:
01/25/2022
Publication #:
Pub Dt:
05/12/2022
Title:
Symbiotic Network On Layers
Assignor
1
Exec Dt:
10/01/2021
Assignee
1
3025 ORCHARD PARKWAY
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
HALEY GUILIANO LLP
111 NORTH MARKET ST., SUITE 900
SAN JOSE, CA 95113

Search Results as of: 05/11/2024 09:04 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT