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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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07815316
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Filing Dt:
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12/30/1991
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Title:
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SELF-ALIGNED CONTACT WINDOW
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Patent #:
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Issue Dt:
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08/23/1994
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Application #:
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08051028
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Filing Dt:
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04/21/1993
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Title:
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IMAGE-SENSING DISPLAY PANELS WITH LCD DISPLAY PANEL AND PHOTOSENSING E ELEMENT ARRAY
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Patent #:
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Issue Dt:
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11/17/1998
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Application #:
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08118109
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Filing Dt:
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09/08/1993
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Title:
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INTEGRATED CIRCUIT WITH GATE CONDUCTOR DEFINED RESISTOR
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Patent #:
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Issue Dt:
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08/01/1995
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Application #:
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08176600
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Filing Dt:
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01/03/1994
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Title:
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METHOD OF FABRICATING GATE STACK HAVING A REDUCED HEIGHT
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Patent #:
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Issue Dt:
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10/28/1997
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Application #:
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08192228
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Filing Dt:
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02/04/1994
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Title:
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METHOD OF DOPING METAL LAYERS FOR ELECTROMIGRATION RESISTANCE
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08236706
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Filing Dt:
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05/02/1994
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Title:
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PROCESS FOR FABRICATING A DEVICE
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08277852
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Filing Dt:
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07/20/1994
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Title:
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PROCESS FOR CONTROLLED DEPROTECTION OF POLYMERS AND A PROCESS FOR FABRICATING A DEVICE UTILIZING PARTIALLY DEPROTECTED RESIST POLYMERS
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Patent #:
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Issue Dt:
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06/25/1996
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Application #:
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08280429
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Filing Dt:
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07/26/1994
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Title:
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METHOD OF PREPARING SILICON WAFERS
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08287128
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Filing Dt:
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08/08/1994
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Title:
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ELECTRONIC CAMERA WITH BINARY LENS ELEMENT ARRAY
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Patent #:
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Issue Dt:
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05/21/1996
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Application #:
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08287204
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Filing Dt:
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08/08/1994
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Title:
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COLOR ELECTRONIC CAMERA INCLUDING PHOTOSENSOR ARRAY HAVING BINARY DIFFRACTIVE LENS ELEMENTS
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08287653
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Filing Dt:
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08/09/1994
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Title:
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PROCESS MONITOR FOR CMOS INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/19/1996
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Application #:
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08287989
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Filing Dt:
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08/09/1994
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Title:
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METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING DIFFUSION CONTROL
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Patent #:
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Issue Dt:
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07/11/1995
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Application #:
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08294076
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Filing Dt:
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08/22/1994
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Title:
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IMAGE-SENSING DISPLAY PANELS WITH LCD DISPLAY PANEL AND PHOTOSENSOR ARRAY
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Patent #:
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Issue Dt:
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10/24/1995
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Application #:
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08295303
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Filing Dt:
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08/24/1994
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Title:
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ARTICLE COMPRISING A BIPOLAR TRANSISTOR WITH FLOATING BASE
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Patent #:
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Issue Dt:
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04/02/1996
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Application #:
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08299470
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Filing Dt:
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08/31/1994
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Title:
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SPACED-GATE EMISSION DEVICE AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
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04/23/1996
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Application #:
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08299701
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Filing Dt:
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08/31/1994
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Title:
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ELECTROCHEMICAL GENERATION OF SILANE
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Patent #:
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Issue Dt:
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05/06/1997
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Application #:
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08302598
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Filing Dt:
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10/31/1994
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Title:
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INTEGRATED CIRCUIT TEST RETICLE AND ALIGNMENT MARK OPTIMIZATION METHOD
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Patent #:
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Issue Dt:
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03/19/1996
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Application #:
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08321362
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Filing Dt:
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10/11/1994
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Title:
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MASKS WITH LOW STRESS MULTILAYER FILMS AND A PROCESS FOR CONTROLLING THE STRESS OF MULTILAYER FILMS
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08323945
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Filing Dt:
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10/17/1994
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Title:
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IMAGING ACTIVE PIXEL DEVICE HAVING A NON-DESTRUCTIVE READ-OUT GATE
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Patent #:
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Issue Dt:
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05/28/1996
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Application #:
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08326449
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Filing Dt:
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10/20/1994
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Title:
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PATTERN DELINEATING APPARATUS FOR USE IN THE EUV SPECTRUM
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Patent #:
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Issue Dt:
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06/10/1997
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Application #:
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08331458
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Filing Dt:
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10/31/1994
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Title:
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FIELD EMISSION DEVICES EMPLOYING ENHANCED DIAMOND FIELD EMITTERS
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Patent #:
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Issue Dt:
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10/31/1995
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Application #:
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08346444
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Filing Dt:
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11/29/1994
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Title:
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SUBSTRATES AND METHODS FOR GAS PHASE DEPOSITION OF SEMICONDUCTORS AND OTHER MATERIALS
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08346706
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Filing Dt:
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11/30/1994
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Title:
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AREA-EFFICIENT LAYOUT FOR HIGH VOLTAGE LATERAL DEVICES
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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08347527
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Filing Dt:
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11/30/1994
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Title:
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PROCESS FOR FORMING ISOLATION REGIONS IN AN INTEGRATED CIRCUIT AND STRUCTURE FORMED THEREBY
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Patent #:
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Issue Dt:
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11/19/1996
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Application #:
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08353015
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Filing Dt:
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12/09/1994
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Title:
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METHOD FOR MAKING A METAL TO METAL CAPACITOR
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Patent #:
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Issue Dt:
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09/24/1996
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Application #:
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08359309
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Filing Dt:
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12/19/1994
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Title:
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INDUCTOR FOR HIGH FREQUENCY CIRCUITS
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Patent #:
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Issue Dt:
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01/20/1998
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Application #:
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08361616
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Filing Dt:
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12/22/1994
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Title:
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METHOD OF MAKING FIELD EMISSION DEVICES EMPLOYING ULTRA-FINE DIAMOND PARTICLE EMITTERS
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Patent #:
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Issue Dt:
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10/01/1996
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Application #:
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08365652
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Filing Dt:
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12/29/1994
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Title:
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METHOD OF MAKING MULTILAYERED A1-ALLOY STRUCTURE FOR METAL CONDUCTORS
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Patent #:
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Issue Dt:
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09/24/1996
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Application #:
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08366192
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Filing Dt:
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12/29/1994
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Title:
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INTEGRATED CIRCUIT FABRICATION WITH INTERLEVEL DIELECTRIC
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Patent #:
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Issue Dt:
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07/08/1997
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Application #:
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08374193
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Filing Dt:
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01/18/1995
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Title:
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PROCESS FOR SELECTIVE DEPOSITION OF POLYSILICON OVER SINGLE CRYSTAL SILICON SUBSTRATE AND RESULTING PRODUCT
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Patent #:
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Issue Dt:
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03/25/1997
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Application #:
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08378750
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Filing Dt:
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01/26/1995
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Title:
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METHOD FOR FABRICATING RELIABLE METALLIZATION WITH TA-SI-N BARRIER FOR SEMICONDUCTORS
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Patent #:
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Issue Dt:
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10/01/1996
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Application #:
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08379052
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Filing Dt:
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01/27/1995
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Title:
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PROCESS FOR DEVICE FABRICATION USING PROJECTION LITHOGRAPHY AND AN APPARATUS THEREFOR
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08381375
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Filing Dt:
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01/31/1995
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Title:
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FIELD EMISSION DEVICES EMPLOYING ACTIVATED DIAMOND PARTICLE EMITTERS AND METHODS FOR MAKING SAME
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Patent #:
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Issue Dt:
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03/04/1997
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Application #:
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08388934
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Filing Dt:
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02/15/1995
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Title:
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METHOD AND ARRANGEMENT FOR CHARACTERIZING MICRO-SIZE PATTERNS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08391905
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Filing Dt:
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02/21/1995
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Title:
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PROCESS FOR FABRICATING A DEVICE IN WHICH THE PROCESS IS CONTROLLED BY NEAR-FIELD IMAGING LATENT FEATURES INTRODUCED INTO ENERGY SENSITIVE RESIST MATERIALS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08396542
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Filing Dt:
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03/01/1995
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Title:
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MICROELECTRONIC INTEGRATED CIRCUIT INCLUDING HEXAGONAL SEMICONDUCTOR "AND" GATE DEVICE
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Patent #:
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Issue Dt:
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02/24/1998
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Application #:
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08397346
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Filing Dt:
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03/02/1995
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Title:
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SEMICONDUCTOR DEVICE WITH INCREASED PARASITIC EMITTER RESISTANCE AND IMPROVED LATCH-UP IMMUNITY
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08430084
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Filing Dt:
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04/27/1995
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Title:
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TRANSISTOR FABRICATION METHOD
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Patent #:
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Issue Dt:
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03/04/1997
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Application #:
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08431341
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Filing Dt:
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04/28/1995
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Title:
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INTEGRATED CIRCUIT ETCHING
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Patent #:
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Issue Dt:
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01/13/1998
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Application #:
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08434674
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Filing Dt:
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05/04/1995
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Title:
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OXIDE FORMED IN SEMICONDUCTOR SUBSTRATE BY IMPLANTATION OF SUBSTRATE WITH A NOBLE GAS PRIOR TO OXIDATION
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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08441142
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Filing Dt:
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05/15/1995
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Title:
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ARTICLE COMPRISING AN ORGANIC THIN FILM TRANSISTOR ADAPTED FOR BIASING TO FORM A N-TYPE OR A P-TYPE TRANSISTOR
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08451283
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Filing Dt:
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05/26/1995
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Title:
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PROCESS FOR DRY LITHOGRAPHIC ETCHING
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08454976
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Filing Dt:
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05/31/1995
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Title:
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PROCESS OF MANUFACTURING AN INTERGRATED CIRCUIT HAVING AN INTERFERO- METRICALLY PROFILED MOUNTING FILM
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Patent #:
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Issue Dt:
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06/11/1996
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Application #:
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08463064
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Filing Dt:
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06/05/1995
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Title:
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RELIABLE METALLIZATION WITH BARRIER FOR SEMICONDUCTORS
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08472033
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Filing Dt:
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06/06/1995
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Title:
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INTEGRATED CIRCUIT CAPACITOR
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08473543
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Filing Dt:
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06/07/1995
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Title:
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LAYOUT CONFIGURATION FOR AN INTEGRATED CIRCUIT GATE ARRAY
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08474794
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF MAKING SELF-ALIGNED REMOTE POLYSILICON CONTACTS
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Patent #:
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Issue Dt:
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12/31/1996
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Application #:
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08475110
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Filing Dt:
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06/07/1995
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Title:
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SUBSTRATES AND METHODS FOR GAS PHASE DEPOSITION OF SEMICONDUCTORS AND OTHER MATERIALS
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08479018
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Filing Dt:
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06/06/1995
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING PN JUNCTIONS SEPARATED BY DEPRESSIONS
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Patent #:
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Issue Dt:
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09/16/1997
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Application #:
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08481799
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Filing Dt:
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06/07/1995
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Title:
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KEYED END EFFECTOR FOR CMP PAD CONDITIONER
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Patent #:
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Issue Dt:
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10/28/1997
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Application #:
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08484003
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Filing Dt:
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01/09/1996
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Title:
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INPUT-OUTPUT (I/O) STRUCTURE WITH CAPACITIVELY TRIGGERED THYRISTOR FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08484675
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Filing Dt:
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06/07/1995
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Title:
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SEGMENTED EMITTER LOW NOISE TRANSISTOR
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Patent #:
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Issue Dt:
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12/09/1997
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Application #:
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08485517
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Filing Dt:
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06/07/1995
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Title:
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APPARATUS AND METHOD USING OPTICAL ENERGY FOR SPECIFYING AND QUANTITATIVELY CONTROLLING CHEMICALLY-REACTIVE COMPONENTS OF SEMICONDUCTOR PROCESSING PLASMA ETCHING GAS
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Patent #:
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Issue Dt:
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12/10/1996
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Application #:
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08488075
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Filing Dt:
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06/07/1995
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Title:
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SELF-ALIGNED TWIN WELL PROCESS HAVING A SIO2-POLYSILICON-SIO2 BARRIER MASK
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08496861
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Filing Dt:
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06/30/1995
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Title:
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IMAGE SENSOR ARRAY WITH PICTURE ELEMENT SENSOR TESTABILITY
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Patent #:
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Issue Dt:
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05/27/1997
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Application #:
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08500729
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Filing Dt:
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07/11/1995
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Title:
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SELF-ALIGNED ALIGNMENT MARKS FOR PHASE-SHIFTING MASKS
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08501289
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Filing Dt:
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07/12/1995
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Title:
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METHOD OF MAKING COMBINED METAL OXIDE SEMICONDUCTOR AND JUNCTION FIELD EFFECT TRANSISTOR DEVICE
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Patent #:
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Issue Dt:
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08/06/1996
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Application #:
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08502566
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Filing Dt:
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07/13/1995
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Title:
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COMBINED JFET & MOS TRANSISTOR DEVICE, CIRCUIT
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Patent #:
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Issue Dt:
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06/18/1996
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Application #:
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08505047
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Filing Dt:
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07/21/1995
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Title:
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METHOD OF MAKING IN-CONTAINING III/V SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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05/20/1997
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Application #:
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08506821
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Filing Dt:
|
07/25/1995
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|
Title:
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PROCESS MONITOR FOR CMOS INTEGRATED CIRCUITS
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|
|
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Patent #:
|
|
Issue Dt:
|
09/09/1997
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Application #:
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08509267
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Filing Dt:
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07/31/1995
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Title:
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APPARATUS FOR DETERMINING THE THERMAL RESISTIVITY OF ELECTRICALLY INSULATING CRYSTALLINE MATERIALS
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Patent #:
|
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Issue Dt:
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09/23/1997
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Application #:
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08511845
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Filing Dt:
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08/07/1995
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Title:
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PROCESS FOR REDUCING TRANSIENT DIFFUSION OF DOPANT ATOMS
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Patent #:
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Issue Dt:
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01/21/1997
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Application #:
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08516368
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Filing Dt:
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08/17/1995
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Title:
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SUB-MICRON THROUGH-THE-LENS POSITIONING UTILIZING OUT OF PHASE SEGMENTED GRATINGS
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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08517479
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Filing Dt:
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08/21/1995
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Title:
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TRIANGULAR SEMICONDUCTOR "AND" GATE DEVICE
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Patent #:
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Issue Dt:
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06/03/1997
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Application #:
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08520058
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Filing Dt:
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08/28/1995
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Title:
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A METHOD OF FORMING A LAYER OF MATERIAL ON A WAFER
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Patent #:
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Issue Dt:
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12/17/1996
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Application #:
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08521795
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Filing Dt:
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08/31/1995
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Title:
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IMPLANTATION OF A SEMICONDUCTOR SUBSTRATE WITH CONTROLLED AMOUNT OF NOBLE GAS IONS TO REDUCE CHANNELING AND/OR DIFFUSION OF A BORON DOPANT SUBSEQUENTLY IMPLANTED INTO THE SUBSTRATE TO FORM P- LDD REGION OF A PMOS DEVICE
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Patent #:
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Issue Dt:
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01/27/1998
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Application #:
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08531115
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Filing Dt:
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09/20/1995
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Title:
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WAFER PROCESSING USING THERMAL NITRIDE ETCH MASK
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08531659
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Filing Dt:
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09/21/1995
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Title:
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HIGH SURFACE AREA TRENCHES FOR AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08531727
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Filing Dt:
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09/21/1995
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Title:
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INTEGRATED CIRCUIT DEVICE FABRICATION BY PLASMA ETCHING
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08538318
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Filing Dt:
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10/03/1995
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Title:
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PYROCHLORE BASED OXIDES WITH HIGH DIELECTRIC CONSTANT AND LOW TEMPERATURE COEFFICIENT
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08545880
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Filing Dt:
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10/20/1995
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Title:
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APPARATUS AND METHOD FOR MEASURING QUIESCENT CURRENT UTILIZING TIMESET SWITCHING
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Patent #:
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Issue Dt:
|
09/02/1997
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Application #:
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08546078
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Filing Dt:
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10/20/1995
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Title:
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APPARATUS FOR CONTROLLING A CHARGED PARTICLE BEAM AND A LITHOGRAPHIC PROCESS IN WHICH THE APPARATUS IS USED
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Patent #:
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Issue Dt:
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03/25/1997
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Application #:
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08546921
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Filing Dt:
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10/23/1995
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Title:
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PROCESS AND STRUCTURE FOR REDUCTION OF CHANNELING DURING IMPLANTATION OF SOURCE AND DRAIN REGIONS IN FORMATION OF MOS INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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12/31/1996
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Application #:
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08548533
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Filing Dt:
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10/26/1995
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Title:
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FIELD EMISSION DEVICE AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
|
06/03/1997
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Application #:
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08550879
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Filing Dt:
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10/31/1995
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Title:
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AUXILIARY MASK FEATURES FOR ENHANCING THE RESOLUTION OF PHOTOLITHOGRAPHY
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Patent #:
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Issue Dt:
|
09/23/1997
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Application #:
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08552461
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Filing Dt:
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11/09/1995
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Title:
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PROCESS FOR MAKING INTEGRATED CIRCUIT STRUCTURE COMPRISING LOCAL AREA INTERCONNECTS FORMED OVER SEMICONDUCTOR SUBSTRATE BY SELECTIVE DEPOSITION ON SEED LAYER IN PATTERNED TRENCH
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08552998
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Filing Dt:
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11/03/1995
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Title:
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ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
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|
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Patent #:
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Issue Dt:
|
08/05/1997
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Application #:
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08553118
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Filing Dt:
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11/07/1995
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Title:
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METHOD AND APPARATUS FOR REAL TIME MONITORING OF WAFER ATTRIBUTES IN A PLASMA ETCH PROCESS
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|
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Patent #:
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Issue Dt:
|
03/23/1999
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Application #:
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08554501
|
Filing Dt:
|
11/07/1995
|
|
Title:
|
METHOD OF GLOBAL PLANARIZATION IN FABRICATING INTEGRATED CIRCUIT DEVICES
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Patent #:
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|
Issue Dt:
|
04/28/1998
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Application #:
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08557721
|
Filing Dt:
|
11/13/1995
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|
Title:
|
PROCESS FOR FORMING LOW DIELECTRIC CONSTANT LAYERS USING FULLERENES
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|
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Patent #:
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Issue Dt:
|
04/28/1998
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Application #:
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08560671
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Filing Dt:
|
11/20/1995
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Title:
|
ELECTROSTATIC PROTECTION DEVICES FOR PROTECTING SEMICONDUCTOR INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
|
06/30/1998
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Application #:
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08562235
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Filing Dt:
|
11/21/1995
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Title:
|
BIPOLAR TRANSISTOR WITH MOS-CONTROLLED PROTECTION FOR REVERSE-BIASED EMITTER-BASED JUNCTION
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Patent #:
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Issue Dt:
|
11/18/1997
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Application #:
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08565286
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Filing Dt:
|
11/30/1995
|
|
Title:
|
INTEGRATED CIRCUIT FABRICATION
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/15/1997
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Application #:
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08566766
|
Filing Dt:
|
12/04/1995
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|
Title:
|
METHOD OF DEPOSITING THIN PASSIVATING FILM ON MICROMINIATURE SEMICONDUCTOR DEVICES
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|
|
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Patent #:
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Issue Dt:
|
05/20/1997
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Application #:
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08567952
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Filing Dt:
|
12/06/1995
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|
Title:
|
MICROELECTRONIC INTEGRATED CIRCUIT INCLUDING TRIANGULAR SEMICONDUCTOR "AND" GATE DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
11/11/1997
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Application #:
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08569025
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Filing Dt:
|
12/07/1995
|
|
Title:
|
TITANIUM SILICIDE PROCESS
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|
|
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Patent #:
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|
Issue Dt:
|
04/29/1997
|
Application #:
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08570906
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Filing Dt:
|
12/12/1995
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Title:
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ACOUSTIC ANALYSIS OF GAS MIXTURES
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Patent #:
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Issue Dt:
|
04/29/1997
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Application #:
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08572196
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Filing Dt:
|
12/14/1995
|
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Title:
|
COMPLEMENTARY TFT DEVICES WITH DIODE-EFFECT ELIMINATION MEANS INDEPENDENT OF TFT-CHANNEL GEOMETRY
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|
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Patent #:
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Issue Dt:
|
07/07/1998
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Application #:
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08578118
|
Filing Dt:
|
12/27/1995
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|
Title:
|
METHOF OF FORMING A HIGH ELECTROMIGRATION RESISTANT METALLIZATION SYSTEM
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|
|
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Patent #:
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|
Issue Dt:
|
11/11/1997
|
Application #:
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08578743
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
PROCESS MONITOR FOR CMOS INTEGRATED CIRCUITS
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|
|
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Patent #:
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|
Issue Dt:
|
07/15/1997
|
Application #:
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08578746
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
SENSING DEVICE FOR CAPTURING A LIGHT IMAGE
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|
|
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|
Patent #:
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|
Issue Dt:
|
09/21/1999
|
Application #:
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08579383
|
Filing Dt:
|
12/27/1995
|
|
Title:
|
METHOD FOR IMPROVEMENT OF TIN CVD FILM QUALITY
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|
|
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Patent #:
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|
Issue Dt:
|
04/06/1999
|
Application #:
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08586412
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
REDUCTION IN DAMAGE TO OPTICAL ELEMENTS USED IN OPTICAL LITHOGRAPHY FOR DEVICE FABRICATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/24/2002
|
Application #:
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08587061
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
TRANSISTOR FABRICATION METHOD
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/14/1998
|
Application #:
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08595543
|
Filing Dt:
|
02/02/1996
|
|
Title:
|
ARTICLES COMPRISING MAGNETICALLY SOFT THIN FILMS AND METHODS FOR MAKING SUCH ARTICLES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/18/1997
|
Application #:
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08604867
|
Filing Dt:
|
02/14/1996
|
|
Title:
|
METHOD FOR FORMING COMPOSITE TRENCH-FIN CAPACITORS FOR DRAMS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/20/1997
|
Application #:
|
08612337
|
Filing Dt:
|
03/06/1996
|
|
Title:
|
METHOD OF MAKING COMBINED JFET & MOS TRANSISTOR DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/18/1998
|
Application #:
|
08613161
|
Filing Dt:
|
03/08/1996
|
|
Title:
|
GUARD RINGS TO COMPENSATE FOR SIDE LOBE RINGING IN ATTENUATED PHASE SHIFT RETICLES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/1997
|
Application #:
|
08615437
|
Filing Dt:
|
03/14/1996
|
|
Title:
|
PLASMA CLEAN WITH HYDROGEN GAS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08620964
|
Filing Dt:
|
03/22/1996
|
|
Title:
|
PROCESS FOR FORMING ISOLATION REGIONS IN AN INTEGRATED CIRCUIT
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|
