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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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07377168
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Filing Dt:
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07/10/1989
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Title:
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METHOD FOR READING NON-VOLATLILE FERROELECTRIC CAPACITOR MEMORY CELL
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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07443018
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Filing Dt:
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11/29/1989
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Title:
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NON-VOLATILE MEMORY CIRCUIT USING FERROELECTRIC CAPACITOR STORAGE ELEMENT
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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09790159
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Filing Dt:
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02/20/2001
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Title:
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METHOD AND CIRCUIT FOR SETUP AND HOLD DETECT PASS-FAIL TEST MODE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09846119
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Filing Dt:
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04/30/2001
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Title:
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METHOD OF MAKING A PLANARIZED SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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09941370
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Filing Dt:
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08/28/2001
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Title:
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FLASH MEMORY DEVICE AND A METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10072164
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Filing Dt:
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02/07/2002
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Title:
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DUAL-DAMASCENE PROCESS AND ASSOCIATED FLOATING METAL STRUCTURES
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10091767
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Filing Dt:
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03/07/2002
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Title:
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PASSWORD AND DYNAMIC PROTECTION OF FLASH MEMORY DATA
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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10097674
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Filing Dt:
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03/14/2002
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Title:
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POLY/SILICIDE STACK AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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10/12/2004
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Application #:
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10109234
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Filing Dt:
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03/27/2002
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Title:
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LINER FOR SEMICONDUCTOR MEMORIES AND MANUFACTURING METHOD THEREFOR
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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10109235
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Filing Dt:
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03/27/2002
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Title:
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MEMORY WORDLINE HARD MASK
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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10109516
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Filing Dt:
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03/27/2002
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Title:
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METHOD OF MAKING MEMORY WORDLINE HARD MASK EXTENSION
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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10114535
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Filing Dt:
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04/01/2002
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Title:
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FERROELECTRIC MEMORY WITH BIT-PLATE PARALLEL ARCHITECTURE AND OPERATING METHOD THEREOF
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10117818
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Filing Dt:
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04/08/2002
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Title:
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PRECISION HIGH-K INTERGATE DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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10118732
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Filing Dt:
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04/08/2002
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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MEMORY MANUFACTURING PROCESS WITH BITLINE ISOLATION
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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10119273
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Filing Dt:
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04/08/2002
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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REFRESH SCHEME FOR DYNAMIC PAGE PROGRAMMING
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10119366
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Filing Dt:
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04/08/2002
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Title:
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ERASE METHOD FOR A DUAL BIT MEMORY CELL
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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10119391
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Filing Dt:
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04/08/2002
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Title:
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ALGORITHM DYNAMIC REFERENCE PROGRAMMING
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Patent #:
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Issue Dt:
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12/05/2006
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Application #:
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10124773
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Filing Dt:
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04/16/2002
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Title:
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HIDING REFRESH IN 1T-SRAM ARCHITECTURE
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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10126207
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Filing Dt:
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04/19/2002
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Title:
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USING A FIRST LINER LAYER AS A SPACER IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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10128771
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Filing Dt:
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04/22/2002
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Title:
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SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10136034
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Filing Dt:
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04/29/2002
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Publication #:
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Pub Dt:
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10/30/2003
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Title:
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SYSTEM FOR CONTROL OF PRE-CHARGE LEVELS IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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10150204
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Filing Dt:
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05/15/2002
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Title:
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SELF-ALIGNED POLYSILICON POLISH
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10150255
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Filing Dt:
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05/15/2002
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Title:
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METHOD AND SYSTEM FOR SCALING NONVOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10163970
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Filing Dt:
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06/06/2002
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Title:
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IN SITU HARD MASK APPROACH FOR SELF-ALIGNED CONTACT ETCH
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Patent #:
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Issue Dt:
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03/20/2007
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Application #:
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10184336
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Filing Dt:
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06/26/2002
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Title:
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PROTECTION OF A LOW-K DIELECTRIC IN A PASSIVATION LEVEL
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10190002
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Filing Dt:
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07/03/2002
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Title:
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METHOD FOR SEMICONDUCTOR WAFER PLANARIZATION BY ISOLATION MATERIAL GROWTH
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10197116
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Filing Dt:
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07/16/2002
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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SYSTEM FOR USING A DYNAMIC REFERENCE IN A DOUBLE-BIT CELL MEMORY
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10210378
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Filing Dt:
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07/31/2002
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Title:
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SYSTEM AND METHOD FOR ERASE VOLTAGE CONTROL DURING MULTIPLE SECTOR ERASE OF A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10217403
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Filing Dt:
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08/14/2002
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Title:
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REFLOWABLE-DOPED HDP FILM
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10217821
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Filing Dt:
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08/12/2002
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Title:
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SALICIDED GATE FOR VIRTUAL GROUND ARRAYS
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10223920
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Filing Dt:
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08/20/2002
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Title:
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MEMORY DEVICE AND METHOD OF MAKING
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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10226912
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Filing Dt:
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08/22/2002
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Publication #:
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Pub Dt:
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02/26/2004
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Title:
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PRECHARGING SCHEME FOR READING A MEMORY CELL
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10241236
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Filing Dt:
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09/11/2002
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Title:
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LOW-K DIELECTRIC LAYER WITH AIR GAPS
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10243315
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Filing Dt:
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09/12/2002
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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SYSTEM AND METHOD FOR Y-DECODING IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10243792
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Filing Dt:
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09/12/2002
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Title:
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METHOD AND SYSTEM TO MINIMIZE PAGE PROGRAMMING TIME FOR FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10245146
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Filing Dt:
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09/16/2002
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Title:
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REFERENCE CELL WITH VARIOUS LOAD CIRCUITS COMPENSATING FOR SOURCE SIDE LOADING EFFECTS IN A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10251623
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Filing Dt:
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09/20/2002
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Title:
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AUTOMATIC BACKUP AND RETRIEVAL OF DATA BETWEEN VOLATILE AND NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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10277395
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Filing Dt:
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10/22/2002
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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SHALLOW TRENCH ISOLATION APPROACH FOR IMPROVED STI CORNER ROUNDING
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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10292121
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Filing Dt:
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11/12/2002
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Title:
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FABRICATION OF SHALLOW TRENCH ISOLATION STRUCTURES WITH ROUNDED CORNER AND SELF-ALIGNED GATE
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10302672
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Filing Dt:
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11/22/2002
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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CASCODE AMPLIFIER CIRCUIT FOR PRODUCING A FAST, STABLE AND ACCURATE BIT LINE VOLTAGE
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10305700
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Filing Dt:
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11/26/2002
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Title:
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METHOD AND SYSTEM FOR DEFINING A REDUNDANCY WINDOW AROUND A PARTICULAR COLUMN IN A MEMORY ARRAY
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10305750
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Filing Dt:
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11/26/2002
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Title:
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METHOD OF PROTECTING A MEMORY ARRAY FROM CHARGE DAMAGE DURING FABRICATION
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10306252
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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09/02/2004
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Title:
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METHOD AND SYSTEM FOR ERASING A NITRIDE MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10306529
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Filing Dt:
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11/27/2002
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Title:
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METHOD FOR FABRICATING NITRIDE MEMORY CELLS USING A FLOATING GATE FABRICATION PROCESS
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10307189
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Filing Dt:
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11/29/2002
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Title:
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MEMORY WITH IMPROVED CHARGE-TRAPPING DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10307667
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Filing Dt:
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12/02/2002
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Title:
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SYSTEM FOR PROGRAMMING A NON-VOLATILE MEMORY CELL
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10313444
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Filing Dt:
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12/05/2002
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Title:
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CIRCUIT FOR ACCURATE MEMORY READ OPERATIONS
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10313454
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Filing Dt:
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12/05/2002
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Title:
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STRUCTURE AND METHOD FOR REDUCING CHARGE LOSS IN A MEMORY CELL
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10314381
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Filing Dt:
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12/06/2002
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Title:
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DEUTERIUM INCORPORATED NITRIDE
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10315458
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Filing Dt:
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12/09/2002
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Title:
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DISCONTINUOUS NITRIDE STRUCTURE FOR NON-VOLATILE TRANSISTORS
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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10342549
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Filing Dt:
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01/15/2003
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Title:
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DIELECTRIC MEMORY CELL STRUCTURE WITH COUNTER DOPED CHANNEL REGION
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10342585
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Filing Dt:
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01/14/2003
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Title:
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FLASH MEMORY CELL PROGRAMMING METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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10353558
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Filing Dt:
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01/29/2003
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Title:
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METHOD FOR READING A NON-VOLATILE MEMORY CELL ADJACENT TO AN INACTIVE REGION OF A NON-VOLATILE MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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10356495
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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08/28/2003
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE PROGRAMMING SECOND DYNAMIC REFERENCE CELL ACCORDING TO THRESHOLD VALUE OF FIRST DYNAMIC REFERENCE CELL
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10356496
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF READING OUT DATA
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10358498
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Filing Dt:
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02/04/2003
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Title:
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COMPENSATED OSCILLATOR CIRCUIT FOR CHARGE PUMPS
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10358866
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Filing Dt:
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02/05/2003
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Title:
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PERFORMANCE IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10361378
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Filing Dt:
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02/10/2003
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Title:
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SELECTION CIRCUIT FOR ACCURATE MEMORY READ OPERATIONS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10379744
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Filing Dt:
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03/05/2003
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Title:
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FAST BANDGAP REFERENCE CIRCUIT FOR USE IN A LOW POWER SUPPLY A/D BOOSTER
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10379885
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Filing Dt:
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03/05/2003
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10382726
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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CHARGE-TRAPPING MEMORY ARRAYS RESISTANT TO DAMAGE FROM CONTACT HOLE FORMATION
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10382731
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Filing Dt:
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03/05/2003
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Title:
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MEMORY ARRAY HAVING SHALLOW BIT LINE WITH SILICIDE CONTACT PORTION AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10382744
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Filing Dt:
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03/05/2003
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Title:
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METHOD OF FORMING CORE AND PERIPHERY GATES INCLUDING TWO CRITICAL MASKING STEPS TO FORM A HARD MASK IN A CORE REGION THAT INCLUDES A CRITICAL DIMENSION LESS THAN ACHIEVABLE AT A RESOLUTION LIMIT OF LITHOGRAPHY
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10387064
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Filing Dt:
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03/11/2003
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10387427
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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10/23/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10387617
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Filing Dt:
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03/13/2003
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Title:
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CIRCUIT FOR FAST AND ACCURATE MEMORY READ OPERATIONS
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10392912
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY THAT IS BASED ON A VIRTUAL GROUND METHOD
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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10394565
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Filing Dt:
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03/21/2003
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Title:
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ALIGNMENT SYSTEM FOR PLANAR CHARGE TRAPPING DIELECTRIC MEMORY CELL LITHOGRAPHY
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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10404941
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Filing Dt:
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03/31/2003
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Title:
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BIT-LINE SHIELDING METHOD FOR FERROELECTRIC MEMORIES
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10406415
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Filing Dt:
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04/03/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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FAST, ACCURATE AND LOW POWER SUPPLY VOLTAGE BOOSTER USING A/D CONVERTER
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10413800
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Filing Dt:
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04/15/2003
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Publication #:
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Pub Dt:
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10/21/2004
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Title:
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METHOD OF PROGRAMMING DUAL CELL MEMORY DEVICE TO STORE MULTIPLE DATA STATES PER CELL
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10422090
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Filing Dt:
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04/24/2003
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Title:
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METHOD OF CONTROLLING PROGRAM THRESHOLD VOLTAGE DISTRIBUTION OF A DUAL CELL MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10422092
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Filing Dt:
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04/24/2003
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Title:
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METHOD OF DUAL CELL MEMORY DEVICE OPERATION FOR IMPROVED END-OF-LIFE READ MARGIN
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10429140
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Filing Dt:
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05/03/2003
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Title:
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STRUCTURE AND METHOD FOR A TWO-BIT MEMORY CELL
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10429150
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Filing Dt:
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05/03/2003
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Title:
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METHOD FOR REDUCING SHORT CHANNEL EFFECTS IN MEMORY CELLS AND RELATED STRUCTURE
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10431065
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Filing Dt:
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05/06/2003
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Title:
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METHOD TO OBTAIN TEMPERATURE INDEPENDENT PROGRAM THRESHOLD VOLTAGE DISTRIBUTION USING TEMPERATURE DEPENDENT VOLTAGE REFERENCE
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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10431320
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Filing Dt:
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05/06/2003
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Title:
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NON-VOLATILE MEMORY READ CIRCUIT WITH END OF LIFE SIMULATION
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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10431321
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Filing Dt:
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05/06/2003
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Title:
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A METHOD FOR MANUFACTURING A DOUBLE BITLINE IMPLANT
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10454630
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Filing Dt:
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06/05/2003
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Publication #:
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Pub Dt:
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11/06/2003
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Title:
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NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND DATA ERASING METHOD
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10455310
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Filing Dt:
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06/06/2003
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Publication #:
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Pub Dt:
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12/09/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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10600065
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Filing Dt:
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06/20/2003
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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MEMORY WITH A CORE-BASED VIRTUAL GROUND AND DYNAMIC REFERENCE SENSING SCHEME
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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10609159
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Filing Dt:
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06/27/2003
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Title:
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APPARATUS AND METHOD FOR A METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SOURCE SIDE PUNCH-THROUGH PROTECTION IMPLANT
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10617450
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
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01/13/2005
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Title:
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UNDOPED OXIDE LINER/BPSG FOR IMPROVED DATA RETENTION
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10631812
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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NONVOLATILE MEMORY HAVING A TRAP LAYER
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10633535
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A PLURALITY OF BLOCKS AND A SENSING CIRCUIT PROVIDED IN EACH OF THE BLOCKS FOR
COMPARING DATA WITH A REFERENCE SIGNAL HAVING A LOAD IMPOSED
THEREON
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10635089
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Filing Dt:
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08/06/2003
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Title:
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MEMORY DEVICE AND METHOD OF SIMULTANEOUS FABRICATION OF CORE AND PERIPHERY OF SAME
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10635781
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Filing Dt:
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08/06/2003
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Title:
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MEMORY DEVICE HAVING SILICIDED BITLINES AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10635974
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Filing Dt:
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08/07/2003
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Title:
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MEMORY CIRCUIT FOR PROVIDING WORD LINE REDUNDANCY IN A MEMORY SECTOR
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10636336
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Filing Dt:
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08/06/2003
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Title:
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STRUCTURE AND METHOD TO REDUCE DRAIN INDUCED BARRIER LOWERING
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10636337
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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LOW POWER CHARGE PUMP
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10652035
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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MEMORY CIRCUIT WITH REDUNDANT CONFIGURATION
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10654739
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Filing Dt:
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09/03/2003
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Title:
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PATTERNING FOR ELONGATED VSS CONTACT ON FLASH MEMORY
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10658428
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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SEMICONDUCTOR MEMORY ENABLING CORRECT SUBSTITUTION OF REDUNDANT CELL ARRAY
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10672093
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Filing Dt:
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09/26/2003
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10677031
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10677073
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10677790
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Filing Dt:
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10/02/2003
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Publication #:
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Pub Dt:
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04/07/2005
| | | | |
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Title:
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MEMORY DEVICE AND METHOD USING POSITIVE GATE STRESS TO RECOVER OVERERASED CELL
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10678446
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Filing Dt:
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10/03/2003
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Title:
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EFFICIENT AND ACCURATE SENSING CIRCUIT AND TECHNIQUE FOR LOW VOLTAGE FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10701780
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Filing Dt:
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11/05/2003
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Title:
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METHOD AND STRUCTURE FOR PROTECTING NROM DEVICES FROM INDUCED CHARGE DAMAGE DURING DEVICE FABRICATION
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10708379
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
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Title:
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METHOD AND APPARATUS FOR IMPROVING CYCLE TIME IN A QUAD DATA RATE SRAM DEVICE
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