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Reel/Frame:059721/0467   Pages: 54
Recorded: 04/15/2022
Attorney Dkt #:CYPRESS TO IFXLLC
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 668
Page 3 of 7
Pages: 1 2 3 4 5 6 7
1
Patent #:
Issue Dt:
12/22/2009
Application #:
11336464
Filing Dt:
01/20/2006
Title:
FAST RAIL-TO-RAIL VOLTAGE COMPARATOR AND METHOD FOR RAIL-TO-RAIL VOLTAGE COMPARISON
2
Patent #:
Issue Dt:
04/13/2010
Application #:
11339352
Filing Dt:
01/25/2006
Publication #:
Pub Dt:
08/03/2006
Title:
STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING STACKED TYPE SEMICONDUCTOR DEVICE
3
Patent #:
Issue Dt:
10/21/2008
Application #:
11340916
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
06/08/2006
Title:
METHOD OF DETERMINING VOLTAGE COMPENSATION FOR FLASH MEMORY DEVICES
4
Patent #:
Issue Dt:
10/07/2008
Application #:
11341029
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
09/21/2006
Title:
METHOD AND APPARATUS FOR ADDRESS ALLOTTING AND VERIFICATION IN A SEMICONDUCTOR DEVICE
5
Patent #:
Issue Dt:
01/03/2012
Application #:
11350556
Filing Dt:
02/09/2006
Title:
SWITCHABLE MEMORY DIODES BASED ON FERROELECTRIC/CONJUGATED POLYMER HETEROSTRUCTURES AND/OR THEIR COMPOSITES
6
Patent #:
Issue Dt:
06/05/2007
Application #:
11358206
Filing Dt:
02/22/2006
Publication #:
Pub Dt:
05/10/2007
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE PERFORMING ERASE OPERATION THAT CREATES NARROW THRESHOLD DISTRIBUTION
7
Patent #:
Issue Dt:
11/18/2008
Application #:
11368678
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
07/06/2006
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
8
Patent #:
Issue Dt:
06/03/2008
Application #:
11371023
Filing Dt:
03/09/2006
Title:
OXYGEN ELIMINATION FOR DEVICE PROCESSING
9
Patent #:
Issue Dt:
01/22/2008
Application #:
11378444
Filing Dt:
03/16/2006
Publication #:
Pub Dt:
10/12/2006
Title:
MEMORY DEVICE AND CONTROL METHOD THEREFOR
10
Patent #:
Issue Dt:
10/19/2010
Application #:
11378464
Filing Dt:
03/16/2006
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
11
Patent #:
Issue Dt:
12/08/2009
Application #:
11398415
Filing Dt:
04/05/2006
Publication #:
Pub Dt:
10/11/2007
Title:
FLASH MEMORY PROGRAMMING AND VERIFICATION WITH REDUCED LEAKAGE CURRENT
12
Patent #:
Issue Dt:
07/01/2008
Application #:
11399130
Filing Dt:
04/05/2006
Publication #:
Pub Dt:
10/25/2007
Title:
METHODS FOR ERASING AND PROGRAMMING MEMORY DEVICES
13
Patent #:
Issue Dt:
12/01/2009
Application #:
11414082
Filing Dt:
04/27/2006
Publication #:
Pub Dt:
03/01/2007
Title:
SEMICONDUCTOR DEVICE WITH REDUCED TRANSISTOR BREAKDOWN VOLTAGE FOR PREVENTING SUBSTRATE JUNCTION CURRENTS
14
Patent #:
Issue Dt:
09/16/2008
Application #:
11415694
Filing Dt:
05/01/2006
Title:
DEVICE AND METHOD FOR SENSING PROGRAMMING STATUS OF NON-VOLATILE MEMORY ELEMENTS
15
Patent #:
Issue Dt:
03/04/2008
Application #:
11416551
Filing Dt:
05/03/2006
Title:
METHOD FOR DETERMINING WORDLINE CRITICAL DIMENSION IN A MEMORY ARRAY AND RELATED STRUCTURE
16
Patent #:
Issue Dt:
03/18/2008
Application #:
11423638
Filing Dt:
06/12/2006
Publication #:
Pub Dt:
12/20/2007
Title:
METHOD AND APPARATUS FOR HIGH VOLTAGE OPERATION FOR A HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICE
17
Patent #:
Issue Dt:
12/25/2007
Application #:
11426165
Filing Dt:
06/23/2006
Publication #:
Pub Dt:
11/02/2006
Title:
CIRCUIT FOR GENERATING A CENTERED REFERENCE VOLTAGE FOR A 1T/1C FERROELECTRIC MEMORY
18
Patent #:
Issue Dt:
02/01/2011
Application #:
11478537
Filing Dt:
06/28/2006
Publication #:
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
19
Patent #:
Issue Dt:
09/29/2009
Application #:
11478554
Filing Dt:
06/28/2006
Publication #:
Pub Dt:
01/04/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
20
Patent #:
Issue Dt:
12/13/2011
Application #:
11479373
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/18/2007
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
21
Patent #:
Issue Dt:
05/22/2012
Application #:
11495116
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
02/01/2007
Title:
FLASH MEMORY DEVICE COMPRISING BIT-LINE CONTACT REGION WITH DUMMY LAYER BETWEEN ADJACENT CONTACT HOLES
22
Patent #:
Issue Dt:
01/15/2008
Application #:
11497597
Filing Dt:
08/02/2006
Publication #:
Pub Dt:
02/14/2008
Title:
RAMP GATE ERASE FOR DUAL BIT FLASH MEMORY
23
Patent #:
Issue Dt:
10/20/2009
Application #:
11501449
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
02/08/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
24
Patent #:
Issue Dt:
07/19/2011
Application #:
11509932
Filing Dt:
08/25/2006
Title:
SHALLOW TRENCH ISOLATION STRUCTURES AND METHODS FOR FORMING THE SAME
25
Patent #:
Issue Dt:
09/15/2009
Application #:
11513693
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
26
Patent #:
Issue Dt:
04/15/2008
Application #:
11518207
Filing Dt:
09/11/2006
Publication #:
Pub Dt:
11/29/2007
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, ERASE METHOD FOR SAME, AND TEST METHOD FOR SAME
27
Patent #:
Issue Dt:
06/03/2008
Application #:
11538408
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
04/10/2008
Title:
METHOD AND APPARATUS FOR SECTOR ERASE OPERATION IN A FLASH MEMORY ARRAY
28
Patent #:
Issue Dt:
08/28/2012
Application #:
11555905
Filing Dt:
11/02/2006
Title:
POLYCRYSTALLINE SILICON ACTIVATION RTA
29
Patent #:
Issue Dt:
03/19/2013
Application #:
11599926
Filing Dt:
11/14/2006
Title:
PROCESS FOR POST CONTACT-ETCH CLEAN
30
Patent #:
Issue Dt:
04/09/2013
Application #:
11608032
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/12/2008
Title:
MEMORY DEVICE PROTECTION LAYER
31
Patent #:
Issue Dt:
09/18/2007
Application #:
11611053
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
04/19/2007
Title:
IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
32
Patent #:
Issue Dt:
05/24/2011
Application #:
11612413
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
DUAL-BIT MEMORY DEVICE HAVING TRENCH ISOLATION MATERIAL DISPOSED NEAR BIT LINE CONTACT AREAS
33
Patent #:
Issue Dt:
08/17/2010
Application #:
11612863
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS
34
Patent #:
Issue Dt:
04/06/2010
Application #:
11612992
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
35
Patent #:
Issue Dt:
12/01/2009
Application #:
11613383
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
36
Patent #:
Issue Dt:
08/03/2010
Application #:
11613513
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR MEMORY COMPRISING DUAL CHARGE STORAGE NODES AND METHODS FOR ITS FABRICATION
37
Patent #:
Issue Dt:
02/23/2010
Application #:
11614048
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHODS FOR FABRICATING A SPLIT CHARGE STORAGE NODE SEMICONDUCTOR MEMORY
38
Patent #:
Issue Dt:
12/09/2008
Application #:
11615280
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
NEGATIVE WORDLINE BIAS FOR REDUCTION OF LEAKAGE CURRENT DURING FLASH MEMORY OPERATION
39
Patent #:
Issue Dt:
03/30/2010
Application #:
11615365
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
40
Patent #:
Issue Dt:
07/16/2013
Application #:
11615489
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
41
Patent #:
Issue Dt:
02/01/2011
Application #:
11616544
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
42
Patent #:
Issue Dt:
12/13/2011
Application #:
11616718
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
DUAL-BIT MEMORY DEVICE HAVING ISOLATION MATERIAL DISPOSED UNDERNEATH A BIT LINE SHARED BY ADJACENT DUAL-BIT MEMORY CELLS
43
Patent #:
Issue Dt:
07/24/2012
Application #:
11625150
Filing Dt:
01/19/2007
Publication #:
Pub Dt:
07/24/2008
Title:
FULLY ASSOCIATIVE BANKING FOR MEMORY
44
Patent #:
Issue Dt:
05/25/2010
Application #:
11634776
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
45
Patent #:
Issue Dt:
10/27/2015
Application #:
11634777
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
Barrier region underlying source/drain regions for dual-bit memory devices
46
Patent #:
Issue Dt:
11/11/2008
Application #:
11636111
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
47
Patent #:
Issue Dt:
10/13/2015
Application #:
11639666
Filing Dt:
12/15/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHOD FOR FABRICATING MEMORY CELLS HAVING SPLIT CHARGE STORAGE NODES
48
Patent #:
Issue Dt:
04/14/2009
Application #:
11644819
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS TO PROGRAM BOTH SIDES OF A NON-VOLATILE STATIC RANDOM ACCESS MEMORY
49
Patent #:
Issue Dt:
07/12/2011
Application #:
11645475
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
THIN OXIDE DUMMY TILING AS CHARGE PROTECTION
50
Patent #:
Issue Dt:
03/02/2010
Application #:
11646157
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
DEEP BITLINE IMPLANT TO AVOID PROGRAM DISTURB
51
Patent #:
Issue Dt:
08/18/2015
Application #:
11652785
Filing Dt:
01/11/2007
Title:
Shallow bipolar junction transistor
52
Patent #:
Issue Dt:
12/14/2010
Application #:
11687436
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY
53
Patent #:
Issue Dt:
09/21/2010
Application #:
11687487
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
STATE CHANGE SENSING
54
Patent #:
Issue Dt:
11/16/2010
Application #:
11687492
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
HIGH ACCURACY ADAPTIVE PROGRAMMING
55
Patent #:
Issue Dt:
10/22/2013
Application #:
11702845
Filing Dt:
02/05/2007
Publication #:
Pub Dt:
09/06/2007
Title:
DUAL STORAGE NODE MEMORY
56
Patent #:
Issue Dt:
06/03/2014
Application #:
11702846
Filing Dt:
02/05/2007
Publication #:
Pub Dt:
09/06/2007
Title:
FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTS
57
Patent #:
Issue Dt:
03/15/2011
Application #:
11711382
Filing Dt:
02/27/2007
Title:
INTERFACE APPARATUS AND METHODS OF TESTING INTEGRATED CIRCUITS USING THE SAME
58
Patent #:
Issue Dt:
06/29/2010
Application #:
11712069
Filing Dt:
02/27/2007
Title:
SELF VERIFICATION OF NON-VOLATILE MEMORY
59
Patent #:
Issue Dt:
03/27/2012
Application #:
11712299
Filing Dt:
02/27/2007
Publication #:
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR DEVICE HAVING LOWER LEAKAGE CURRENT BETWEEN SEMICONDUCTOR SUBSTRATE AND BIT LINES
60
Patent #:
Issue Dt:
06/30/2009
Application #:
11724726
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
06/26/2008
Title:
USING IMPLANTED POLY-1 TO IMPROVE CHARGING PROTECTION IN DUAL-POLY PROCESS
61
Patent #:
Issue Dt:
02/15/2011
Application #:
11724775
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
06/26/2008
Title:
USING THICK SPACER FOR BITLINE IMPLANT THEN REMOVE
62
Patent #:
Issue Dt:
09/21/2010
Application #:
11767623
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
PROCESS APPLYING DIE ATTACH FILM TO SINGULATED DIE
63
Patent #:
Issue Dt:
03/08/2011
Application #:
11803474
Filing Dt:
05/15/2007
Title:
METHOD OF FORMING BORDERLESS CONTACTS
64
Patent #:
Issue Dt:
03/08/2011
Application #:
11821653
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHOD OF CONSTRUCTING A STACKED-DIE SEMICONDUCTOR STRUCTURE
65
Patent #:
Issue Dt:
08/17/2010
Application #:
11835538
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS
66
Patent #:
Issue Dt:
09/06/2011
Application #:
11835542
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB
67
Patent #:
Issue Dt:
04/07/2009
Application #:
11841468
Filing Dt:
08/20/2007
Publication #:
Pub Dt:
02/26/2009
Title:
CMOS LOGIC COMPATIBLE NON-VOLATILE MEMORY CELL STRUCTURE, OPERATION, AND ARRAY CONFIGURATION
68
Patent #:
Issue Dt:
04/10/2012
Application #:
11860245
Filing Dt:
09/24/2007
Title:
SEMICONDUCTOR TOPOGRAPHY AND METHOD FOR REDUCING GATE INDUCED DRAIN LEAKAGE (GIDL) IN MOS TRANSISTORS
69
Patent #:
Issue Dt:
02/02/2010
Application #:
11874076
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT
70
Patent #:
Issue Dt:
07/20/2010
Application #:
11895901
Filing Dt:
08/28/2007
Publication #:
Pub Dt:
03/05/2009
Title:
METHOD AND STRUCTURE OF MINIMIZING MOLD BLEEDING ON A SUBSTRATE SURFACE OF A SEMICONDUCTOR PACKAGE
71
Patent #:
Issue Dt:
02/08/2011
Application #:
11924169
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SPLIT CHARGE STORAGE NODE OUTER SPACER PROCESS
72
Patent #:
Issue Dt:
04/06/2010
Application #:
11924823
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SELECTIVE SILICIDE FORMATION USING RESIST ETCHBACK
73
Patent #:
Issue Dt:
08/07/2012
Application #:
11928434
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
ERROR CORRECTION CODING IN FLASH MEMORY DEVICES
74
Patent #:
Issue Dt:
09/09/2014
Application #:
11928865
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
NON-VOLATILE MEMORY ARRAY PARTITIONING ARCHITECTURE AND METHOD TO UTILIZE SINGLE LEVEL CELLS AND MULTI-LEVEL CELLS WITHIN THE SAME MEMORY
75
Patent #:
Issue Dt:
08/03/2010
Application #:
11929097
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
CONTROL OF TEMPERATURE SLOPE FOR BAND GAP REFERENCE VOLTAGE IN A MEMORY DEVICE
76
Patent #:
Issue Dt:
08/09/2011
Application #:
11929761
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MEMORY ARRAY OF PAIRS OF NONVOLATILE MEMORY CELLS USING FOWLER-NORDHEIM PROGRAMMING AND ERASING
77
Patent #:
Issue Dt:
11/18/2008
Application #:
11931992
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
02/28/2008
Title:
FLASH MEMORY DEVICE HAVING IMPROVED PROGRAM RATE
78
Patent #:
Issue Dt:
11/03/2009
Application #:
11935049
Filing Dt:
11/05/2007
Publication #:
Pub Dt:
05/07/2009
Title:
DECODING SYSTEM CAPABLE OF REDUCING SECTOR SELECT AREA OVERHEAD FOR FLASH MEMORY
79
Patent #:
Issue Dt:
10/05/2010
Application #:
11935717
Filing Dt:
11/06/2007
Publication #:
Pub Dt:
05/07/2009
Title:
CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY
80
Patent #:
Issue Dt:
07/19/2011
Application #:
11945316
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
05/28/2009
Title:
SPI AUTO-BOOT MODE
81
Patent #:
Issue Dt:
11/30/2010
Application #:
11947424
Filing Dt:
11/29/2007
Publication #:
Pub Dt:
06/04/2009
Title:
WEAVABLE FIBER PHOTOVOLTAIC COLLECTORS
82
Patent #:
Issue Dt:
11/03/2009
Application #:
11950811
Filing Dt:
12/05/2007
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD AND APPARATUS FOR HIGH VOLTAGE OPERATION FOR A HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICE
83
Patent #:
Issue Dt:
05/24/2011
Application #:
11951262
Filing Dt:
12/05/2007
Publication #:
Pub Dt:
06/11/2009
Title:
CIRCUIT PRE-CHARGE TO SENSE A MEMORY LINE
84
Patent #:
Issue Dt:
06/29/2010
Application #:
11956032
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
06/18/2009
Title:
PROGRAMMING IN MEMORY DEVICES USING SOURCE BITLINE VOLTAGE BIAS
85
Patent #:
Issue Dt:
05/31/2011
Application #:
11957737
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
06/18/2009
Title:
SI TRENCH BETWEEN BITLINE HDP FOR BVDSS IMPROVEMENT
86
Patent #:
Issue Dt:
05/21/2013
Application #:
11961750
Filing Dt:
12/20/2007
Publication #:
Pub Dt:
04/24/2008
Title:
OXIDE-NITRIDE STACK GATE DIELECTRIC
87
Patent #:
Issue Dt:
01/20/2015
Application #:
11961772
Filing Dt:
12/20/2007
Publication #:
Pub Dt:
06/25/2009
Title:
EXTENDING FLASH MEMORY DATA RETENSION VIA REWRITE REFRESH
88
Patent #:
Issue Dt:
09/04/2012
Application #:
11963078
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/25/2009
Title:
SYSTEM AND METHOD FOR OPTIMIZED ERROR CORRECTION IN FLASH MEMORY ARRAYS
89
Patent #:
Issue Dt:
07/22/2014
Application #:
11963200
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/25/2009
Title:
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90
Patent #:
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12/07/2010
Application #:
11963400
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
08/14/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
91
Patent #:
Issue Dt:
03/16/2010
Application #:
11963508
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/25/2009
Title:
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92
Patent #:
Issue Dt:
06/19/2012
Application #:
11971331
Filing Dt:
01/09/2008
Publication #:
Pub Dt:
07/09/2009
Title:
LOW-H PLASMA TREATMENT WITH N2 ANNEAL FOR ELECTRONIC MEMORY DEVICES
93
Patent #:
Issue Dt:
09/07/2010
Application #:
11972312
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
NON-VOLATILE MEMORY DEVICE AND METHODS OF USING
94
Patent #:
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11/22/2011
Application #:
11974295
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
04/24/2008
Title:
IMPROVED ORNAND FLASH MEMORY AND METHOD FOR CONTROLLING THE SAME
95
Patent #:
Issue Dt:
03/03/2009
Application #:
11985427
Filing Dt:
11/15/2007
Publication #:
Pub Dt:
03/20/2008
Title:
SENSE AMPLIFIERS WITH HIGH VOLTAGE SWING
96
Patent #:
Issue Dt:
01/17/2012
Application #:
11985961
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
05/21/2009
Title:
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97
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11/16/2010
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11986331
Filing Dt:
11/20/2007
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Pub Dt:
06/19/2008
Title:
NONVOLATILE STORAGE DEVICE AND CONTROL METHOD THEREOF
98
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12/29/2009
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11986509
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
06/19/2008
Title:
HIGH SPEED CASCODE CIRCUIT WITH LOW POWER CONSUMPTION
99
Patent #:
Issue Dt:
12/16/2008
Application #:
11998948
Filing Dt:
12/03/2007
Publication #:
Pub Dt:
04/17/2008
Title:
SRAM VOLTAGE CONTROL FOR IMPROVED OPERATIONAL MARGINS
100
Patent #:
Issue Dt:
03/08/2011
Application #:
12004919
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
07/03/2008
Title:
SEMICONDUCTOR DEVICE, METHOD OF CONTROLLING THE SAME, AND METHOD OF MANUFACTURING THE SAME
Assignor
1
Exec Dt:
03/15/2020
Assignee
1
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

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