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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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13769398
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Filing Dt:
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02/18/2013
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Title:
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MEMORY DEVICE WITH SOURCE-SIDE SENSING
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Patent #:
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Issue Dt:
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04/15/2014
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Application #:
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13771043
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Filing Dt:
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02/19/2013
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13776310
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Filing Dt:
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02/25/2013
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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FABRICATING METHOD OF MIRROR BIT MEMORY DEVICE HAVING SPLIT ONO FILM WITH TOP OXIDE FILM FORMED BY OXIDATION PROCESS
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Patent #:
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Issue Dt:
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03/11/2014
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Application #:
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13776337
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Filing Dt:
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02/25/2013
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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FABRICATING METHOD OF MIRROR BIT MEMORY DEVICE HAVING SPLIT ONO FILM WITH TOP OXIDE FILM FORMED BY OXIDATION PROCESS
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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13786216
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Filing Dt:
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03/05/2013
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Publication #:
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Pub Dt:
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08/01/2013
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Title:
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A CHARGE STORAGE DEVICE FOR DETECTING ALPHA PARTICLES
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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13790979
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Filing Dt:
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03/08/2013
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Publication #:
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Pub Dt:
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09/11/2014
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Title:
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PIPELINING IN A MEMORY
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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13795036
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Filing Dt:
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03/12/2013
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Title:
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NONVOLATILE MEMORY CELLS AND METHODS OF MAKING SUCH CELLS
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Patent #:
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Issue Dt:
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10/28/2014
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Application #:
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13795134
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Filing Dt:
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03/12/2013
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Title:
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DATA FORWARDING CIRCUITS AND METHODS FOR MEMORY DEVICES WITH WRITE LATENCY
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Patent #:
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Issue Dt:
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09/20/2016
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Application #:
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13856313
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Filing Dt:
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04/03/2013
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Publication #:
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Pub Dt:
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10/09/2014
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Title:
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MODIFIED LOCAL SEGMENTED SELF-BOOSTING OF MEMORY CELL CHANNELS
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Patent #:
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Issue Dt:
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09/30/2014
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Application #:
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13856816
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Filing Dt:
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04/04/2013
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Title:
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Erase verification circuitry for simultaneously and consecutively verifying a plurality of odd and even-numbered flash memory transistors and method thereof
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Patent #:
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Issue Dt:
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12/16/2014
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Application #:
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13865714
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Filing Dt:
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04/18/2013
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Publication #:
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Pub Dt:
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10/23/2014
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Title:
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Die Seal Layout for VFTL Dual Damascene in a Semiconductor Device
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Patent #:
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Issue Dt:
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04/04/2017
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Application #:
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13867618
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Filing Dt:
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04/22/2013
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Publication #:
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Pub Dt:
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10/23/2014
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Title:
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CHARGE-TRAP NOR WITH SILICON-RICH NITRIDE AS A CHARGE TRAP LAYER
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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13913909
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Filing Dt:
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06/10/2013
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Publication #:
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Pub Dt:
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12/11/2014
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Title:
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Programmable Latency Count to Achieve Higher Memory Bandwidth
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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13917141
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Filing Dt:
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06/13/2013
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Publication #:
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Pub Dt:
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12/18/2014
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Title:
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Screening for Reference Cells in a Memory
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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13920742
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Filing Dt:
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06/18/2013
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Publication #:
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Pub Dt:
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10/24/2013
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Title:
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FLASH MEMORY DEVICES AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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13921056
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Filing Dt:
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06/18/2013
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Title:
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NVSRAM WITH INVERTED RECALL
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Patent #:
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Issue Dt:
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01/19/2016
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Application #:
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13924292
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Filing Dt:
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06/21/2013
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Title:
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METHOD MINIMIZING IMPRINT THROUGH PACKAGING OF F-RAM
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13949116
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
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04/10/2014
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Title:
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MEMORY CELL ARRAY LATCHUP PREVENTION
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13964958
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Filing Dt:
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08/12/2013
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Publication #:
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Pub Dt:
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02/06/2014
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Title:
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APPARATUS AND METHOD FOR A METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SOURCE SIDE PUNCH-THROUGH PROTECTION IMPLANT
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Patent #:
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Issue Dt:
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05/20/2014
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Application #:
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14010134
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Filing Dt:
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08/26/2013
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Publication #:
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Pub Dt:
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03/27/2014
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Title:
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METHOD FOR FABRICATING A DAMASCENE SELF-ALIGNED FERRORELECTRIC RANDOM ACCESS MEMORY (F-RAM) WITH SIMULTANEOUS FORMATION OF SIDEWALL FERROELECTRIC CAPACITORS
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14010174
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Filing Dt:
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08/26/2013
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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METHOD FOR FABRICATING A DAMASCENE SELF-ALIGNED FERRORELECTRIC RANDOM ACCESS MEMORY (F-RAM) HAVING A FERROELECTRIC CAPACITOR ALIGNED WITH A THREE DIMENSIONAL TRANSISTOR STRUCTURE
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Patent #:
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Issue Dt:
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07/09/2019
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Application #:
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14026118
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Filing Dt:
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09/13/2013
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Title:
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METHOD FOR FABRICATING A DAMASCENE SELF-ALIGNED FERRORELECTRIC RANDOM ACCESS MEMORY (F-RAM) DEVICE STRUCTURE EMPLOYING REDUCED PROCESSING STEPS
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Patent #:
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Issue Dt:
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10/04/2016
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Application #:
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14033170
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Filing Dt:
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09/20/2013
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Publication #:
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Pub Dt:
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01/23/2014
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Title:
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DUAL STORAGE NODE MEMORY
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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14040616
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Filing Dt:
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09/27/2013
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Title:
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FERROELECTRIC MEMORIES WITH A STRESS BUFFER
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Patent #:
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Issue Dt:
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11/03/2015
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Application #:
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14048076
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Filing Dt:
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10/08/2013
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Publication #:
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Pub Dt:
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04/09/2015
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Title:
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METHODS CIRCUITS APPARATUSES AND SYSTEMS FOR PROVIDING CURRENT TO A NON-VOLATILE MEMORY ARRAY AND NON-VOLATILE MEMORY DEVICES PRODUCED ACCORDINGLY
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14048863
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Filing Dt:
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10/08/2013
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Publication #:
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Pub Dt:
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04/09/2015
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Title:
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SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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14050490
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Filing Dt:
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10/10/2013
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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MULTI-PASS SOFT PROGRAMMING
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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14051828
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Filing Dt:
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10/11/2013
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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SPACER FORMATION WITH STRAIGHT SIDEWALL
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Patent #:
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Issue Dt:
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08/15/2017
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Application #:
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14051859
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Filing Dt:
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10/11/2013
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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ION IMPLANTATION-ASSISTED ETCH-BACK PROCESS FOR IMPROVING SPACER SHAPE AND SPACER WIDTH CONTROL
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Patent #:
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Issue Dt:
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09/27/2016
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Application #:
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14054265
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Filing Dt:
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10/15/2013
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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METHOD FOR PROVIDING READ DATA FLOW CONTROL OR ERROR REPORTING USING A READ DATA STROBE
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Patent #:
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Issue Dt:
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08/30/2016
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Application #:
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14054880
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Filing Dt:
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10/16/2013
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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MEMORY PROGRAM UPON SYSTEM FAILURE
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Patent #:
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Issue Dt:
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08/15/2017
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Application #:
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14056547
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Filing Dt:
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10/17/2013
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Publication #:
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Pub Dt:
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04/23/2015
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Title:
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MULTIPLE PHASE-SHIFT PHOTOMASK AND SEMICONDUCTOR MANUFACTURING METHOD
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Patent #:
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Issue Dt:
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12/24/2019
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Application #:
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14059077
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Filing Dt:
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10/21/2013
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Publication #:
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Pub Dt:
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02/13/2014
| | | | |
Title:
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CONTACTS FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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14073031
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Filing Dt:
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11/06/2013
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Publication #:
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Pub Dt:
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05/07/2015
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Title:
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METHODS, CIRCUITS, SYSTEMS AND COMPUTER EXECUTABLE INSTRUCTION SETS FOR PROVIDING ERROR CORRECTION OF STORED DATA AND DATA STORAGE DEVICES UTILIZING SAME
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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14073914
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Filing Dt:
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11/07/2013
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Title:
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METHODS CIRCUITS APPARATUSES AND SYSTEMS FOR SENSING A LOGICAL STATE OF A NON-VOLATILE MEMORY CELL AND NON-VOLATILE MEMORY DEVICES PRODUCED ACCORDINGLY
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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14077971
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Filing Dt:
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11/12/2013
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Title:
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AUTHENTICATING FERROELECTRIC RANDOM ACCESS MEMORY (F-RAM) DEVICE AND METHOD
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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14081987
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Filing Dt:
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11/15/2013
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Publication #:
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Pub Dt:
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07/31/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
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Patent #:
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Issue Dt:
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06/21/2016
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Application #:
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14092554
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Filing Dt:
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11/27/2013
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Publication #:
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Pub Dt:
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05/28/2015
| | | | |
Title:
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AUTO RESUME OF IRREGULAR ERASE STOPPAGE OF A MEMORY SECTOR
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Patent #:
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Issue Dt:
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05/19/2015
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Application #:
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14099340
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Filing Dt:
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12/06/2013
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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METHOD AND APPARATUS FOR STAGGERED START-UP OF A PREDEFINED, RANDOM OR DYNAMIC NUMBER OF FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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01/17/2017
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Application #:
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14109045
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Filing Dt:
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12/17/2013
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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METHODS OF FABRICATING AN F-RAM
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Patent #:
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Issue Dt:
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09/27/2016
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Application #:
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14109157
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Filing Dt:
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12/17/2013
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Publication #:
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Pub Dt:
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06/19/2014
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Title:
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HTO OFFSET FOR LONG LEFFECTIVE, BETTER DEVICE PERFORMANCE
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Patent #:
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Issue Dt:
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11/15/2016
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Application #:
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14132422
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Filing Dt:
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12/18/2013
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Publication #:
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Pub Dt:
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06/18/2015
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Title:
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INCREASING LITHOGRAPHIC DEPTH OF FOCUS WINDOW USING WAFER TOPOGRAPHY
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Patent #:
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Issue Dt:
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06/07/2016
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Application #:
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14135863
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Filing Dt:
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12/20/2013
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Publication #:
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Pub Dt:
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06/25/2015
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Title:
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CT-NOR DIFFERENTIAL BITLINE SENSING ARCHITECTURE
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14136358
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Filing Dt:
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12/20/2013
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Publication #:
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Pub Dt:
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06/25/2015
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Title:
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GATE FORMATION MEMORY BY PLANARIZATION
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14143317
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Filing Dt:
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12/30/2013
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Publication #:
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Pub Dt:
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07/02/2015
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Title:
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Formation of Gate Sidewall Structure
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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14149484
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Filing Dt:
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01/07/2014
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Publication #:
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Pub Dt:
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05/01/2014
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Title:
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DATA WRITING METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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08/23/2016
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14153900
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Filing Dt:
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01/13/2014
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Publication #:
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Pub Dt:
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05/08/2014
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Title:
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ELECTRICALLY PROGRAMMABLE AND ERASEABLE MEMORY DEVICE
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Issue Dt:
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10/17/2017
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14188048
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Filing Dt:
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02/24/2014
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Publication #:
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Pub Dt:
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08/27/2015
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Title:
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MEMORY SUBSYSTEM WITH WRAPPED-TO-CONTINUOUS READ
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Issue Dt:
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03/07/2017
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14199837
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03/06/2014
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Pub Dt:
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09/10/2015
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Title:
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Memory Access Bases on Erase Cycle Time
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Issue Dt:
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02/02/2016
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14207303
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03/12/2014
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Publication #:
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Pub Dt:
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09/17/2015
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Title:
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BURIED TRENCH ISOLATION IN INTEGRATED CIRCUITS
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Issue Dt:
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10/18/2016
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14222399
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Filing Dt:
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03/21/2014
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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SYSTEM WITH MEMORY HAVING VOLTAGE APPLYING UNIT
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08/18/2015
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14222904
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03/24/2014
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Publication #:
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Pub Dt:
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03/12/2015
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Title:
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METHOD OF FABRICATING A FERROELECTRIC CAPACITOR
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Issue Dt:
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05/28/2019
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14228384
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03/28/2014
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Publication #:
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Pub Dt:
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07/31/2014
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Title:
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VARIABLE READ LATENCY ON A SERIAL MEMORY BUS
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Patent #:
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06/07/2016
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14228899
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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MULTI-CHANNEL, MULTI-BANK MEMORY WITH WIDE DATA INPUT/OUTPUT
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Patent #:
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Issue Dt:
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12/29/2015
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Application #:
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14229765
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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MULTI-CHANNEL PHYSICAL INTERFACES AND METHODS FOR STATIC RANDOM ACCESS MEMORY DEVICES
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Patent #:
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Issue Dt:
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12/12/2017
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Application #:
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14229908
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Filing Dt:
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03/29/2014
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Publication #:
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Pub Dt:
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07/31/2014
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Title:
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MEMORY CELL ARRAY LATCHUP PREVENTION
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Patent #:
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Issue Dt:
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03/13/2018
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Application #:
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14254237
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Filing Dt:
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04/16/2014
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Publication #:
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Pub Dt:
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08/14/2014
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Title:
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FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTS
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Patent #:
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Issue Dt:
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05/30/2017
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Application #:
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14258950
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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ACCESS METHODS AND CIRCUITS FOR MEMORY DEVICES HAVING MULTIPLE BANKS
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14284812
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Filing Dt:
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05/22/2014
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Publication #:
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Pub Dt:
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11/26/2015
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Title:
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METHODS, CIRCUITS, DEVICES AND SYSTEMS FOR INTEGRATED CIRCUIT VOLTAGE LEVEL SHIFTING
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Patent #:
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Issue Dt:
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04/14/2015
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Application #:
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14303014
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Filing Dt:
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06/12/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
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ELIMINATING SHORTING BETWEEN FERROELECTRIC CAPACITORS AND METAL CONTACTS DURING FERROELECTRIC RANDOM ACCESS MEMORY FABRICATION
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Patent #:
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Issue Dt:
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07/10/2018
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Application #:
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14319079
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Filing Dt:
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06/30/2014
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Publication #:
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Pub Dt:
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12/31/2015
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Title:
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BOOTING AN APPLICATION FROM MULTIPLE MEMORIES
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Patent #:
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Issue Dt:
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03/07/2017
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Application #:
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14450727
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Filing Dt:
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08/04/2014
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Publication #:
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Pub Dt:
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02/04/2016
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Title:
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SPLIT-GATE SEMICONDUCTOR DEVICE WITH L-SHAPED GATE
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Patent #:
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Issue Dt:
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05/17/2016
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Application #:
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14458542
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Filing Dt:
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08/13/2014
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Publication #:
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Pub Dt:
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02/18/2016
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Title:
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INTEGRATION OF SEMICONDUCTOR MEMORY CELLS AND LOGIC CELLS
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14472043
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Filing Dt:
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08/28/2014
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Title:
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TEST CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR TESTING THE SAME
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14484417
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Filing Dt:
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09/12/2014
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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INTEGRATED CIRCUITS WITH NON-VOLATILE MEMORY AND METHODS FOR MANUFACTURE
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14501536
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Filing Dt:
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09/30/2014
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Publication #:
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Pub Dt:
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01/15/2015
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Title:
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NON-VOLATILE MEMORY WITH SILICIDED BIT LINE CONTACTS
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Patent #:
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Issue Dt:
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02/14/2017
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Application #:
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14512647
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Filing Dt:
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10/13/2014
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Title:
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HIGH RELIABILITY NON-VOLATILE STATIC RANDOM ACCESS MEMORY DEVICES, METHODS AND SYSTEMS
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Patent #:
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Issue Dt:
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03/14/2017
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Application #:
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14514008
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Filing Dt:
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10/14/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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ENHANCED HYDROGEN BARRIER ENCAPSULATION METHOD FOR THE CONTROL OF HYDROGEN INDUCED DEGRADATION OF FERROELECTRIC CAPACITORS IN AN F-RAM PROCESS
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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14517201
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Filing Dt:
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10/17/2014
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Publication #:
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Pub Dt:
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04/21/2016
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Title:
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Simultaneous Programming of Many Bits in Flash Memory
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14517470
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Filing Dt:
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10/17/2014
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Publication #:
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Pub Dt:
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02/19/2015
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Title:
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LINE-EDGE ROUGHNESS IMPROVEMENT FOR SMALL PITCHES
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Patent #:
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Issue Dt:
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06/05/2018
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Application #:
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14518560
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Filing Dt:
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10/20/2014
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Publication #:
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Pub Dt:
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04/21/2016
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Title:
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OVERLAID ERASE BLOCK MAPPING
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Patent #:
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Issue Dt:
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04/25/2017
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Application #:
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14562789
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Filing Dt:
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12/08/2014
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Publication #:
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Pub Dt:
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06/09/2016
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Title:
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METHODS, CIRCUITS, DEVICES, SYSTEMS AND MACHINE EXECUTABLE CODE FOR READING FROM A NON-VOLATILE MEMORY ARRAY
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Patent #:
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Issue Dt:
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09/12/2017
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Application #:
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14570801
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Filing Dt:
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12/15/2014
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Title:
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CONTROLLING THE LATCHUP EFFECT
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Patent #:
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Issue Dt:
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12/20/2016
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Application #:
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14630238
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Filing Dt:
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02/24/2015
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Publication #:
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Pub Dt:
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06/18/2015
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Title:
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FRACTURED ERASE SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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03/27/2018
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Application #:
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14716719
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Filing Dt:
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05/19/2015
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Title:
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METHOD AND APPARATUS FOR STAGGERED START-UP OF A PREDEFINED, RANDOM, OR DYNAMIC NUMBER OF FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/05/2016
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Application #:
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14738492
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Filing Dt:
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06/12/2015
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Title:
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METHODS OF FABRICATING AN F-RAM
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Patent #:
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Issue Dt:
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03/07/2017
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Application #:
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14742201
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Filing Dt:
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06/17/2015
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Publication #:
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Pub Dt:
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10/08/2015
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Title:
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USE DISPOSABLE GATE CAP TO FORM TRANSISTORS, AND SPLIT GATE CHARGE TRAPPING MEMORY CELLS
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Patent #:
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Issue Dt:
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09/27/2016
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Application #:
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14822085
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Filing Dt:
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08/10/2015
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Title:
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POWER MANAGEMENT SYSTEM FOR HIGH TRAFFIC INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/01/2017
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Application #:
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14860035
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Filing Dt:
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09/21/2015
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Publication #:
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Pub Dt:
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07/21/2016
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Title:
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DATA WRITING METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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12/06/2016
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Application #:
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14864594
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Filing Dt:
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09/24/2015
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Publication #:
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Pub Dt:
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12/15/2016
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Title:
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Non-Volatile Static RAM and Method of Operation Thereof
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Patent #:
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Issue Dt:
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05/02/2017
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Application #:
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14866260
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Filing Dt:
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09/25/2015
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Title:
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ACCESS METHODS AND CIRCUITS FOR MEMORY DEVICES HAVING MULTIPLE CHANNELS AND MULTIPLE BANKS
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Patent #:
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Issue Dt:
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05/09/2017
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Application #:
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14886663
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Filing Dt:
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10/19/2015
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Publication #:
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Pub Dt:
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04/21/2016
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Title:
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10-TRANSISTOR NON-VOLATILE STATIC RANDOM-ACCESS MEMORY USING A SINGLE NON-VOLATILE MEMORY ELEMENT AND METHOD OF OPERATION THEREOF
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Patent #:
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Issue Dt:
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02/13/2018
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Application #:
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14929428
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Filing Dt:
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11/02/2015
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Publication #:
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Pub Dt:
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08/11/2016
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Title:
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POWER SUPPLY INCLUDING REGULATING TRANSISTOR FOR PROVIDING CURRENT TO A LOAD AND NON-VOLATILE MEMORY DEVICES PRODUCED ACCORDINGLY
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Patent #:
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Issue Dt:
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12/06/2016
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Application #:
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14930484
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Filing Dt:
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11/02/2015
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Publication #:
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Pub Dt:
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04/07/2016
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Title:
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Supply Power Dependent Controllable Write Throughput for Memory Applications
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Patent #:
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Issue Dt:
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05/09/2017
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Application #:
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14970063
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Filing Dt:
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12/15/2015
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Publication #:
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Pub Dt:
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12/01/2016
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Title:
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FERROELECTRIC RANDOM-ACCESS MEMORY WITH PRE-PATTERNED OXYGEN BARRIER
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Patent #:
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Issue Dt:
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03/20/2018
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Application #:
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14971531
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Filing Dt:
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12/16/2015
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Publication #:
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Pub Dt:
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04/21/2016
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Title:
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CHARGE TRAPPING SPLIT GATE EMBEDDED FLASH MEMORY AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
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05/30/2017
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Application #:
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15006288
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Filing Dt:
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01/26/2016
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Publication #:
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Pub Dt:
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07/21/2016
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Title:
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NON-VOLATILE MEMORY WITH SILICIDED BIT LINE CONTACTS
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Patent #:
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Issue Dt:
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04/14/2020
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Application #:
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15048886
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Filing Dt:
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02/19/2016
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Publication #:
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Pub Dt:
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07/14/2016
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Title:
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LATERAL CHARGE STORAGE REGION FORMATION FOR SEMICONDUCTOR WORDLINE
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Patent #:
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Issue Dt:
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05/09/2017
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Application #:
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15052709
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02/24/2016
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10/20/2016
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Title:
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Memory Device with Internal Combination Logic
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Patent #:
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Issue Dt:
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11/27/2018
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Application #:
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15060249
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03/03/2016
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Title:
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THREE DIMENSIONAL CAPACITOR
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Patent #:
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Issue Dt:
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12/06/2016
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Application #:
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15065410
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Filing Dt:
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03/09/2016
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Title:
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METHOD FOR FABRICATING FERROELECTRIC RANDOM-ACCESS MEMORY ON PRE-PATTERNED BOTTOM ELECTRODE AND OXIDATION BARRIER
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Patent #:
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Issue Dt:
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03/28/2017
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Application #:
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15079462
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Filing Dt:
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03/24/2016
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Title:
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MULTI-BIT NON-VOLATILE RANDOM-ACCESS MEMORY CELLS
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04/18/2017
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15088557
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04/01/2016
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Title:
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Hydrogen Barriers in a Copper Interconnect Process
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06/06/2017
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15133026
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04/19/2016
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10/13/2016
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Title:
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BURIED HARD MASK FOR EMBEDDED SEMICONDUCTOR DEVICE PATTERNING
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12/06/2016
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15179070
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06/10/2016
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HYBRID REFERENCE GENERATION FOR FERROELECTRIC RANDOM ACCESS MEMORY
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03/13/2018
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15181138
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06/13/2016
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10/06/2016
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Memory First Process Flow and Device
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11/28/2017
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15191882
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06/24/2016
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SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS
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07/23/2019
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15198235
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06/30/2016
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10/20/2016
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METHOD AND APPARATUS FOR STAGGERED START-UP OF A PREDEFINED, RANDOM, OR DYNAMIC NUMBER OF FLASH MEMORY DEVICES
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11/06/2018
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15271527
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09/21/2016
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03/30/2017
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09/11/2018
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15279194
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09/28/2016
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12/14/2017
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Title:
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Methods And Devices for Reducing Program Disturb in Non-Volatile Memory Cell Arrays
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