Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 060075/0785 | |
| Pages: | 11 |
| | Recorded: | 06/01/2022 | | |
| Attorney Dkt #: | SRM-024 US C2 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/20/2024
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Application #:
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17804986
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Filing Dt:
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06/01/2022
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Publication #:
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Pub Dt:
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09/15/2022
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Title:
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PROCESS FOR FORMING A VERTICAL THIN-FILM TRANSISTOR THAT SERVES AS A CONNECTOR TO A BIT-LINE OF A 3-DIMENSIONAL MEMORY ARRAY
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Assignee
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| 225 CHARCOT AVENUE |
| SAN JOSE, CALIFORNIA 95131 |
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Correspondence name and address
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VLP LAW GROUP, LLP
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555 BRYANT STREET SUITE 820
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PALO ALTO, CA 94301
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05/10/2024 09:14 AM
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