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Reel/Frame:060885/0001   Pages: 253
Recorded: 04/15/2022
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1129
Page 10 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
Issue Dt:
06/21/2005
Application #:
10690861
Filing Dt:
10/22/2003
Publication #:
Pub Dt:
04/28/2005
Title:
COMPLIMENTARY METAL OXIDE SEMICONDUCTOR CAPACITOR AND METHOD FOR MAKING SAME
2
Patent #:
Issue Dt:
05/17/2005
Application #:
10693078
Filing Dt:
10/23/2003
Publication #:
Pub Dt:
04/28/2005
Title:
DAISY CHAIN GANG TESTING
3
Patent #:
Issue Dt:
08/09/2005
Application #:
10693110
Filing Dt:
10/24/2003
Publication #:
Pub Dt:
04/28/2005
Title:
CHEMICAL MECHANICAL ELECTROPOLISHING SYSTEM
4
Patent #:
Issue Dt:
12/13/2005
Application #:
10695193
Filing Dt:
10/28/2003
Publication #:
Pub Dt:
04/28/2005
Title:
FABRICATING SEMICONDUCTOR CHIPS
5
Patent #:
Issue Dt:
09/14/2004
Application #:
10696136
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
05/13/2004
Title:
FIELD PLATED SCHOTTKY DIODE AND METHOD OF FABRICATION THEREFOR
6
Patent #:
Issue Dt:
01/29/2008
Application #:
10697506
Filing Dt:
10/29/2003
Title:
METHOD OF VAPORIZING AND IONIZING METALS FOR USE IN SEMICONDUCTOR PROCESSING
7
Patent #:
Issue Dt:
08/16/2005
Application #:
10698167
Filing Dt:
10/30/2003
Title:
CALCIUM DOPED POLYSILICON GATE ELECTRODES
8
Patent #:
Issue Dt:
01/24/2006
Application #:
10698169
Filing Dt:
10/31/2003
Title:
MEMORY DEVICE HAVING AN ELECTRON TRAPPING LAYER IN A HIGH-K DIELECTRIC GATE STACK
9
Patent #:
Issue Dt:
04/04/2006
Application #:
10700791
Filing Dt:
11/03/2003
Title:
METHOD FOR TESTING IDD AT MULTIPLE VOLTAGES
10
Patent #:
Issue Dt:
09/06/2005
Application #:
10701328
Filing Dt:
11/03/2003
Title:
METHOD FOR PERFORMING STATISTICAL POST PROCESSING IN SEMICONDCTOR MANUFACTRING USING ID CELLS
11
Patent #:
Issue Dt:
12/14/2004
Application #:
10702165
Filing Dt:
11/04/2003
Title:
THIN FILM CMOS CALIBRATION STANDARD HAVING PROTECTIVE COVER LAYER
12
Patent #:
Issue Dt:
12/20/2005
Application #:
10704449
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
05/20/2004
Title:
MULTI-LAYERED SEMICONDUCTOR STRUCTURE
13
Patent #:
Issue Dt:
02/15/2005
Application #:
10706120
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/03/2004
Title:
LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
14
Patent #:
Issue Dt:
01/23/2007
Application #:
10713951
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
05/19/2005
Title:
INTEGRATED CIRCUIT CARRIER APPARATUS METHOD AND SYSTEM
15
Patent #:
Issue Dt:
11/25/2008
Application #:
10718536
Filing Dt:
11/24/2003
Publication #:
Pub Dt:
05/27/2004
Title:
HIGH K DIELECTRIC MATERIAL AND METHOD OF MAKING A HIGH K DIELECTRIC MATERIAL
16
Patent #:
Issue Dt:
05/10/2005
Application #:
10719195
Filing Dt:
11/21/2003
Publication #:
Pub Dt:
05/26/2005
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE FORMED IN SILICON-ON-INSULATOR
17
Patent #:
Issue Dt:
02/14/2006
Application #:
10721971
Filing Dt:
11/24/2003
Title:
METHOD FOR CREATING BARRIER LAYERS FOR COPPER DIFFUSION
18
Patent #:
Issue Dt:
02/27/2007
Application #:
10723701
Filing Dt:
11/26/2003
Publication #:
Pub Dt:
05/26/2005
Title:
CONTACT RESISTANCE DEVICE FOR IMPROVED PROCESS CONTROL
19
Patent #:
Issue Dt:
01/10/2006
Application #:
10730554
Filing Dt:
12/08/2003
Publication #:
Pub Dt:
06/09/2005
Title:
HIGH PERFORMANCE DIODE IMPLANTED VOLTAGE CONTROLLED P-TYPE DIFFUSION RESISTOR
20
Patent #:
Issue Dt:
12/12/2006
Application #:
10733034
Filing Dt:
12/11/2003
Title:
METHOD OF FABRICATING AN INTEGRAL CAPACITOR AND GATE TRANSISTOR HAVING NITRIDE AND OXIDE POLISH STOP LAYERS USING CHEMICAL MECHANICAL POLISHING ELIMINATION
21
Patent #:
Issue Dt:
01/26/2010
Application #:
10736386
Filing Dt:
12/15/2003
Publication #:
Pub Dt:
06/16/2005
Title:
METHOD FOR CALCULATING HIGH-RESOLUTION WAFER PARAMETER PROFILES
22
Patent #:
Issue Dt:
06/20/2006
Application #:
10738761
Filing Dt:
12/16/2003
Publication #:
Pub Dt:
06/16/2005
Title:
INCORPORATING DOPANTS TO ENHANCE THE DIELECTRIC PROPERTIES OF METAL SILICATES
23
Patent #:
Issue Dt:
11/29/2005
Application #:
10750348
Filing Dt:
12/31/2003
Publication #:
Pub Dt:
08/19/2004
Title:
METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES
24
Patent #:
Issue Dt:
12/19/2006
Application #:
10762788
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
08/05/2004
Title:
MOS TRANSISTOR AND METHOD OF MANUFACTURE
25
Patent #:
Issue Dt:
05/02/2006
Application #:
10767205
Filing Dt:
01/30/2004
Publication #:
Pub Dt:
08/04/2005
Title:
CROSS-FILL PATTERN FOR METAL FILL LEVELS, POWER SUPPLY FILTERING, AND ANALOG CIRUCIT SHIELDING
26
Patent #:
Issue Dt:
06/12/2007
Application #:
10772133
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
27
Patent #:
Issue Dt:
05/08/2007
Application #:
10773614
Filing Dt:
02/06/2004
Publication #:
Pub Dt:
08/11/2005
Title:
SEMICONDUCTOR DEVICE CONFIGURED FOR REDUCING POST-FABRICATION DAMAGE
28
Patent #:
Issue Dt:
07/18/2006
Application #:
10773900
Filing Dt:
02/06/2004
Publication #:
Pub Dt:
08/12/2004
Title:
VERTICAL REPLACEMENT-GATE SILICON-ON-INSULATOR TRANSISTOR
29
Patent #:
Issue Dt:
03/29/2005
Application #:
10777250
Filing Dt:
02/12/2004
Publication #:
Pub Dt:
08/19/2004
Title:
INTEGRATED CIRCUIT EARLY LIFE FAILURE DETECTION BY MONITORING CHANGES IN CURRENT SIGNATURES
30
Patent #:
Issue Dt:
02/28/2006
Application #:
10778454
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/18/2005
Title:
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURE THEREFOR
31
Patent #:
Issue Dt:
12/06/2005
Application #:
10779966
Filing Dt:
02/17/2004
Publication #:
Pub Dt:
08/18/2005
Title:
METHOD AND CONTROL SYSTEM FOR IMPROVING CMP PROCESS BY DETECTING AND REACTING TO HARMONIC OSCILLATION
32
Patent #:
NONE
Issue Dt:
Application #:
10791337
Filing Dt:
03/01/2004
Publication #:
Pub Dt:
09/01/2005
Title:
Spacer-less transistor integration scheme for high-k gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe strained silicon schemes
33
Patent #:
Issue Dt:
11/20/2007
Application #:
10799851
Filing Dt:
03/12/2004
Publication #:
Pub Dt:
09/15/2005
Title:
PROCESS CONTROL DATA COLLECTION
34
Patent #:
Issue Dt:
07/01/2008
Application #:
10801310
Filing Dt:
03/16/2004
Publication #:
Pub Dt:
10/13/2005
Title:
YIELD PROFILE MANIPULATOR
35
Patent #:
NONE
Issue Dt:
Application #:
10802522
Filing Dt:
03/17/2004
Publication #:
Pub Dt:
12/02/2004
Title:
Interconnect integration
36
Patent #:
Issue Dt:
07/25/2006
Application #:
10804980
Filing Dt:
03/18/2004
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD FOR GROWING THIN FILMS
37
Patent #:
Issue Dt:
02/15/2005
Application #:
10814680
Filing Dt:
03/31/2004
Publication #:
Pub Dt:
09/23/2004
Title:
SEMICONDUCTOR DEVICE HAVING A DOPED LATTICE MATCHING LAYER AND A METHOD OF MANUFACTURE THEREFOR
38
Patent #:
NONE
Issue Dt:
Application #:
10814682
Filing Dt:
03/31/2004
Publication #:
Pub Dt:
09/23/2004
Title:
Semiconductor device having a doped lattice matching layer and a method of manufacture therefor
39
Patent #:
Issue Dt:
07/10/2007
Application #:
10819253
Filing Dt:
04/05/2004
Publication #:
Pub Dt:
09/30/2004
Title:
STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
40
Patent #:
Issue Dt:
10/10/2006
Application #:
10820494
Filing Dt:
04/07/2004
Publication #:
Pub Dt:
10/13/2005
Title:
METHOD AND APPARATUS FOR ESTABLISHING IMPROVED THERMAL COMMUNICATION BETWEEN A DIE AND A HEATSPREADER IN A SEMICONDUCTOR PACKAGE
41
Patent #:
NONE
Issue Dt:
Application #:
10828993
Filing Dt:
04/21/2004
Publication #:
Pub Dt:
10/07/2004
Title:
Method for making a radio frequency component and component produced thereby
42
Patent #:
Issue Dt:
07/25/2006
Application #:
10847789
Filing Dt:
05/18/2004
Publication #:
Pub Dt:
12/02/2004
Title:
NOVEL GATE DIELECTRIC STRUCTURE FOR REDUCING BORON PENETRATION AND CURRENT LEAKAGE
43
Patent #:
Issue Dt:
06/26/2007
Application #:
10850812
Filing Dt:
05/21/2004
Publication #:
Pub Dt:
11/24/2005
Title:
DEVICE AND METHOD TO ELIMINATE SHORTING INDUCED BY VIA TO METAL MISALIGNMENT
44
Patent #:
Issue Dt:
03/14/2006
Application #:
10867014
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
12/15/2005
Title:
SUBSTRATE CONTACT ANALYSIS
45
Patent #:
Issue Dt:
02/24/2009
Application #:
10875029
Filing Dt:
06/23/2004
Publication #:
Pub Dt:
12/29/2005
Title:
DEVICE AND METHOD USING ISOTOPICALLY ENRICHED SILICON
46
Patent #:
Issue Dt:
05/29/2007
Application #:
10876183
Filing Dt:
06/24/2004
Publication #:
Pub Dt:
11/25/2004
Title:
PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER FORMED OVER A SEMICONDUCTOR SUBSTRATE
47
Patent #:
Issue Dt:
12/12/2006
Application #:
10878857
Filing Dt:
06/28/2004
Publication #:
Pub Dt:
12/29/2005
Title:
GRADED CONDUCTIVE STRUCTURE FOR USE IN A METAL-OXIDE-SEMICONDUCTOR DEVICE
48
Patent #:
Issue Dt:
03/21/2006
Application #:
10883137
Filing Dt:
07/01/2004
Title:
BIMETALLIC OXIDE COMPOSITIONS FOR GATE DIELECTRICS
49
Patent #:
Issue Dt:
04/04/2006
Application #:
10886763
Filing Dt:
07/08/2004
Publication #:
Pub Dt:
01/12/2006
Title:
INTERDIGITADED CAPACITORS
50
Patent #:
Issue Dt:
07/04/2006
Application #:
10893659
Filing Dt:
07/16/2004
Publication #:
Pub Dt:
12/16/2004
Title:
DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
51
Patent #:
Issue Dt:
09/26/2006
Application #:
10902332
Filing Dt:
07/29/2004
Publication #:
Pub Dt:
02/02/2006
Title:
APPARATUS AND METHOD FOR IN-SITU MEASURING OF VIBRATIONAL ENERGY IN A PROCESS BATH OF A VIBRATIONAL CLEANING SYSTEM
52
Patent #:
Issue Dt:
07/29/2008
Application #:
10916322
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPLACEMENT GATE TRANSISTOR FLOW
53
Patent #:
Issue Dt:
03/18/2008
Application #:
10918981
Filing Dt:
08/16/2004
Publication #:
Pub Dt:
02/03/2005
Title:
INCREASED QUALITY FACTOR OF A VARACTOR IN AN INTEGRATED CIRCUIT VIA A HIGH CONDUCTIVE REGION IN A WELL
54
Patent #:
Issue Dt:
03/04/2008
Application #:
10919591
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METALLIZATION PERFORMANCE IN ELECTRONIC DEVICES
55
Patent #:
Issue Dt:
09/19/2006
Application #:
10926631
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
INTEGRATED CIRCUIT WITH SUBSTANTIALLY PERPENDICULAR WIRE BONDS
56
Patent #:
Issue Dt:
11/14/2006
Application #:
10927802
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/16/2006
Title:
PATTERN COMPONENT ANALYSIS AND MANIPULATION
57
Patent #:
Issue Dt:
06/13/2006
Application #:
10928292
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
PARAMETRIC OUTLIER DETECTION
58
Patent #:
Issue Dt:
04/01/2014
Application #:
10929706
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
Method for optimizing wafer edge patterning
59
Patent #:
Issue Dt:
03/13/2007
Application #:
10931605
Filing Dt:
08/31/2004
Title:
FABRICATION OF TRENCHES WITH MULTIPLE DEPTHS ON THE SAME SUBSTRATE
60
Patent #:
Issue Dt:
08/07/2007
Application #:
10941665
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
03/16/2006
Title:
GUARD RING FOR IMPROVED MATCHING
61
Patent #:
Issue Dt:
06/03/2008
Application #:
10942444
Filing Dt:
09/16/2004
Publication #:
Pub Dt:
03/10/2005
Title:
APPARATUS AND METHOD TO IMPROVE THE RESOLUTION OF PHOTOLITHOGRAPHY SYSTEMS BY IMPROVING THE TEMPERATURE STABILITY OF THE RETICLE
62
Patent #:
NONE
Issue Dt:
Application #:
10944995
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
Pseudo low volume reticle (PLVR) design for asic manufacturing
63
Patent #:
Issue Dt:
11/27/2007
Application #:
10945777
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
INTEGRATED BARRIER AND SEED LAYER FOR COPPER INTERCONNECT TECHNOLOGY
64
Patent #:
Issue Dt:
02/20/2007
Application #:
10948897
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
04/06/2006
Title:
III-V POWER FIELD EFFECT TRANSISTORS
65
Patent #:
Issue Dt:
01/01/2008
Application #:
10949760
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SURFACE COORDINATE SYSTEM
66
Patent #:
NONE
Issue Dt:
Application #:
10951646
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
03/24/2005
Title:
Plasma removal of high k metal oxide
67
Patent #:
Issue Dt:
06/23/2009
Application #:
10953322
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
MULTI WAVELENGTH MASK FOR MULTI LAYER PRINTING ON A PROCESS SUBSTRATE
68
Patent #:
Issue Dt:
06/27/2006
Application #:
10953475
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
05/12/2005
Title:
INDUCTOR FORMED IN AN INTEGRATED CIRCUIT
69
Patent #:
Issue Dt:
03/04/2008
Application #:
10953477
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD AND SYSTEM OF USING OFFSET GAGE FOR CMP POLISHING PAD ALIGNMENT AND ADJUSTMENT
70
Patent #:
Issue Dt:
03/27/2007
Application #:
10953480
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SEMICONDUCTOR DEVICE MANUFACTURING
71
Patent #:
Issue Dt:
06/27/2006
Application #:
10953750
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/06/2006
Title:
THICK OXIDE REGION IN A SEMICONDUCTOR DEVICE
72
Patent #:
Issue Dt:
08/22/2006
Application #:
10953894
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
73
Patent #:
Issue Dt:
03/18/2008
Application #:
10955238
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
08/04/2005
Title:
STRUCTURE AND METHOD FOR IMPROVED HEAT CONDUCTION FOR SEMICONDUCTOR DEVICES
74
Patent #:
Issue Dt:
02/13/2007
Application #:
10959868
Filing Dt:
10/06/2004
Publication #:
Pub Dt:
02/24/2005
Title:
ANALOG CAPACITOR IN DUAL DAMASCENE PROCESS
75
Patent #:
Issue Dt:
02/20/2007
Application #:
10963156
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
03/03/2005
Title:
CATHODE WITH IMPROVED WORK FUNCTION AND METHOD FOR MAKING THE SAME
76
Patent #:
NONE
Issue Dt:
Application #:
10964032
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
03/24/2005
Title:
Via and metal line interface capable of reducing the incidence of electro-migration induced voids
77
Patent #:
Issue Dt:
02/20/2007
Application #:
10966074
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD FOR FABRICATING PLANAR SEMICONDUCTOR WAFERS
78
Patent #:
Issue Dt:
03/21/2006
Application #:
10967900
Filing Dt:
10/18/2004
Publication #:
Pub Dt:
03/10/2005
Title:
ELECTRO-MECHANICAL DEVICE HAVING A CHARGE DISSIPATION LAYER AND A METHOD OF MANUFACTURE THEREFOR
79
Patent #:
Issue Dt:
08/21/2007
Application #:
10971961
Filing Dt:
10/22/2004
Publication #:
Pub Dt:
04/27/2006
Title:
LOCAL INTERCONNECT MANUFACTURING PROCESS
80
Patent #:
Issue Dt:
06/27/2006
Application #:
10972898
Filing Dt:
10/25/2004
Publication #:
Pub Dt:
05/26/2005
Title:
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
81
Patent #:
Issue Dt:
04/17/2007
Application #:
10973851
Filing Dt:
10/25/2004
Publication #:
Pub Dt:
04/27/2006
Title:
CONTACT RING DESIGN FOR REDUCING BUBBLE AND ELECTROLYTE EFFECTS DURING ELECTROCHEMICAL PLATING IN MANUFACTURING
82
Patent #:
Issue Dt:
01/05/2010
Application #:
10978716
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
03/24/2005
Title:
MIXED SIGNAL INTEGRATED CIRCUIT WITH IMPROVED ISOLATION
83
Patent #:
Issue Dt:
08/11/2009
Application #:
10981175
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
05/04/2006
Title:
LATERAL DOUBLE DIFFUSED MOS TRANSISTORS
84
Patent #:
Issue Dt:
12/12/2006
Application #:
10984286
Filing Dt:
11/09/2004
Publication #:
Pub Dt:
05/11/2006
Title:
HIGH PERFORMANCE DIODE-IMPLANTED VOLTAGE-CONTROLLED POLY RESISTORS FOR MIXED-SIGNAL AND RF APPLICATIONS
85
Patent #:
Issue Dt:
01/30/2007
Application #:
10986984
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHOD AND STRUCTURE FOR GRADED GATE OXIDES ON VERTICAL AND NON-PLANAR SURFACES
86
Patent #:
Issue Dt:
07/08/2008
Application #:
10991107
Filing Dt:
11/17/2004
Publication #:
Pub Dt:
05/18/2006
Title:
METHOD AND SYSTEM FOR REDUCING INTER-LAYER CAPACITANCE IN INTEGRATED CIRCUITS
87
Patent #:
Issue Dt:
08/28/2007
Application #:
10999704
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
06/01/2006
Title:
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02/12/2008
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06/01/2006
Title:
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08/22/2006
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04/14/2005
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07/10/2007
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12/06/2004
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Pub Dt:
06/08/2006
Title:
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11/15/2011
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Filing Dt:
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Publication #:
Pub Dt:
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Title:
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Title:
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93
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07/11/2006
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94
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Title:
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95
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06/24/2008
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01/06/2005
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Pub Dt:
07/07/2005
Title:
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07/24/2007
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11068237
Filing Dt:
02/28/2005
Publication #:
Pub Dt:
08/31/2006
Title:
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Assignor
1
Exec Dt:
04/01/2022
Assignees
1
401 N. MICHIGAN AVE.
SUITE 1630
CHICAGO, ILLINOIS 60611
2
401 N. MICHIGAN AVE.
SUITE 1630
CHICAGO, ILLINOIS 60611
3
401 N. MICHIGAN AVE.
SUITE 1630
CHICAGO, ILLINOIS 60611
Correspondence name and address
JOSHUA GAMMON
401 N. MICHIGAN AVE.
SUITE 1630
CHICAGO, IL 60611

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