Total properties:
1129
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12
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10690861
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Filing Dt:
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10/22/2003
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
Title:
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COMPLIMENTARY METAL OXIDE SEMICONDUCTOR CAPACITOR AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10693078
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Filing Dt:
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10/23/2003
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
Title:
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DAISY CHAIN GANG TESTING
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10693110
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Filing Dt:
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10/24/2003
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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CHEMICAL MECHANICAL ELECTROPOLISHING SYSTEM
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Patent #:
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Issue Dt:
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12/13/2005
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Application #:
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10695193
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Filing Dt:
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10/28/2003
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
Title:
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FABRICATING SEMICONDUCTOR CHIPS
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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10696136
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Filing Dt:
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10/29/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
Title:
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FIELD PLATED SCHOTTKY DIODE AND METHOD OF FABRICATION THEREFOR
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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10697506
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Filing Dt:
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10/29/2003
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Title:
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METHOD OF VAPORIZING AND IONIZING METALS FOR USE IN SEMICONDUCTOR PROCESSING
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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10698167
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Filing Dt:
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10/30/2003
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Title:
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CALCIUM DOPED POLYSILICON GATE ELECTRODES
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10698169
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Filing Dt:
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10/31/2003
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Title:
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MEMORY DEVICE HAVING AN ELECTRON TRAPPING LAYER IN A HIGH-K DIELECTRIC GATE STACK
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10700791
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Filing Dt:
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11/03/2003
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Title:
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METHOD FOR TESTING IDD AT MULTIPLE VOLTAGES
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10701328
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Filing Dt:
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11/03/2003
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Title:
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METHOD FOR PERFORMING STATISTICAL POST PROCESSING IN SEMICONDCTOR MANUFACTRING USING ID CELLS
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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10702165
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Filing Dt:
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11/04/2003
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Title:
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THIN FILM CMOS CALIBRATION STANDARD HAVING PROTECTIVE COVER LAYER
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10704449
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Filing Dt:
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11/07/2003
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Publication #:
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Pub Dt:
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05/20/2004
| | | | |
Title:
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MULTI-LAYERED SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10706120
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Filing Dt:
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11/12/2003
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Publication #:
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Pub Dt:
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06/03/2004
| | | | |
Title:
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LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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10713951
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Filing Dt:
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11/14/2003
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Publication #:
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Pub Dt:
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05/19/2005
| | | | |
Title:
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INTEGRATED CIRCUIT CARRIER APPARATUS METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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10718536
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Filing Dt:
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11/24/2003
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
Title:
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HIGH K DIELECTRIC MATERIAL AND METHOD OF MAKING A HIGH K DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10719195
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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METAL-OXIDE-SEMICONDUCTOR DEVICE FORMED IN SILICON-ON-INSULATOR
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Patent #:
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Issue Dt:
|
02/14/2006
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Application #:
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10721971
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Filing Dt:
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11/24/2003
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Title:
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METHOD FOR CREATING BARRIER LAYERS FOR COPPER DIFFUSION
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10723701
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Filing Dt:
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11/26/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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CONTACT RESISTANCE DEVICE FOR IMPROVED PROCESS CONTROL
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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10730554
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Filing Dt:
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12/08/2003
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Publication #:
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Pub Dt:
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06/09/2005
| | | | |
Title:
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HIGH PERFORMANCE DIODE IMPLANTED VOLTAGE CONTROLLED P-TYPE DIFFUSION RESISTOR
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10733034
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Filing Dt:
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12/11/2003
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Title:
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METHOD OF FABRICATING AN INTEGRAL CAPACITOR AND GATE TRANSISTOR HAVING NITRIDE AND OXIDE POLISH STOP LAYERS USING CHEMICAL MECHANICAL POLISHING ELIMINATION
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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10736386
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Filing Dt:
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12/15/2003
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Publication #:
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Pub Dt:
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06/16/2005
| | | | |
Title:
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METHOD FOR CALCULATING HIGH-RESOLUTION WAFER PARAMETER PROFILES
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10738761
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Filing Dt:
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12/16/2003
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Publication #:
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Pub Dt:
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06/16/2005
| | | | |
Title:
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INCORPORATING DOPANTS TO ENHANCE THE DIELECTRIC PROPERTIES OF METAL SILICATES
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10750348
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Filing Dt:
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12/31/2003
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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10762788
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Filing Dt:
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01/22/2004
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
Title:
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MOS TRANSISTOR AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10767205
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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08/04/2005
| | | | |
Title:
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CROSS-FILL PATTERN FOR METAL FILL LEVELS, POWER SUPPLY FILTERING, AND ANALOG CIRUCIT SHIELDING
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Patent #:
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|
Issue Dt:
|
06/12/2007
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Application #:
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10772133
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Filing Dt:
|
02/03/2004
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Publication #:
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Pub Dt:
|
08/12/2004
| | | | |
Title:
|
MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
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|
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Patent #:
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|
Issue Dt:
|
05/08/2007
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Application #:
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10773614
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Filing Dt:
|
02/06/2004
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Publication #:
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Pub Dt:
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08/11/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE CONFIGURED FOR REDUCING POST-FABRICATION DAMAGE
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Patent #:
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|
Issue Dt:
|
07/18/2006
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Application #:
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10773900
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Filing Dt:
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02/06/2004
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Publication #:
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Pub Dt:
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08/12/2004
| | | | |
Title:
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VERTICAL REPLACEMENT-GATE SILICON-ON-INSULATOR TRANSISTOR
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10777250
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Filing Dt:
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02/12/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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INTEGRATED CIRCUIT EARLY LIFE FAILURE DETECTION BY MONITORING CHANGES IN CURRENT SIGNATURES
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10778454
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Filing Dt:
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02/13/2004
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Publication #:
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|
Pub Dt:
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08/18/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURE THEREFOR
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|
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Patent #:
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|
Issue Dt:
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12/06/2005
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Application #:
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10779966
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Filing Dt:
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02/17/2004
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Publication #:
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Pub Dt:
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08/18/2005
| | | | |
Title:
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METHOD AND CONTROL SYSTEM FOR IMPROVING CMP PROCESS BY DETECTING AND REACTING TO HARMONIC OSCILLATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10791337
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Filing Dt:
|
03/01/2004
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Publication #:
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Pub Dt:
|
09/01/2005
| | | | |
Title:
|
Spacer-less transistor integration scheme for high-k gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe strained silicon schemes
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Patent #:
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|
Issue Dt:
|
11/20/2007
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Application #:
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10799851
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Filing Dt:
|
03/12/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
|
PROCESS CONTROL DATA COLLECTION
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Patent #:
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|
Issue Dt:
|
07/01/2008
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Application #:
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10801310
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Filing Dt:
|
03/16/2004
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Publication #:
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|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
YIELD PROFILE MANIPULATOR
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10802522
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Filing Dt:
|
03/17/2004
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Publication #:
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|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
Interconnect integration
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|
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Patent #:
|
|
Issue Dt:
|
07/25/2006
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Application #:
|
10804980
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Filing Dt:
|
03/18/2004
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Publication #:
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|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
METHOD FOR GROWING THIN FILMS
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|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10814680
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Filing Dt:
|
03/31/2004
|
Publication #:
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|
Pub Dt:
|
09/23/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A DOPED LATTICE MATCHING LAYER AND A METHOD OF MANUFACTURE THEREFOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10814682
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Filing Dt:
|
03/31/2004
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Publication #:
|
|
Pub Dt:
|
09/23/2004
| | | | |
Title:
|
Semiconductor device having a doped lattice matching layer and a method of manufacture therefor
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|
|
Patent #:
|
|
Issue Dt:
|
07/10/2007
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Application #:
|
10819253
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Filing Dt:
|
04/05/2004
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Publication #:
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|
Pub Dt:
|
09/30/2004
| | | | |
Title:
|
STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
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|
|
Patent #:
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|
Issue Dt:
|
10/10/2006
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Application #:
|
10820494
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Filing Dt:
|
04/07/2004
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Publication #:
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|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR ESTABLISHING IMPROVED THERMAL COMMUNICATION BETWEEN A DIE AND A HEATSPREADER IN A SEMICONDUCTOR PACKAGE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10828993
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Filing Dt:
|
04/21/2004
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Publication #:
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|
Pub Dt:
|
10/07/2004
| | | | |
Title:
|
Method for making a radio frequency component and component produced thereby
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|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
10847789
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Filing Dt:
|
05/18/2004
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Publication #:
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|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
NOVEL GATE DIELECTRIC STRUCTURE FOR REDUCING BORON PENETRATION AND CURRENT LEAKAGE
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|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
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Application #:
|
10850812
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Filing Dt:
|
05/21/2004
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Publication #:
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|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
DEVICE AND METHOD TO ELIMINATE SHORTING INDUCED BY VIA TO METAL MISALIGNMENT
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|
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Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10867014
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Filing Dt:
|
06/14/2004
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Publication #:
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|
Pub Dt:
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12/15/2005
| | | | |
Title:
|
SUBSTRATE CONTACT ANALYSIS
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|
Patent #:
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|
Issue Dt:
|
02/24/2009
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Application #:
|
10875029
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Filing Dt:
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06/23/2004
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Publication #:
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|
Pub Dt:
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12/29/2005
| | | | |
Title:
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DEVICE AND METHOD USING ISOTOPICALLY ENRICHED SILICON
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|
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Patent #:
|
|
Issue Dt:
|
05/29/2007
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Application #:
|
10876183
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Filing Dt:
|
06/24/2004
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Publication #:
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|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER FORMED OVER A SEMICONDUCTOR SUBSTRATE
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|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
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Application #:
|
10878857
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Filing Dt:
|
06/28/2004
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Publication #:
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|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
GRADED CONDUCTIVE STRUCTURE FOR USE IN A METAL-OXIDE-SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10883137
|
Filing Dt:
|
07/01/2004
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Title:
|
BIMETALLIC OXIDE COMPOSITIONS FOR GATE DIELECTRICS
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|
|
Patent #:
|
|
Issue Dt:
|
04/04/2006
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Application #:
|
10886763
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Filing Dt:
|
07/08/2004
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Publication #:
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|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
INTERDIGITADED CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10893659
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
12/16/2004
| | | | |
Title:
|
DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10902332
|
Filing Dt:
|
07/29/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
APPARATUS AND METHOD FOR IN-SITU MEASURING OF VIBRATIONAL ENERGY IN A PROCESS BATH OF A VIBRATIONAL CLEANING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
10916322
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Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPLACEMENT GATE TRANSISTOR FLOW
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|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
10918981
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Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
INCREASED QUALITY FACTOR OF A VARACTOR IN AN INTEGRATED CIRCUIT VIA A HIGH CONDUCTIVE REGION IN A WELL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
10919591
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Filing Dt:
|
08/17/2004
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
METALLIZATION PERFORMANCE IN ELECTRONIC DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10926631
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Filing Dt:
|
08/26/2004
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Publication #:
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|
Pub Dt:
|
03/02/2006
| | | | |
Title:
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INTEGRATED CIRCUIT WITH SUBSTANTIALLY PERPENDICULAR WIRE BONDS
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Patent #:
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|
Issue Dt:
|
11/14/2006
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Application #:
|
10927802
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Filing Dt:
|
08/27/2004
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Publication #:
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Pub Dt:
|
03/16/2006
| | | | |
Title:
|
PATTERN COMPONENT ANALYSIS AND MANIPULATION
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Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10928292
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Filing Dt:
|
08/27/2004
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Publication #:
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|
Pub Dt:
|
03/02/2006
| | | | |
Title:
|
PARAMETRIC OUTLIER DETECTION
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|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
10929706
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Filing Dt:
|
08/30/2004
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Publication #:
|
|
Pub Dt:
|
03/02/2006
| | | | |
Title:
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Method for optimizing wafer edge patterning
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|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10931605
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Filing Dt:
|
08/31/2004
|
Title:
|
FABRICATION OF TRENCHES WITH MULTIPLE DEPTHS ON THE SAME SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
10941665
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Filing Dt:
|
09/14/2004
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
GUARD RING FOR IMPROVED MATCHING
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|
|
Patent #:
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|
Issue Dt:
|
06/03/2008
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10942444
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09/16/2004
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03/10/2005
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APPARATUS AND METHOD TO IMPROVE THE RESOLUTION OF PHOTOLITHOGRAPHY SYSTEMS BY IMPROVING THE TEMPERATURE STABILITY OF THE RETICLE
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NONE
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10944995
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09/20/2004
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03/23/2006
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Pseudo low volume reticle (PLVR) design for asic manufacturing
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11/27/2007
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10945777
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09/20/2004
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03/23/2006
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Title:
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INTEGRATED BARRIER AND SEED LAYER FOR COPPER INTERCONNECT TECHNOLOGY
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02/20/2007
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10948897
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09/24/2004
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04/06/2006
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01/01/2008
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10949760
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09/24/2004
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04/06/2006
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SURFACE COORDINATE SYSTEM
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NONE
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10951646
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09/28/2004
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03/24/2005
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Title:
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Plasma removal of high k metal oxide
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06/23/2009
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10953322
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09/29/2004
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03/30/2006
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Title:
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MULTI WAVELENGTH MASK FOR MULTI LAYER PRINTING ON A PROCESS SUBSTRATE
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06/27/2006
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10953475
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09/29/2004
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05/12/2005
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INDUCTOR FORMED IN AN INTEGRATED CIRCUIT
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03/04/2008
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10953477
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09/29/2004
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03/30/2006
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Title:
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METHOD AND SYSTEM OF USING OFFSET GAGE FOR CMP POLISHING PAD ALIGNMENT AND ADJUSTMENT
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03/27/2007
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10953480
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09/29/2004
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04/06/2006
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Title:
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SEMICONDUCTOR DEVICE MANUFACTURING
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06/27/2006
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10953750
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09/29/2004
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04/06/2006
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Title:
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THICK OXIDE REGION IN A SEMICONDUCTOR DEVICE
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08/22/2006
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10953894
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09/29/2004
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03/30/2006
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Title:
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MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
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03/18/2008
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10955238
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09/30/2004
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08/04/2005
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Title:
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STRUCTURE AND METHOD FOR IMPROVED HEAT CONDUCTION FOR SEMICONDUCTOR DEVICES
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02/13/2007
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10959868
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10/06/2004
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02/24/2005
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Title:
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ANALOG CAPACITOR IN DUAL DAMASCENE PROCESS
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02/20/2007
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10963156
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10/12/2004
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03/03/2005
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Title:
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CATHODE WITH IMPROVED WORK FUNCTION AND METHOD FOR MAKING THE SAME
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NONE
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10964032
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10/12/2004
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03/24/2005
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Title:
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Via and metal line interface capable of reducing the incidence of electro-migration induced voids
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02/20/2007
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10966074
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10/14/2004
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04/20/2006
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Title:
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METHOD FOR FABRICATING PLANAR SEMICONDUCTOR WAFERS
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03/21/2006
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10967900
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10/18/2004
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03/10/2005
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Title:
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ELECTRO-MECHANICAL DEVICE HAVING A CHARGE DISSIPATION LAYER AND A METHOD OF MANUFACTURE THEREFOR
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08/21/2007
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10971961
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10/22/2004
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04/27/2006
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Title:
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LOCAL INTERCONNECT MANUFACTURING PROCESS
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06/27/2006
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10972898
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10/25/2004
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05/26/2005
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Title:
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ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
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04/17/2007
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10973851
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10/25/2004
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Pub Dt:
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04/27/2006
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Title:
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CONTACT RING DESIGN FOR REDUCING BUBBLE AND ELECTROLYTE EFFECTS DURING ELECTROCHEMICAL PLATING IN MANUFACTURING
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01/05/2010
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10978716
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11/01/2004
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03/24/2005
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Title:
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MIXED SIGNAL INTEGRATED CIRCUIT WITH IMPROVED ISOLATION
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08/11/2009
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10981175
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11/03/2004
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05/04/2006
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LATERAL DOUBLE DIFFUSED MOS TRANSISTORS
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12/12/2006
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10984286
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11/09/2004
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05/11/2006
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HIGH PERFORMANCE DIODE-IMPLANTED VOLTAGE-CONTROLLED POLY RESISTORS FOR MIXED-SIGNAL AND RF APPLICATIONS
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01/30/2007
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10986984
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11/12/2004
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07/28/2005
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METHOD AND STRUCTURE FOR GRADED GATE OXIDES ON VERTICAL AND NON-PLANAR SURFACES
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07/08/2008
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10991107
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11/17/2004
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05/18/2006
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METHOD AND SYSTEM FOR REDUCING INTER-LAYER CAPACITANCE IN INTEGRATED CIRCUITS
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08/28/2007
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10999704
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11/30/2004
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06/01/2006
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SEMICONDUCTOR DEVICE HAVING IMPROVED POWER DENSITY
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02/12/2008
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10999705
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11/30/2004
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06/01/2006
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DUAL-GATE METAL-OXIDE SEMICONDUCTOR DEVICE
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08/22/2006
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11000772
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12/01/2004
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04/14/2005
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PROCESS INDEPENDENT ALIGNMENT MARKS
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07/10/2007
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11005765
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12/06/2004
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06/08/2006
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REDUCED CAPACITANCE RESISTORS
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11/15/2011
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11011896
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12/14/2004
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12/15/2005
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MASKLESS VORTEX PHASE SHIFT OPTICAL DIRECT WRITE LITHOGRAPHY
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05/13/2008
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11012003
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12/14/2004
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10/27/2005
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PROCESS AND APPARATUS FOR ACHIEVING SINGLE EXPOSURE PATTERN TRANSFER USING MASKLESS OPTICAL DIRECT WRITE LITHOGRAPHY
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07/11/2006
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11016014
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12/17/2004
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06/22/2006
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SYSTEM FOR IMPLEMENTING A CONFIGURABLE INTEGRATED CIRCUIT
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02/14/2006
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12/16/2004
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05/12/2005
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DIAMOND METAL-FILLED PATTERNS ACHIEVING LOW PARASITIC COUPLING CAPACITANCE
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06/24/2008
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11031564
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01/06/2005
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07/07/2005
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METHOD TO SELECTIVELY IDENTIFY RELIABILITY RISK DIE BASED ON CHARACTERISTICS OF LOCAL REGIONS ON THE WAFER
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08/21/2007
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11046150
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01/28/2005
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08/03/2006
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MULTI-LAYER REGISTRATION AND DIMENSIONAL TEST MARK FOR SCATTEROMETRICAL MEASUREMENT
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07/21/2009
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11057690
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02/14/2005
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08/17/2006
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HIGH-DENSITY FIELD EMISSION ELEMENTS AND A METHOD FOR FORMING SAID EMISSION ELEMENTS
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07/25/2006
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11058498
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02/15/2005
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07/21/2005
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LOCAL INTERCONNECT FOR INTEGRATED CIRCUIT
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04/10/2007
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02/22/2005
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08/24/2006
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SYSTEMS AND METHODS FOR WAFER POLISHING
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07/24/2007
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11068237
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02/28/2005
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08/31/2006
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Title:
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CONTROL OF WAFER WARPAGE DURING BACKEND PROCESSING
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