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01/23/2007
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Application #:
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11151363
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Filing Dt:
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06/13/2005
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Publication #:
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Pub Dt:
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10/20/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR ADAPTIVELY MANAGING PAGES IN A MEMORY
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Patent #:
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Issue Dt:
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10/12/2010
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11153036
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06/14/2005
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Pub Dt:
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12/14/2006
| | | | |
Title:
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MEMORY ATTRIBUTE SPECULATION
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Patent #:
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Issue Dt:
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11/18/2008
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Application #:
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11153950
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Filing Dt:
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06/16/2005
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Publication #:
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Pub Dt:
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12/21/2006
| | | | |
Title:
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REDUCING COMPUTING SYSTEM POWER THROUGH IDLE SYNCHRONIZATION
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Patent #:
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12/28/2010
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11154138
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Filing Dt:
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06/15/2005
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Pub Dt:
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12/21/2006
| | | | |
Title:
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METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL
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Patent #:
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Issue Dt:
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10/14/2008
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11157526
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Filing Dt:
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06/21/2005
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Publication #:
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Pub Dt:
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01/11/2007
| | | | |
Title:
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AUTOMATED BIST EXECUTION SCHEME FOR A LINK
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Patent #:
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Issue Dt:
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06/16/2009
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11158661
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06/21/2005
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Publication #:
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01/04/2007
| | | | |
Title:
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METHODS FOR PATTERNING A SEMICONDUCTOR FILM
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Patent #:
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Issue Dt:
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04/20/2010
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11165595
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Filing Dt:
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06/22/2005
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Pub Dt:
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12/28/2006
| | | | |
Title:
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MEMORY DEVICE IDENTIFICATION
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Patent #:
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Issue Dt:
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02/01/2011
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11165639
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Filing Dt:
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06/23/2005
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Publication #:
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Pub Dt:
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12/28/2006
| | | | |
Title:
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PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION
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Patent #:
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10/07/2008
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11165688
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06/24/2005
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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NON-SPECULATIVE DISTRIBUTED CONFLICT RESOLUTION FOR A CACHE COHERENCY PROTOCOL
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Patent #:
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11/21/2006
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11165724
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06/24/2005
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Publication #:
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Pub Dt:
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10/27/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR IMPROVING STABILITY OF A 6T CMOS SRAM CELL
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Patent #:
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03/02/2010
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11167922
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06/27/2005
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12/28/2006
| | | | |
Title:
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GRID ARRAY CONNECTION DEVICE AND METHOD
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NONE
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11168784
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06/28/2005
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Pub Dt:
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12/28/2006
| | | | |
Title:
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Packaging logic and memory integrated circuits
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01/06/2009
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11169975
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06/29/2005
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Publication #:
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01/11/2007
| | | | |
Title:
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PROCESSOR POWER MANAGEMENT ASSOCIATED WITH WORKLOADS
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Patent #:
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09/25/2007
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11170559
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06/28/2005
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Publication #:
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Pub Dt:
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12/28/2006
| | | | |
Title:
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LOW-VOLTAGE, BUFFERED BANDGAP REFERENCE WITH SELECTABLE OUTPUT VOLTAGE
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Patent #:
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12/22/2009
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11171134
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06/29/2005
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR MIGRATING SOFTWARE-BASED SECURITY COPROCESSORS
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Patent #:
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05/25/2010
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11171691
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Filing Dt:
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06/29/2005
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Publication #:
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01/04/2007
| | | | |
Title:
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POWER PRIORITIZATION AMONG FUNCTIONS OF A MULTI-FUNCTION DEVICE
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Patent #:
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06/30/2009
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11171858
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06/30/2005
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Pub Dt:
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01/04/2007
| | | | |
Title:
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PROTOCOL AGNOSTIC SWITCHING
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Patent #:
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11/03/2009
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11171880
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Filing Dt:
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06/29/2005
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Publication #:
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Pub Dt:
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11/16/2006
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Title:
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METHOD AND APPARATUS FOR REMOTELY PROVISIONING SOFTWARE-BASED SECURITY COPROCESSORS
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Patent #:
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08/28/2007
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11172717
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06/30/2005
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Pub Dt:
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11/24/2005
| | | | |
Title:
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APPARATUS AND METHOD EXTENDING FLIP-CHIP PAD STRUCTURES FOR WIREBONDING ON LOW-K DIELECTRIC SILICON
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11/24/2009
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11173036
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06/30/2005
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Pub Dt:
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01/04/2007
| | | | |
Title:
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MULTI-PATTERN PACKET CONTENT INSPECTION MECHANISMS EMPLOYING TAGGED VALUES
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Patent #:
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09/30/2008
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11173220
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06/30/2005
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01/04/2007
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Title:
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POWER MANAGEMENT SYSTEM FOR COMPUTING PLATFORM
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02/24/2009
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11173660
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06/30/2005
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Pub Dt:
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01/04/2007
| | | | |
Title:
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TRANSISTOR WITH IMPROVED TIP PROFILE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/07/2008
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11174009
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06/30/2005
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Pub Dt:
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01/11/2007
| | | | |
Title:
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METHOD AND APPARATUS TO CALIBRATE DRAM ON RESISTANCE (RON) AND ON-DIE TERMINATION (ODT) VALUES OVER PROCESS, VOLTAGE AND TEMPERATURE (PVT) VARIATIONS
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Patent #:
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11/18/2008
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11174060
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06/30/2005
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01/04/2007
| | | | |
Title:
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VARIOUS APPARATUSES AND METHODS FOR REDUCED POWER STATES IN SYSTEM MEMORY
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Patent #:
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Issue Dt:
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08/28/2007
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11174128
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06/30/2005
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Publication #:
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Pub Dt:
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01/18/2007
| | | | |
Title:
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NANOTUBE-AND NANOCRYSTAL-BASED NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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01/18/2011
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11174236
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07/05/2005
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Publication #:
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Pub Dt:
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01/11/2007
| | | | |
Title:
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IDENTIFYING AND ACCESSING INDIVIDUAL MEMORY DEVICES IN A MEMORY CHANNEL
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Patent #:
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Issue Dt:
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08/24/2010
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11174373
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06/30/2005
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Publication #:
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Pub Dt:
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01/11/2007
| | | | |
Title:
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STATEFUL PACKET CONTENT MATCHING MECHANISMS
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Patent #:
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08/25/2009
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11174424
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06/30/2005
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01/04/2007
| | | | |
Title:
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LOW SPEED ACCESS TO DRAM
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Patent #:
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Issue Dt:
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12/28/2010
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11174943
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07/05/2005
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Pub Dt:
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01/11/2007
| | | | |
Title:
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TOOLS FOR ACCESSING DIGITAL WORKS
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Patent #:
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Issue Dt:
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05/31/2011
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11178222
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07/08/2005
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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INTERFACE ENGINE PROVIDING A CONTINUOUS USER INTERFACE
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Patent #:
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Issue Dt:
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06/08/2010
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11180929
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07/12/2005
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Publication #:
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Pub Dt:
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01/18/2007
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Title:
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RADIO FREQUENCY IDENTIFICATION TAGS CAPABLE OF EMBEDDING RECEIVER SIGNAL STRENGTH INDICATIONS
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Patent #:
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Issue Dt:
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01/02/2007
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11186923
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07/22/2005
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Pub Dt:
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02/09/2006
| | | | |
Title:
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STRUCTURED INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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07/07/2009
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11201608
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Filing Dt:
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08/10/2005
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Pub Dt:
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02/15/2007
| | | | |
Title:
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HARDWARE MANAGEMENT MODULE
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Patent #:
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Issue Dt:
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03/20/2007
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Application #:
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11202541
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08/11/2005
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Pub Dt:
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12/22/2005
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Title:
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TRANSITION METAL ALLOYS FOR USE AS A GATE ELECTRODE AND DEVICES INCORPORATING THESE ALLOYS
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Patent #:
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Issue Dt:
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07/22/2008
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11207051
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08/17/2005
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Pub Dt:
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02/22/2007
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Title:
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LATERAL UNDERCUT OF METAL GATE IN SOI DEVICE
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Patent #:
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Issue Dt:
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10/12/2010
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11208451
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08/18/2005
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07/13/2006
| | | | |
Title:
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SHARED-MEMORY SWITCH FABRIC ARCHITECTURE
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Issue Dt:
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08/01/2006
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11210220
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08/22/2005
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Pub Dt:
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03/09/2006
| | | | |
Title:
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METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A HIGH-K GATE DIELECTRIC
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NONE
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Application #:
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11215601
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Filing Dt:
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08/30/2005
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Pub Dt:
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03/02/2006
| | | | |
Title:
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INTERPRETING VISUAL IMAGERY FOR PROVIDING CONTEXT-BASED INFORMATION SERVICES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11218355
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Filing Dt:
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09/02/2005
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Publication #:
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Pub Dt:
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01/12/2006
| | | | |
Title:
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Methods for integrating replacement metal gate structures
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11219528
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Filing Dt:
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09/02/2005
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Publication #:
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Pub Dt:
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03/08/2007
| | | | |
Title:
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Network load balancing apparatus, systems, and methods
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11221453
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Filing Dt:
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09/07/2005
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Publication #:
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Pub Dt:
|
01/19/2006
| | | | |
Title:
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MULIT-LAYERED INTERCONNECT STRUCTURE
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