Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 062552/0702 | |
| Pages: | 4 |
| | Recorded: | 01/31/2023 | | |
| Attorney Dkt #: | 0823-03984 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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10579766
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Filing Dt:
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05/18/2006
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Publication #:
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Pub Dt:
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05/01/2008
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Title:
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ASSERTION GENERATING SYSTEM, PROGRAM THEREOF, CIRCUIT VERIFYING SYSTEM, AND ASSERTION GENERATING METHOD
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Patent #:
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Issue Dt:
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12/18/2007
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Application #:
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11179660
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Filing Dt:
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07/13/2005
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Publication #:
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Pub Dt:
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01/19/2006
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Title:
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METHOD AND APPARATUS FOR SIMULATING LOGIC CIRCUITS THAT INCLUDE A CIRCUIT BLOCK TO WHICH POWER IS NOT SUPPLIED
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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11414397
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Filing Dt:
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05/01/2006
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Publication #:
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Pub Dt:
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11/02/2006
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Title:
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METHOD AND SYSTEM OF PROGRAM DEVELOPMENT SUPPORTING
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12032117
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Filing Dt:
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02/15/2008
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Publication #:
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Pub Dt:
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08/21/2008
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Title:
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SEMICONDUCTOR DESIGN SUPPORT DEVICE, SEMICONDUCTOR DESIGN SUPPORT METHOD, AND MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/28/2012
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Application #:
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12640904
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Filing Dt:
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12/17/2009
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Title:
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METHOD AND APPARATUS FOR SIMULATING LOGIC CIRCUITS THAT INCLUDE A CIRCUIT BLOCK TO WHICH POWER IS NOT SUPPLIED
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Patent #:
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Issue Dt:
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04/15/2014
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Application #:
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13034971
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Filing Dt:
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02/25/2011
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Publication #:
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Pub Dt:
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09/01/2011
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Title:
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SEMICONDUCTOR DESIGN SUPPORT APPARATUS
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Assignee
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| 1000 N. WEST STREET |
| SUITE 1200 |
| WILMINGTON, DELAWARE 19801 |
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Correspondence name and address
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SZYMON GURDA
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903 COMMERCE DRIVE
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SUITE 310
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OAK BROOK, IL 60523
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